18b89ef0aSSøren Schmidt /*- 295eaffaeSSøren Schmidt * Copyright (c) 1998,1999,2000,2001 S�ren Schmidt 38b89ef0aSSøren Schmidt * All rights reserved. 48b89ef0aSSøren Schmidt * 58b89ef0aSSøren Schmidt * Redistribution and use in source and binary forms, with or without 68b89ef0aSSøren Schmidt * modification, are permitted provided that the following conditions 78b89ef0aSSøren Schmidt * are met: 88b89ef0aSSøren Schmidt * 1. Redistributions of source code must retain the above copyright 98b89ef0aSSøren Schmidt * notice, this list of conditions and the following disclaimer, 108b89ef0aSSøren Schmidt * without modification, immediately at the beginning of the file. 118b89ef0aSSøren Schmidt * 2. Redistributions in binary form must reproduce the above copyright 128b89ef0aSSøren Schmidt * notice, this list of conditions and the following disclaimer in the 138b89ef0aSSøren Schmidt * documentation and/or other materials provided with the distribution. 148b89ef0aSSøren Schmidt * 3. The name of the author may not be used to endorse or promote products 158b89ef0aSSøren Schmidt * derived from this software without specific prior written permission. 168b89ef0aSSøren Schmidt * 178b89ef0aSSøren Schmidt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 188b89ef0aSSøren Schmidt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 198b89ef0aSSøren Schmidt * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 208b89ef0aSSøren Schmidt * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 218b89ef0aSSøren Schmidt * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 228b89ef0aSSøren Schmidt * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 238b89ef0aSSøren Schmidt * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 248b89ef0aSSøren Schmidt * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 258b89ef0aSSøren Schmidt * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 268b89ef0aSSøren Schmidt * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 278b89ef0aSSøren Schmidt * 28c3aac50fSPeter Wemm * $FreeBSD$ 298b89ef0aSSøren Schmidt */ 308b89ef0aSSøren Schmidt 318b89ef0aSSøren Schmidt /* ATA register defines */ 328b89ef0aSSøren Schmidt #define ATA_DATA 0x00 /* data register */ 338b89ef0aSSøren Schmidt #define ATA_ERROR 0x01 /* (R) error register */ 343082a6dcSSøren Schmidt #define ATA_E_NM 0x02 /* no media */ 352b0a1c08SSøren Schmidt #define ATA_E_ABORT 0x04 /* command aborted */ 363082a6dcSSøren Schmidt #define ATA_E_MCR 0x08 /* media change request */ 373082a6dcSSøren Schmidt #define ATA_E_IDNF 0x10 /* ID not found */ 383082a6dcSSøren Schmidt #define ATA_E_MC 0x20 /* media changed */ 393082a6dcSSøren Schmidt #define ATA_E_UNC 0x40 /* uncorrectable data */ 403082a6dcSSøren Schmidt #define ATA_E_ICRC 0x80 /* UDMA crc error */ 412b0a1c08SSøren Schmidt 4255bfaed1SSøren Schmidt #define ATA_FEATURE 0x01 /* (W) feature register */ 4355bfaed1SSøren Schmidt #define ATA_F_DMA 0x01 /* enable DMA */ 4455bfaed1SSøren Schmidt #define ATA_F_OVL 0x02 /* enable overlap */ 4555bfaed1SSøren Schmidt 4655bfaed1SSøren Schmidt #define ATA_COUNT 0x02 /* (W) sector count */ 4755bfaed1SSøren Schmidt #define ATA_IREASON 0x02 /* (R) interrupt reason */ 488b89ef0aSSøren Schmidt #define ATA_I_CMD 0x01 /* cmd (1) | data (0) */ 498b89ef0aSSøren Schmidt #define ATA_I_IN 0x02 /* read (1) | write (0) */ 508b89ef0aSSøren Schmidt #define ATA_I_RELEASE 0x04 /* released bus (1) */ 5155bfaed1SSøren Schmidt #define ATA_I_TAGMASK 0xf8 /* tag mask */ 528b89ef0aSSøren Schmidt 538b89ef0aSSøren Schmidt #define ATA_SECTOR 0x03 /* sector # */ 548b89ef0aSSøren Schmidt #define ATA_CYL_LSB 0x04 /* cylinder# LSB */ 558b89ef0aSSøren Schmidt #define ATA_CYL_MSB 0x05 /* cylinder# MSB */ 568b89ef0aSSøren Schmidt #define ATA_DRIVE 0x06 /* Sector/Drive/Head register */ 5755bfaed1SSøren Schmidt #define ATA_D_LBA 0x40 /* use LBA adressing */ 588b89ef0aSSøren Schmidt #define ATA_D_IBM 0xa0 /* 512 byte sectors, ECC */ 598b89ef0aSSøren Schmidt 608b89ef0aSSøren Schmidt #define ATA_CMD 0x07 /* command register */ 618563f77dSSøren Schmidt #define ATA_C_NOP 0x00 /* NOP command */ 628563f77dSSøren Schmidt #define ATA_C_F_FLUSHQUEUE 0x00 /* flush queued cmd's */ 638563f77dSSøren Schmidt #define ATA_C_F_AUTOPOLL 0x01 /* start autopoll function */ 6434276510SSøren Schmidt #define ATA_C_ATAPI_RESET 0x08 /* reset ATAPI device */ 658b89ef0aSSøren Schmidt #define ATA_C_READ 0x20 /* read command */ 668b89ef0aSSøren Schmidt #define ATA_C_WRITE 0x30 /* write command */ 6734276510SSøren Schmidt #define ATA_C_PACKET_CMD 0xa0 /* packet command */ 6834276510SSøren Schmidt #define ATA_C_ATAPI_IDENTIFY 0xa1 /* get ATAPI params*/ 698563f77dSSøren Schmidt #define ATA_C_SERVICE 0xa2 /* service command */ 70aaa29cf2SSøren Schmidt #define ATA_C_READ_MUL 0xc4 /* read multi command */ 71aaa29cf2SSøren Schmidt #define ATA_C_WRITE_MUL 0xc5 /* write multi command */ 728b89ef0aSSøren Schmidt #define ATA_C_SET_MULTI 0xc6 /* set multi size command */ 738563f77dSSøren Schmidt #define ATA_C_READ_DMA_QUEUED 0xc7 /* read w/DMA QUEUED command */ 7455bfaed1SSøren Schmidt #define ATA_C_READ_DMA 0xc8 /* read w/DMA command */ 7555bfaed1SSøren Schmidt #define ATA_C_WRITE_DMA 0xca /* write w/DMA command */ 768563f77dSSøren Schmidt #define ATA_C_WRITE_DMA_QUEUED 0xcc /* write w/DMA QUEUED command */ 77511e9e72SSøren Schmidt #define ATA_C_FLUSHCACHE 0xe7 /* flush cache to disk */ 7834276510SSøren Schmidt #define ATA_C_ATA_IDENTIFY 0xec /* get ATA params */ 7955bfaed1SSøren Schmidt #define ATA_C_SETFEATURES 0xef /* features command */ 80838b8e23SSøren Schmidt #define ATA_C_F_SETXFER 0x03 /* set transfer mode */ 81838b8e23SSøren Schmidt #define ATA_C_F_ENAB_WCACHE 0x02 /* enable write cache */ 82511e9e72SSøren Schmidt #define ATA_C_F_DIS_WCACHE 0x82 /* disable write cache */ 838563f77dSSøren Schmidt #define ATA_C_F_ENAB_RCACHE 0xaa /* enable readahead cache */ 84511e9e72SSøren Schmidt #define ATA_C_F_DIS_RCACHE 0x55 /* disable readahead cache */ 85511e9e72SSøren Schmidt #define ATA_C_F_ENAB_RELIRQ 0x5d /* enable release interrupt */ 868563f77dSSøren Schmidt #define ATA_C_F_DIS_RELIRQ 0xdd /* disable release interrupt */ 87511e9e72SSøren Schmidt #define ATA_C_F_ENAB_SRVIRQ 0x5e /* enable service interrupt */ 888563f77dSSøren Schmidt #define ATA_C_F_DIS_SRVIRQ 0xde /* disable service interrupt */ 898b89ef0aSSøren Schmidt 908b89ef0aSSøren Schmidt #define ATA_STATUS 0x07 /* status register */ 918b89ef0aSSøren Schmidt #define ATA_S_ERROR 0x01 /* error */ 928b89ef0aSSøren Schmidt #define ATA_S_INDEX 0x02 /* index */ 938b89ef0aSSøren Schmidt #define ATA_S_CORR 0x04 /* data corrected */ 948b89ef0aSSøren Schmidt #define ATA_S_DRQ 0x08 /* data request */ 9555bfaed1SSøren Schmidt #define ATA_S_DSC 0x10 /* drive seek completed */ 962b0a1c08SSøren Schmidt #define ATA_S_SERVICE 0x10 /* drive needs service */ 978b89ef0aSSøren Schmidt #define ATA_S_DWF 0x20 /* drive write fault */ 982b0a1c08SSøren Schmidt #define ATA_S_DMA 0x20 /* DMA ready */ 992b0a1c08SSøren Schmidt #define ATA_S_READY 0x40 /* drive ready */ 1002b0a1c08SSøren Schmidt #define ATA_S_BUSY 0x80 /* busy */ 1018b89ef0aSSøren Schmidt 102b17f7a1aSSøren Schmidt #define ATA_ALTSTAT 0x00 /* alternate status register */ 103511e9e72SSøren Schmidt #define ATA_ALTOFFSET 0x206 /* alternate registers offset */ 1040dbc12d8SSøren Schmidt #define ATA_PCCARD_ALTOFFSET 0x0e /* do for PCCARD devices */ 1058b89ef0aSSøren Schmidt #define ATA_A_IDS 0x02 /* disable interrupts */ 1068b89ef0aSSøren Schmidt #define ATA_A_RESET 0x04 /* RESET controller */ 1078b89ef0aSSøren Schmidt #define ATA_A_4BIT 0x08 /* 4 head bits */ 1088b89ef0aSSøren Schmidt 10955bfaed1SSøren Schmidt /* misc defines */ 1107dd6c388SSøren Schmidt #define ATA_PRIMARY 0x1f0 1117dd6c388SSøren Schmidt #define ATA_SECONDARY 0x170 1128b89ef0aSSøren Schmidt #define ATA_MASTER 0x00 1138b89ef0aSSøren Schmidt #define ATA_SLAVE 0x10 1148b89ef0aSSøren Schmidt #define ATA_IOSIZE 0x08 115b17f7a1aSSøren Schmidt #define ATA_ALTIOSIZE 0x01 116b17f7a1aSSøren Schmidt #define ATA_BMIOSIZE 0x08 117989fb394SSøren Schmidt #define ATA_OP_FINISHED 0x00 118989fb394SSøren Schmidt #define ATA_OP_CONTINUES 0x01 1192c483f9eSSøren Schmidt #define ATA_DEV(device) ((device == ATA_MASTER) ? 0 : 1) 1202c483f9eSSøren Schmidt #define ATA_PARAM(scp, device) (scp->dev_param[ATA_DEV(device)]) 1218b89ef0aSSøren Schmidt 12255bfaed1SSøren Schmidt /* busmaster DMA related defines */ 12355bfaed1SSøren Schmidt #define ATA_DMA_ENTRIES 256 12455bfaed1SSøren Schmidt #define ATA_DMA_EOT 0x80000000 1258b89ef0aSSøren Schmidt 12655bfaed1SSøren Schmidt #define ATA_BMCMD_PORT 0x00 12755bfaed1SSøren Schmidt #define ATA_BMCMD_START_STOP 0x01 12855bfaed1SSøren Schmidt #define ATA_BMCMD_WRITE_READ 0x08 12955bfaed1SSøren Schmidt 13055bfaed1SSøren Schmidt #define ATA_BMSTAT_PORT 0x02 13155bfaed1SSøren Schmidt #define ATA_BMSTAT_ACTIVE 0x01 13255bfaed1SSøren Schmidt #define ATA_BMSTAT_ERROR 0x02 13355bfaed1SSøren Schmidt #define ATA_BMSTAT_INTERRUPT 0x04 13434276510SSøren Schmidt #define ATA_BMSTAT_MASK 0x07 13555bfaed1SSøren Schmidt #define ATA_BMSTAT_DMA_MASTER 0x20 13655bfaed1SSøren Schmidt #define ATA_BMSTAT_DMA_SLAVE 0x40 1372b0a1c08SSøren Schmidt #define ATA_BMSTAT_DMA_SIMPLEX 0x80 13855bfaed1SSøren Schmidt 13955bfaed1SSøren Schmidt #define ATA_BMDTP_PORT 0x04 14055bfaed1SSøren Schmidt 14155bfaed1SSøren Schmidt /* structure for holding DMA address data */ 14255bfaed1SSøren Schmidt struct ata_dmaentry { 14355bfaed1SSøren Schmidt u_int32_t base; 14455bfaed1SSøren Schmidt u_int32_t count; 14555bfaed1SSøren Schmidt }; 14655bfaed1SSøren Schmidt 147974f3401SSøren Schmidt /* ATA/ATAPI device parameter information */ 148974f3401SSøren Schmidt struct ata_params { 149974f3401SSøren Schmidt u_int8_t cmdsize :2; /* packet command size */ 150974f3401SSøren Schmidt #define ATAPI_PSIZE_12 0 /* 12 bytes */ 151974f3401SSøren Schmidt #define ATAPI_PSIZE_16 1 /* 16 bytes */ 152974f3401SSøren Schmidt 153974f3401SSøren Schmidt u_int8_t :3; 154974f3401SSøren Schmidt u_int8_t drqtype :2; /* DRQ type */ 155974f3401SSøren Schmidt #define ATAPI_DRQT_MPROC 0 /* cpu 3 ms delay */ 156974f3401SSøren Schmidt #define ATAPI_DRQT_INTR 1 /* intr 10 ms delay */ 157974f3401SSøren Schmidt #define ATAPI_DRQT_ACCEL 2 /* accel 50 us delay */ 158974f3401SSøren Schmidt 159974f3401SSøren Schmidt u_int8_t removable :1; /* device is removable */ 160974f3401SSøren Schmidt u_int8_t device_type :5; /* device type */ 161974f3401SSøren Schmidt #define ATAPI_TYPE_DIRECT 0 /* disk/floppy */ 162974f3401SSøren Schmidt #define ATAPI_TYPE_TAPE 1 /* streaming tape */ 163974f3401SSøren Schmidt #define ATAPI_TYPE_CDROM 5 /* CD-ROM device */ 164974f3401SSøren Schmidt #define ATAPI_TYPE_OPTICAL 7 /* optical disk */ 165974f3401SSøren Schmidt 166974f3401SSøren Schmidt u_int8_t :1; 167974f3401SSøren Schmidt u_int8_t proto :2; /* command protocol */ 168974f3401SSøren Schmidt #define ATAPI_PROTO_ATAPI 2 169974f3401SSøren Schmidt 170974f3401SSøren Schmidt u_int16_t cylinders; /* number of cylinders */ 1718563f77dSSøren Schmidt u_int16_t reserved2; 172974f3401SSøren Schmidt u_int16_t heads; /* # heads */ 1738563f77dSSøren Schmidt u_int16_t unfbytespertrk; /* # unformatted bytes/track */ 1748563f77dSSøren Schmidt u_int16_t unfbytes; /* # unformatted bytes/sector */ 175974f3401SSøren Schmidt u_int16_t sectors; /* # sectors/track */ 1768563f77dSSøren Schmidt u_int16_t vendorunique0[3]; 1778563f77dSSøren Schmidt u_int8_t serial[20]; /* serial number */ 1788563f77dSSøren Schmidt u_int16_t buffertype; /* buffer type */ 179974f3401SSøren Schmidt #define ATA_BT_SINGLEPORTSECTOR 1 /* 1 port, 1 sector buffer */ 180974f3401SSøren Schmidt #define ATA_BT_DUALPORTMULTI 2 /* 2 port, mult sector buffer */ 181974f3401SSøren Schmidt #define ATA_BT_DUALPORTMULTICACHE 3 /* above plus track cache */ 182974f3401SSøren Schmidt 1838563f77dSSøren Schmidt u_int16_t buffersize; /* buf size, 512-byte units */ 1848563f77dSSøren Schmidt u_int16_t necc; /* ecc bytes appended */ 1858563f77dSSøren Schmidt u_int8_t revision[8]; /* firmware revision */ 1868563f77dSSøren Schmidt u_int8_t model[40]; /* model name */ 1878563f77dSSøren Schmidt u_int8_t nsecperint; /* sectors per interrupt */ 1888563f77dSSøren Schmidt u_int8_t vendorunique1; 1898563f77dSSøren Schmidt u_int16_t usedmovsd; /* double word read/write? */ 190974f3401SSøren Schmidt 191974f3401SSøren Schmidt u_int8_t vendorcap; /* vendor capabilities */ 192974f3401SSøren Schmidt u_int8_t dmaflag :1; /* DMA supported - always 1 */ 193974f3401SSøren Schmidt u_int8_t lbaflag :1; /* LBA supported - always 1 */ 194974f3401SSøren Schmidt u_int8_t iordydis :1; /* IORDY may be disabled */ 195974f3401SSøren Schmidt u_int8_t iordyflag :1; /* IORDY supported */ 196fe08efdcSSøren Schmidt u_int8_t softreset :1; /* needs softreset when busy */ 197974f3401SSøren Schmidt u_int8_t stdby_ovlap :1; /* standby/overlap supported */ 1988563f77dSSøren Schmidt u_int8_t queueing :1; /* supports queuing overlap */ 199974f3401SSøren Schmidt u_int8_t idmaflag :1; /* interleaved DMA supported */ 2008563f77dSSøren Schmidt u_int16_t capvalidate; /* validation for above */ 201974f3401SSøren Schmidt 2028563f77dSSøren Schmidt u_int8_t vendorunique3; 2038563f77dSSøren Schmidt u_int8_t opiomode; /* PIO modes 0-2 */ 2048563f77dSSøren Schmidt u_int8_t vendorunique4; 2058563f77dSSøren Schmidt u_int8_t odmamode; /* old DMA modes, not ATA-3 */ 206974f3401SSøren Schmidt 2078563f77dSSøren Schmidt u_int16_t atavalid; /* fields valid */ 208974f3401SSøren Schmidt #define ATA_FLAG_54_58 1 /* words 54-58 valid */ 209974f3401SSøren Schmidt #define ATA_FLAG_64_70 2 /* words 64-70 valid */ 210974f3401SSøren Schmidt #define ATA_FLAG_88 4 /* word 88 valid */ 211974f3401SSøren Schmidt 2128563f77dSSøren Schmidt u_int16_t currcyls; 2138563f77dSSøren Schmidt u_int16_t currheads; 2148563f77dSSøren Schmidt u_int16_t currsectors; 2158563f77dSSøren Schmidt u_int16_t currsize0; 2168563f77dSSøren Schmidt u_int16_t currsize1; 2178563f77dSSøren Schmidt u_int8_t currmultsect; 2188563f77dSSøren Schmidt u_int8_t multsectvalid; 2198563f77dSSøren Schmidt u_int32_t lbasize; 220974f3401SSøren Schmidt 2218563f77dSSøren Schmidt u_int16_t sdmamodes; /* singleword DMA modes */ 2228563f77dSSøren Schmidt u_int16_t wdmamodes; /* multiword DMA modes */ 2238563f77dSSøren Schmidt u_int16_t apiomodes; /* advanced PIO modes */ 224974f3401SSøren Schmidt 225974f3401SSøren Schmidt u_int16_t mwdmamin; /* min. M/W DMA time/word ns */ 226974f3401SSøren Schmidt u_int16_t mwdmarec; /* rec. M/W DMA time ns */ 227974f3401SSøren Schmidt u_int16_t pioblind; /* min. PIO cycle w/o flow */ 228974f3401SSøren Schmidt u_int16_t pioiordy; /* min. PIO cycle IORDY flow */ 229974f3401SSøren Schmidt 2308563f77dSSøren Schmidt u_int16_t reserved69; 2318563f77dSSøren Schmidt u_int16_t reserved70; 232974f3401SSøren Schmidt u_int16_t rlsovlap; /* rel time (us) for overlap */ 233974f3401SSøren Schmidt u_int16_t rlsservice; /* rel time (us) for service */ 2348563f77dSSøren Schmidt u_int16_t reserved73; 2358563f77dSSøren Schmidt u_int16_t reserved74; 2368563f77dSSøren Schmidt u_int16_t queuelen:5; 2378563f77dSSøren Schmidt u_int16_t :11; 2388563f77dSSøren Schmidt u_int16_t reserved76; 2398563f77dSSøren Schmidt u_int16_t reserved77; 2408563f77dSSøren Schmidt u_int16_t reserved78; 2418563f77dSSøren Schmidt u_int16_t reserved79; 2428563f77dSSøren Schmidt u_int16_t versmajor; 2438563f77dSSøren Schmidt u_int16_t versminor; 2448563f77dSSøren Schmidt u_int16_t featsupp1; /* 82 */ 2458563f77dSSøren Schmidt u_int16_t supmicrocode:1; 2468563f77dSSøren Schmidt u_int16_t supqueued:1; 2478563f77dSSøren Schmidt u_int16_t supcfa:1; 2488563f77dSSøren Schmidt u_int16_t supapm:1; 2498563f77dSSøren Schmidt u_int16_t suprmsn:1; 2508563f77dSSøren Schmidt u_int16_t :11; 2518563f77dSSøren Schmidt u_int16_t featsupp3; /* 84 */ 2528563f77dSSøren Schmidt u_int16_t featenab1; /* 85 */ 2538563f77dSSøren Schmidt u_int16_t enabmicrocode:1; 2548563f77dSSøren Schmidt u_int16_t enabqueued:1; 2558563f77dSSøren Schmidt u_int16_t enabcfa:1; 2568563f77dSSøren Schmidt u_int16_t enabapm:1; 2578563f77dSSøren Schmidt u_int16_t enabrmsn:1; 2588563f77dSSøren Schmidt u_int16_t :11; 2598563f77dSSøren Schmidt u_int16_t featenab3; /* 87 */ 2608563f77dSSøren Schmidt u_int16_t udmamodes; /* UltraDMA modes */ 2618563f77dSSøren Schmidt u_int16_t erasetime; 2628563f77dSSøren Schmidt u_int16_t enherasetime; 2638563f77dSSøren Schmidt u_int16_t apmlevel; 2648563f77dSSøren Schmidt u_int16_t masterpasswdrev; 265974f3401SSøren Schmidt u_int16_t masterhwres :8; 266974f3401SSøren Schmidt u_int16_t slavehwres :5; 267974f3401SSøren Schmidt u_int16_t cblid :1; 268974f3401SSøren Schmidt u_int16_t reserved93_1415 :2; 2698563f77dSSøren Schmidt u_int16_t reserved94[32]; 2708563f77dSSøren Schmidt u_int16_t rmvstat; 2718563f77dSSøren Schmidt u_int16_t securstat; 2728563f77dSSøren Schmidt u_int16_t reserved129[30]; 2738563f77dSSøren Schmidt u_int16_t cfapwrmode; 2748563f77dSSøren Schmidt u_int16_t reserved161[84]; 2758563f77dSSøren Schmidt u_int16_t integrity; 276974f3401SSøren Schmidt }; 277974f3401SSøren Schmidt 27855bfaed1SSøren Schmidt /* structure describing an ATA device */ 27955bfaed1SSøren Schmidt struct ata_softc { 280f1cb6ca3SSøren Schmidt struct device *dev; /* device handle */ 2812c483f9eSSøren Schmidt int channel; /* channel on this controller */ 28247351d27SSøren Schmidt struct resource *r_io; /* io addr resource handle */ 28347351d27SSøren Schmidt struct resource *r_altio; /* altio addr resource handle */ 28447351d27SSøren Schmidt struct resource *r_bmio; /* bmio addr resource handle */ 28547351d27SSøren Schmidt struct resource *r_irq; /* interrupt of this channel */ 2861a488af6SSøren Schmidt void *ih; /* interrupt handle */ 2878563f77dSSøren Schmidt u_int32_t chiptype; /* pciid of controller chip */ 2888563f77dSSøren Schmidt u_int32_t alignment; /* dma engine min alignment */ 289974f3401SSøren Schmidt struct ata_params *dev_param[2]; /* ptr to devices params */ 29034276510SSøren Schmidt void *dev_softc[2]; /* ptr to devices softc's */ 2918563f77dSSøren Schmidt int mode[2]; /* transfer mode for devices */ 2920fd4327bSSøren Schmidt #define ATA_PIO 0x00 293aa966b9aSSøren Schmidt #define ATA_PIO0 0x08 294aa966b9aSSøren Schmidt #define ATA_PIO1 0x09 295aa966b9aSSøren Schmidt #define ATA_PIO2 0x0a 296aa966b9aSSøren Schmidt #define ATA_PIO3 0x0b 297aa966b9aSSøren Schmidt #define ATA_PIO4 0x0c 2980fd4327bSSøren Schmidt #define ATA_DMA 0x10 299aa966b9aSSøren Schmidt #define ATA_WDMA2 0x22 300aa966b9aSSøren Schmidt #define ATA_UDMA2 0x42 301aa966b9aSSøren Schmidt #define ATA_UDMA4 0x44 302ab418d7dSSøren Schmidt #define ATA_UDMA5 0x45 30334276510SSøren Schmidt 3048563f77dSSøren Schmidt int flags; /* controller flags */ 3052b0a1c08SSøren Schmidt #define ATA_DMA_ACTIVE 0x01 3062b0a1c08SSøren Schmidt #define ATA_ATAPI_DMA_RO 0x02 30746a37dbaSSøren Schmidt #define ATA_USE_16BIT 0x04 3080dbc12d8SSøren Schmidt #define ATA_NO_SLAVE 0x08 3090dbc12d8SSøren Schmidt #define ATA_ATTACHED 0x10 3100dbc12d8SSøren Schmidt #define ATA_QUEUED 0x20 31134276510SSøren Schmidt 3128563f77dSSøren Schmidt int devices; /* what is present */ 313f63c7e58SSøren Schmidt #define ATA_ATA_MASTER 0x01 314f63c7e58SSøren Schmidt #define ATA_ATA_SLAVE 0x02 315f63c7e58SSøren Schmidt #define ATA_ATAPI_MASTER 0x04 316f63c7e58SSøren Schmidt #define ATA_ATAPI_SLAVE 0x08 317f63c7e58SSøren Schmidt 3188b89ef0aSSøren Schmidt u_int8_t status; /* last controller status */ 3198b89ef0aSSøren Schmidt u_int8_t error; /* last controller error */ 3208563f77dSSøren Schmidt int active; /* active processing request */ 3218b89ef0aSSøren Schmidt #define ATA_IDLE 0x0 322fe08efdcSSøren Schmidt #define ATA_IMMEDIATE 0x1 323fe08efdcSSøren Schmidt #define ATA_WAIT_INTR 0x2 324fe08efdcSSøren Schmidt #define ATA_WAIT_READY 0x3 3250fd4327bSSøren Schmidt #define ATA_ACTIVE 0x4 3260fd4327bSSøren Schmidt #define ATA_ACTIVE_ATA 0x5 3270fd4327bSSøren Schmidt #define ATA_ACTIVE_ATAPI 0x6 3280fd4327bSSøren Schmidt #define ATA_REINITING 0x7 3298b89ef0aSSøren Schmidt 330e3975643SJake Burkholder TAILQ_HEAD(, ad_request) ata_queue; /* head of ATA queue */ 331e3975643SJake Burkholder TAILQ_HEAD(, atapi_request) atapi_queue; /* head of ATAPI queue */ 33234276510SSøren Schmidt void *running; /* currently running request */ 3338b89ef0aSSøren Schmidt }; 3348b89ef0aSSøren Schmidt 3352c483f9eSSøren Schmidt /* externs */ 33647351d27SSøren Schmidt extern devclass_t ata_devclass; 3378b89ef0aSSøren Schmidt 3388b89ef0aSSøren Schmidt /* public prototypes */ 3398b89ef0aSSøren Schmidt void ata_start(struct ata_softc *); 3408563f77dSSøren Schmidt void ata_reset(struct ata_softc *, int *); 3418563f77dSSøren Schmidt int ata_reinit(struct ata_softc *); 3428563f77dSSøren Schmidt int ata_wait(struct ata_softc *, int, u_int8_t); 3438563f77dSSøren Schmidt int ata_command(struct ata_softc *, int, u_int8_t, u_int16_t, u_int8_t, u_int8_t, u_int8_t, u_int8_t, int); 3448563f77dSSøren Schmidt int ata_printf(struct ata_softc *, int, const char *, ...) __printflike(3, 4); 34547351d27SSøren Schmidt int ata_get_lun(u_int32_t *); 34606a519dfSSøren Schmidt int ata_test_lun(u_int32_t *, int); 34747351d27SSøren Schmidt void ata_free_lun(u_int32_t *, int); 3488563f77dSSøren Schmidt char *ata_mode2str(int); 3498563f77dSSøren Schmidt int ata_pio2mode(int); 35047351d27SSøren Schmidt int ata_pmode(struct ata_params *); 35147351d27SSøren Schmidt int ata_wmode(struct ata_params *); 35247351d27SSøren Schmidt int ata_umode(struct ata_params *); 3534175758aSSøren Schmidt #if NPCI > 0 3548563f77dSSøren Schmidt int ata_find_dev(device_t, u_int32_t, u_int32_t); 3554175758aSSøren Schmidt #endif 35647351d27SSøren Schmidt 3578563f77dSSøren Schmidt void *ata_dmaalloc(struct ata_softc *, int); 3588563f77dSSøren Schmidt void ata_dmainit(struct ata_softc *, int, int, int, int); 3598563f77dSSøren Schmidt int ata_dmasetup(struct ata_softc *, int, struct ata_dmaentry *, caddr_t, int); 3608563f77dSSøren Schmidt void ata_dmastart(struct ata_softc *, int, struct ata_dmaentry *, int); 3618563f77dSSøren Schmidt int ata_dmastatus(struct ata_softc *); 3628563f77dSSøren Schmidt int ata_dmadone(struct ata_softc *); 363b17f7a1aSSøren Schmidt 364b17f7a1aSSøren Schmidt #define ATA_INB(res, offset) \ 365b17f7a1aSSøren Schmidt bus_space_read_1(rman_get_bustag((res)), \ 366b17f7a1aSSøren Schmidt rman_get_bushandle((res)), (offset)) 367b17f7a1aSSøren Schmidt #define ATA_INW(res, offset) \ 368b17f7a1aSSøren Schmidt bus_space_read_2(rman_get_bustag((res)), \ 369b17f7a1aSSøren Schmidt rman_get_bushandle((res)), (offset)) 370b17f7a1aSSøren Schmidt #define ATA_INL(res, offset) \ 371b17f7a1aSSøren Schmidt bus_space_read_4(rman_get_bustag((res)), \ 372b17f7a1aSSøren Schmidt rman_get_bushandle((res)), (offset)) 373b17f7a1aSSøren Schmidt #define ATA_INSW(res, offset, addr, count) \ 374b17f7a1aSSøren Schmidt bus_space_read_multi_2(rman_get_bustag((res)), \ 375b17f7a1aSSøren Schmidt rman_get_bushandle((res)), \ 376b17f7a1aSSøren Schmidt (offset), (addr), (count)) 377b17f7a1aSSøren Schmidt #define ATA_INSL(res, offset, addr, count) \ 378b17f7a1aSSøren Schmidt bus_space_read_multi_4(rman_get_bustag((res)), \ 379b17f7a1aSSøren Schmidt rman_get_bushandle((res)), \ 380b17f7a1aSSøren Schmidt (offset), (addr), (count)) 381b17f7a1aSSøren Schmidt #define ATA_OUTB(res, offset, value) \ 382b17f7a1aSSøren Schmidt bus_space_write_1(rman_get_bustag((res)), \ 383b17f7a1aSSøren Schmidt rman_get_bushandle((res)), (offset), (value)) 384b17f7a1aSSøren Schmidt #define ATA_OUTW(res, offset, value) \ 385b17f7a1aSSøren Schmidt bus_space_write_2(rman_get_bustag((res)), \ 386b17f7a1aSSøren Schmidt rman_get_bushandle((res)), (offset), (value)) 387b17f7a1aSSøren Schmidt #define ATA_OUTL(res, offset, value) \ 388b17f7a1aSSøren Schmidt bus_space_write_4(rman_get_bustag((res)), \ 389b17f7a1aSSøren Schmidt rman_get_bushandle((res)), (offset), (value)) 390b17f7a1aSSøren Schmidt #define ATA_OUTSW(res, offset, addr, count) \ 391b17f7a1aSSøren Schmidt bus_space_write_multi_2(rman_get_bustag((res)), \ 392b17f7a1aSSøren Schmidt rman_get_bushandle((res)), \ 393b17f7a1aSSøren Schmidt (offset), (addr), (count)) 394b17f7a1aSSøren Schmidt #define ATA_OUTSL(res, offset, addr, count) \ 395b17f7a1aSSøren Schmidt bus_space_write_multi_4(rman_get_bustag((res)), \ 396b17f7a1aSSøren Schmidt rman_get_bushandle((res)), \ 397b17f7a1aSSøren Schmidt (offset), (addr), (count)) 398