113014ca0SSøren Schmidt /*- 29a14aa01SUlrich Spörlein * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org> 313014ca0SSøren Schmidt * All rights reserved. 413014ca0SSøren Schmidt * 513014ca0SSøren Schmidt * Redistribution and use in source and binary forms, with or without 613014ca0SSøren Schmidt * modification, are permitted provided that the following conditions 713014ca0SSøren Schmidt * are met: 813014ca0SSøren Schmidt * 1. Redistributions of source code must retain the above copyright 913014ca0SSøren Schmidt * notice, this list of conditions and the following disclaimer, 1013014ca0SSøren Schmidt * without modification, immediately at the beginning of the file. 1113014ca0SSøren Schmidt * 2. Redistributions in binary form must reproduce the above copyright 1213014ca0SSøren Schmidt * notice, this list of conditions and the following disclaimer in the 1313014ca0SSøren Schmidt * documentation and/or other materials provided with the distribution. 1413014ca0SSøren Schmidt * 1513014ca0SSøren Schmidt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1613014ca0SSøren Schmidt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1713014ca0SSøren Schmidt * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 1813014ca0SSøren Schmidt * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 1913014ca0SSøren Schmidt * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2013014ca0SSøren Schmidt * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2113014ca0SSøren Schmidt * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2213014ca0SSøren Schmidt * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2313014ca0SSøren Schmidt * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2413014ca0SSøren Schmidt * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2513014ca0SSøren Schmidt */ 2613014ca0SSøren Schmidt 2713014ca0SSøren Schmidt #include <sys/cdefs.h> 2813014ca0SSøren Schmidt __FBSDID("$FreeBSD$"); 2913014ca0SSøren Schmidt 3013014ca0SSøren Schmidt #include <sys/param.h> 3113014ca0SSøren Schmidt #include <sys/module.h> 3213014ca0SSøren Schmidt #include <sys/systm.h> 3313014ca0SSøren Schmidt #include <sys/kernel.h> 3413014ca0SSøren Schmidt #include <sys/ata.h> 3513014ca0SSøren Schmidt #include <sys/bus.h> 3613014ca0SSøren Schmidt #include <sys/endian.h> 3713014ca0SSøren Schmidt #include <sys/malloc.h> 3813014ca0SSøren Schmidt #include <sys/lock.h> 3913014ca0SSøren Schmidt #include <sys/mutex.h> 4013014ca0SSøren Schmidt #include <sys/sema.h> 4113014ca0SSøren Schmidt #include <sys/taskqueue.h> 4213014ca0SSøren Schmidt #include <vm/uma.h> 4313014ca0SSøren Schmidt #include <machine/stdarg.h> 4413014ca0SSøren Schmidt #include <machine/resource.h> 4513014ca0SSøren Schmidt #include <machine/bus.h> 4613014ca0SSøren Schmidt #include <sys/rman.h> 4713014ca0SSøren Schmidt #include <dev/pci/pcivar.h> 4813014ca0SSøren Schmidt #include <dev/pci/pcireg.h> 4913014ca0SSøren Schmidt #include <dev/ata/ata-all.h> 5013014ca0SSøren Schmidt #include <dev/ata/ata-pci.h> 5113014ca0SSøren Schmidt #include <ata_if.h> 5213014ca0SSøren Schmidt 5313014ca0SSøren Schmidt /* local prototypes */ 5413014ca0SSøren Schmidt static int ata_nvidia_chipinit(device_t dev); 5504ff88ceSAlexander Motin static int ata_nvidia_ch_attach(device_t dev); 56df6f4304SAlexander Motin static int ata_nvidia_ch_attach_dumb(device_t dev); 5713014ca0SSøren Schmidt static int ata_nvidia_status(device_t dev); 5813014ca0SSøren Schmidt static void ata_nvidia_reset(device_t dev); 59066f913aSAlexander Motin static int ata_nvidia_setmode(device_t dev, int target, int mode); 6013014ca0SSøren Schmidt 6113014ca0SSøren Schmidt /* misc defines */ 6213014ca0SSøren Schmidt #define NV4 0x01 6313014ca0SSøren Schmidt #define NVQ 0x02 6453963e58SAlexander Motin #define NVAHCI 0x04 6513014ca0SSøren Schmidt 6613014ca0SSøren Schmidt /* 6713014ca0SSøren Schmidt * nVidia chipset support functions 6813014ca0SSøren Schmidt */ 6913014ca0SSøren Schmidt static int 7013014ca0SSøren Schmidt ata_nvidia_probe(device_t dev) 7113014ca0SSøren Schmidt { 7213014ca0SSøren Schmidt struct ata_pci_controller *ctlr = device_get_softc(dev); 7329658c96SDimitry Andric static const struct ata_chip_id ids[] = 7413014ca0SSøren Schmidt {{ ATA_NFORCE1, 0, 0, 0, ATA_UDMA5, "nForce" }, 7513014ca0SSøren Schmidt { ATA_NFORCE2, 0, 0, 0, ATA_UDMA6, "nForce2" }, 7613014ca0SSøren Schmidt { ATA_NFORCE2_PRO, 0, 0, 0, ATA_UDMA6, "nForce2 Pro" }, 7713014ca0SSøren Schmidt { ATA_NFORCE2_PRO_S1, 0, 0, 0, ATA_SA150, "nForce2 Pro" }, 7813014ca0SSøren Schmidt { ATA_NFORCE3, 0, 0, 0, ATA_UDMA6, "nForce3" }, 7913014ca0SSøren Schmidt { ATA_NFORCE3_PRO, 0, 0, 0, ATA_UDMA6, "nForce3 Pro" }, 8013014ca0SSøren Schmidt { ATA_NFORCE3_PRO_S1, 0, 0, 0, ATA_SA150, "nForce3 Pro" }, 8113014ca0SSøren Schmidt { ATA_NFORCE3_PRO_S2, 0, 0, 0, ATA_SA150, "nForce3 Pro" }, 8213014ca0SSøren Schmidt { ATA_NFORCE_MCP04, 0, 0, 0, ATA_UDMA6, "nForce MCP" }, 8313014ca0SSøren Schmidt { ATA_NFORCE_MCP04_S1, 0, NV4, 0, ATA_SA150, "nForce MCP" }, 8413014ca0SSøren Schmidt { ATA_NFORCE_MCP04_S2, 0, NV4, 0, ATA_SA150, "nForce MCP" }, 8513014ca0SSøren Schmidt { ATA_NFORCE_CK804, 0, 0, 0, ATA_UDMA6, "nForce CK804" }, 8613014ca0SSøren Schmidt { ATA_NFORCE_CK804_S1, 0, NV4, 0, ATA_SA300, "nForce CK804" }, 8713014ca0SSøren Schmidt { ATA_NFORCE_CK804_S2, 0, NV4, 0, ATA_SA300, "nForce CK804" }, 8813014ca0SSøren Schmidt { ATA_NFORCE_MCP51, 0, 0, 0, ATA_UDMA6, "nForce MCP51" }, 8913014ca0SSøren Schmidt { ATA_NFORCE_MCP51_S1, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP51" }, 9013014ca0SSøren Schmidt { ATA_NFORCE_MCP51_S2, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP51" }, 9113014ca0SSøren Schmidt { ATA_NFORCE_MCP55, 0, 0, 0, ATA_UDMA6, "nForce MCP55" }, 9213014ca0SSøren Schmidt { ATA_NFORCE_MCP55_S1, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP55" }, 9313014ca0SSøren Schmidt { ATA_NFORCE_MCP55_S2, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP55" }, 9413014ca0SSøren Schmidt { ATA_NFORCE_MCP61, 0, 0, 0, ATA_UDMA6, "nForce MCP61" }, 9513014ca0SSøren Schmidt { ATA_NFORCE_MCP61_S1, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP61" }, 9613014ca0SSøren Schmidt { ATA_NFORCE_MCP61_S2, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP61" }, 9713014ca0SSøren Schmidt { ATA_NFORCE_MCP61_S3, 0, NV4|NVQ, 0, ATA_SA300, "nForce MCP61" }, 9813014ca0SSøren Schmidt { ATA_NFORCE_MCP65, 0, 0, 0, ATA_UDMA6, "nForce MCP65" }, 9999844cbfSAlexander Motin { ATA_NFORCE_MCP65_A0, 0, NVAHCI, 0, ATA_SA300, "nForce MCP65" }, 10099844cbfSAlexander Motin { ATA_NFORCE_MCP65_A1, 0, NVAHCI, 0, ATA_SA300, "nForce MCP65" }, 10199844cbfSAlexander Motin { ATA_NFORCE_MCP65_A2, 0, NVAHCI, 0, ATA_SA300, "nForce MCP65" }, 10299844cbfSAlexander Motin { ATA_NFORCE_MCP65_A3, 0, NVAHCI, 0, ATA_SA300, "nForce MCP65" }, 10399844cbfSAlexander Motin { ATA_NFORCE_MCP65_A4, 0, NVAHCI, 0, ATA_SA300, "nForce MCP65" }, 10499844cbfSAlexander Motin { ATA_NFORCE_MCP65_A5, 0, NVAHCI, 0, ATA_SA300, "nForce MCP65" }, 10599844cbfSAlexander Motin { ATA_NFORCE_MCP65_A6, 0, NVAHCI, 0, ATA_SA300, "nForce MCP65" }, 10699844cbfSAlexander Motin { ATA_NFORCE_MCP65_A7, 0, NVAHCI, 0, ATA_SA300, "nForce MCP65" }, 10713014ca0SSøren Schmidt { ATA_NFORCE_MCP67, 0, 0, 0, ATA_UDMA6, "nForce MCP67" }, 10853963e58SAlexander Motin { ATA_NFORCE_MCP67_A0, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 10953963e58SAlexander Motin { ATA_NFORCE_MCP67_A1, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 11053963e58SAlexander Motin { ATA_NFORCE_MCP67_A2, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 11153963e58SAlexander Motin { ATA_NFORCE_MCP67_A3, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 11253963e58SAlexander Motin { ATA_NFORCE_MCP67_A4, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 11353963e58SAlexander Motin { ATA_NFORCE_MCP67_A5, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 11453963e58SAlexander Motin { ATA_NFORCE_MCP67_A6, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 11553963e58SAlexander Motin { ATA_NFORCE_MCP67_A7, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 11653963e58SAlexander Motin { ATA_NFORCE_MCP67_A8, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 11753963e58SAlexander Motin { ATA_NFORCE_MCP67_A9, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 11853963e58SAlexander Motin { ATA_NFORCE_MCP67_AA, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 11953963e58SAlexander Motin { ATA_NFORCE_MCP67_AB, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 120fbcaa016SAriff Abdullah { ATA_NFORCE_MCP67_AC, 0, NVAHCI, 0, ATA_SA300, "nForce MCP67" }, 12113014ca0SSøren Schmidt { ATA_NFORCE_MCP73, 0, 0, 0, ATA_UDMA6, "nForce MCP73" }, 12253963e58SAlexander Motin { ATA_NFORCE_MCP73_A0, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, 12353963e58SAlexander Motin { ATA_NFORCE_MCP73_A1, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, 12453963e58SAlexander Motin { ATA_NFORCE_MCP73_A2, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, 12553963e58SAlexander Motin { ATA_NFORCE_MCP73_A3, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, 12653963e58SAlexander Motin { ATA_NFORCE_MCP73_A4, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, 12753963e58SAlexander Motin { ATA_NFORCE_MCP73_A5, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, 12853963e58SAlexander Motin { ATA_NFORCE_MCP73_A6, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, 12953963e58SAlexander Motin { ATA_NFORCE_MCP73_A7, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, 13053963e58SAlexander Motin { ATA_NFORCE_MCP73_A8, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, 13153963e58SAlexander Motin { ATA_NFORCE_MCP73_A9, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, 13253963e58SAlexander Motin { ATA_NFORCE_MCP73_AA, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, 13353963e58SAlexander Motin { ATA_NFORCE_MCP73_AB, 0, NVAHCI, 0, ATA_SA300, "nForce MCP73" }, 13413014ca0SSøren Schmidt { ATA_NFORCE_MCP77, 0, 0, 0, ATA_UDMA6, "nForce MCP77" }, 13599844cbfSAlexander Motin { ATA_NFORCE_MCP77_A0, 0, NVAHCI, 0, ATA_SA300, "nForce MCP77" }, 13699844cbfSAlexander Motin { ATA_NFORCE_MCP77_A1, 0, NVAHCI, 0, ATA_SA300, "nForce MCP77" }, 13799844cbfSAlexander Motin { ATA_NFORCE_MCP77_A2, 0, NVAHCI, 0, ATA_SA300, "nForce MCP77" }, 13899844cbfSAlexander Motin { ATA_NFORCE_MCP77_A3, 0, NVAHCI, 0, ATA_SA300, "nForce MCP77" }, 13999844cbfSAlexander Motin { ATA_NFORCE_MCP77_A4, 0, NVAHCI, 0, ATA_SA300, "nForce MCP77" }, 14099844cbfSAlexander Motin { ATA_NFORCE_MCP77_A5, 0, NVAHCI, 0, ATA_SA300, "nForce MCP77" }, 14199844cbfSAlexander Motin { ATA_NFORCE_MCP77_A6, 0, NVAHCI, 0, ATA_SA300, "nForce MCP77" }, 14299844cbfSAlexander Motin { ATA_NFORCE_MCP77_A7, 0, NVAHCI, 0, ATA_SA300, "nForce MCP77" }, 14399844cbfSAlexander Motin { ATA_NFORCE_MCP77_A8, 0, NVAHCI, 0, ATA_SA300, "nForce MCP77" }, 14499844cbfSAlexander Motin { ATA_NFORCE_MCP77_A9, 0, NVAHCI, 0, ATA_SA300, "nForce MCP77" }, 14599844cbfSAlexander Motin { ATA_NFORCE_MCP77_AA, 0, NVAHCI, 0, ATA_SA300, "nForce MCP77" }, 14699844cbfSAlexander Motin { ATA_NFORCE_MCP77_AB, 0, NVAHCI, 0, ATA_SA300, "nForce MCP77" }, 14799844cbfSAlexander Motin { ATA_NFORCE_MCP79_A0, 0, NVAHCI, 0, ATA_SA300, "nForce MCP79" }, 14899844cbfSAlexander Motin { ATA_NFORCE_MCP79_A1, 0, NVAHCI, 0, ATA_SA300, "nForce MCP79" }, 14999844cbfSAlexander Motin { ATA_NFORCE_MCP79_A2, 0, NVAHCI, 0, ATA_SA300, "nForce MCP79" }, 15099844cbfSAlexander Motin { ATA_NFORCE_MCP79_A3, 0, NVAHCI, 0, ATA_SA300, "nForce MCP79" }, 15199844cbfSAlexander Motin { ATA_NFORCE_MCP79_A4, 0, NVAHCI, 0, ATA_SA300, "nForce MCP79" }, 15299844cbfSAlexander Motin { ATA_NFORCE_MCP79_A5, 0, NVAHCI, 0, ATA_SA300, "nForce MCP79" }, 15399844cbfSAlexander Motin { ATA_NFORCE_MCP79_A6, 0, NVAHCI, 0, ATA_SA300, "nForce MCP79" }, 15499844cbfSAlexander Motin { ATA_NFORCE_MCP79_A7, 0, NVAHCI, 0, ATA_SA300, "nForce MCP79" }, 15599844cbfSAlexander Motin { ATA_NFORCE_MCP79_A8, 0, NVAHCI, 0, ATA_SA300, "nForce MCP79" }, 15699844cbfSAlexander Motin { ATA_NFORCE_MCP79_A9, 0, NVAHCI, 0, ATA_SA300, "nForce MCP79" }, 15799844cbfSAlexander Motin { ATA_NFORCE_MCP79_AA, 0, NVAHCI, 0, ATA_SA300, "nForce MCP79" }, 15899844cbfSAlexander Motin { ATA_NFORCE_MCP79_AB, 0, NVAHCI, 0, ATA_SA300, "nForce MCP79" }, 15999844cbfSAlexander Motin { ATA_NFORCE_MCP89_A0, 0, NVAHCI, 0, ATA_SA300, "nForce MCP89" }, 160cdc58367SAlexander Motin { ATA_NFORCE_MCP89_A1, 0, NVAHCI, 0, ATA_SA300, "nForce MCP89" }, 16199844cbfSAlexander Motin { ATA_NFORCE_MCP89_A2, 0, NVAHCI, 0, ATA_SA300, "nForce MCP89" }, 16299844cbfSAlexander Motin { ATA_NFORCE_MCP89_A3, 0, NVAHCI, 0, ATA_SA300, "nForce MCP89" }, 16399844cbfSAlexander Motin { ATA_NFORCE_MCP89_A4, 0, NVAHCI, 0, ATA_SA300, "nForce MCP89" }, 16499844cbfSAlexander Motin { ATA_NFORCE_MCP89_A5, 0, NVAHCI, 0, ATA_SA300, "nForce MCP89" }, 16599844cbfSAlexander Motin { ATA_NFORCE_MCP89_A6, 0, NVAHCI, 0, ATA_SA300, "nForce MCP89" }, 16699844cbfSAlexander Motin { ATA_NFORCE_MCP89_A7, 0, NVAHCI, 0, ATA_SA300, "nForce MCP89" }, 16799844cbfSAlexander Motin { ATA_NFORCE_MCP89_A8, 0, NVAHCI, 0, ATA_SA300, "nForce MCP89" }, 16899844cbfSAlexander Motin { ATA_NFORCE_MCP89_A9, 0, NVAHCI, 0, ATA_SA300, "nForce MCP89" }, 16999844cbfSAlexander Motin { ATA_NFORCE_MCP89_AA, 0, NVAHCI, 0, ATA_SA300, "nForce MCP89" }, 17099844cbfSAlexander Motin { ATA_NFORCE_MCP89_AB, 0, NVAHCI, 0, ATA_SA300, "nForce MCP89" }, 17113014ca0SSøren Schmidt { 0, 0, 0, 0, 0, 0}} ; 17213014ca0SSøren Schmidt 17313014ca0SSøren Schmidt if (pci_get_vendor(dev) != ATA_NVIDIA_ID) 17413014ca0SSøren Schmidt return ENXIO; 17513014ca0SSøren Schmidt 17613014ca0SSøren Schmidt if (!(ctlr->chip = ata_match_chip(dev, ids))) 17713014ca0SSøren Schmidt return ENXIO; 17813014ca0SSøren Schmidt 179df6f4304SAlexander Motin if ((ctlr->chip->cfg1 & NVAHCI) && 180cdc58367SAlexander Motin pci_get_subclass(dev) != PCIS_STORAGE_IDE) 181cdc58367SAlexander Motin return (ENXIO); 182cdc58367SAlexander Motin 183cdc58367SAlexander Motin ata_set_desc(dev); 18413014ca0SSøren Schmidt ctlr->chipinit = ata_nvidia_chipinit; 1853036de3cSAlexander Motin return (BUS_PROBE_LOW_PRIORITY); 18613014ca0SSøren Schmidt } 18713014ca0SSøren Schmidt 18813014ca0SSøren Schmidt static int 18913014ca0SSøren Schmidt ata_nvidia_chipinit(device_t dev) 19013014ca0SSøren Schmidt { 19113014ca0SSøren Schmidt struct ata_pci_controller *ctlr = device_get_softc(dev); 19213014ca0SSøren Schmidt 19313014ca0SSøren Schmidt if (ata_setup_interrupt(dev, ata_generic_intr)) 19413014ca0SSøren Schmidt return ENXIO; 19513014ca0SSøren Schmidt 196df6f4304SAlexander Motin if (ctlr->chip->cfg1 & NVAHCI) { 197df6f4304SAlexander Motin ctlr->ch_attach = ata_nvidia_ch_attach_dumb; 198df6f4304SAlexander Motin ctlr->setmode = ata_sata_setmode; 199df6f4304SAlexander Motin } else if (ctlr->chip->max_dma >= ATA_SA150) { 20013014ca0SSøren Schmidt if (pci_read_config(dev, PCIR_BAR(5), 1) & 1) 20113014ca0SSøren Schmidt ctlr->r_type2 = SYS_RES_IOPORT; 20213014ca0SSøren Schmidt else 20313014ca0SSøren Schmidt ctlr->r_type2 = SYS_RES_MEMORY; 20413014ca0SSøren Schmidt ctlr->r_rid2 = PCIR_BAR(5); 20513014ca0SSøren Schmidt if ((ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, 20613014ca0SSøren Schmidt &ctlr->r_rid2, RF_ACTIVE))) { 20713014ca0SSøren Schmidt int offset = ctlr->chip->cfg1 & NV4 ? 0x0440 : 0x0010; 20813014ca0SSøren Schmidt 20904ff88ceSAlexander Motin ctlr->ch_attach = ata_nvidia_ch_attach; 21078d15416SAlexander Motin ctlr->ch_detach = ata_pci_ch_detach; 21113014ca0SSøren Schmidt ctlr->reset = ata_nvidia_reset; 21213014ca0SSøren Schmidt 21313014ca0SSøren Schmidt /* enable control access */ 21413014ca0SSøren Schmidt pci_write_config(dev, 0x50, pci_read_config(dev, 0x50, 1) | 0x04,1); 21555944f2aSAlexander Motin /* MCP55 seems to need some time to allow r_res2 read. */ 21655944f2aSAlexander Motin DELAY(10); 21713014ca0SSøren Schmidt if (ctlr->chip->cfg1 & NVQ) { 21813014ca0SSøren Schmidt /* clear interrupt status */ 21913014ca0SSøren Schmidt ATA_OUTL(ctlr->r_res2, offset, 0x00ff00ff); 22013014ca0SSøren Schmidt 22113014ca0SSøren Schmidt /* enable device and PHY state change interrupts */ 22213014ca0SSøren Schmidt ATA_OUTL(ctlr->r_res2, offset + 4, 0x000d000d); 22313014ca0SSøren Schmidt 22413014ca0SSøren Schmidt /* disable NCQ support */ 22513014ca0SSøren Schmidt ATA_OUTL(ctlr->r_res2, 0x0400, 22613014ca0SSøren Schmidt ATA_INL(ctlr->r_res2, 0x0400) & 0xfffffff9); 22713014ca0SSøren Schmidt } 22813014ca0SSøren Schmidt else { 22913014ca0SSøren Schmidt /* clear interrupt status */ 23013014ca0SSøren Schmidt ATA_OUTB(ctlr->r_res2, offset, 0xff); 23113014ca0SSøren Schmidt 23213014ca0SSøren Schmidt /* enable device and PHY state change interrupts */ 23313014ca0SSøren Schmidt ATA_OUTB(ctlr->r_res2, offset + 1, 0xdd); 23413014ca0SSøren Schmidt } 23513014ca0SSøren Schmidt } 23613014ca0SSøren Schmidt ctlr->setmode = ata_sata_setmode; 237066f913aSAlexander Motin ctlr->getrev = ata_sata_getrev; 23813014ca0SSøren Schmidt } 23913014ca0SSøren Schmidt else { 24013014ca0SSøren Schmidt /* disable prefetch, postwrite */ 24113014ca0SSøren Schmidt pci_write_config(dev, 0x51, pci_read_config(dev, 0x51, 1) & 0x0f, 1); 24213014ca0SSøren Schmidt ctlr->setmode = ata_nvidia_setmode; 24313014ca0SSøren Schmidt } 24413014ca0SSøren Schmidt return 0; 24513014ca0SSøren Schmidt } 24613014ca0SSøren Schmidt 24713014ca0SSøren Schmidt static int 24804ff88ceSAlexander Motin ata_nvidia_ch_attach(device_t dev) 24913014ca0SSøren Schmidt { 25013014ca0SSøren Schmidt struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 25113014ca0SSøren Schmidt struct ata_channel *ch = device_get_softc(dev); 25213014ca0SSøren Schmidt 25313014ca0SSøren Schmidt /* setup the usual register normal pci style */ 25404ff88ceSAlexander Motin if (ata_pci_ch_attach(dev)) 25513014ca0SSøren Schmidt return ENXIO; 25613014ca0SSøren Schmidt 25713014ca0SSøren Schmidt ch->r_io[ATA_SSTATUS].res = ctlr->r_res2; 25813014ca0SSøren Schmidt ch->r_io[ATA_SSTATUS].offset = (ch->unit << 6); 25913014ca0SSøren Schmidt ch->r_io[ATA_SERROR].res = ctlr->r_res2; 26013014ca0SSøren Schmidt ch->r_io[ATA_SERROR].offset = 0x04 + (ch->unit << 6); 26113014ca0SSøren Schmidt ch->r_io[ATA_SCONTROL].res = ctlr->r_res2; 26213014ca0SSøren Schmidt ch->r_io[ATA_SCONTROL].offset = 0x08 + (ch->unit << 6); 26313014ca0SSøren Schmidt 26413014ca0SSøren Schmidt ch->hw.status = ata_nvidia_status; 26513014ca0SSøren Schmidt ch->flags |= ATA_NO_SLAVE; 266066f913aSAlexander Motin ch->flags |= ATA_SATA; 26713014ca0SSøren Schmidt return 0; 26813014ca0SSøren Schmidt } 26913014ca0SSøren Schmidt 27013014ca0SSøren Schmidt static int 271df6f4304SAlexander Motin ata_nvidia_ch_attach_dumb(device_t dev) 272df6f4304SAlexander Motin { 273df6f4304SAlexander Motin struct ata_channel *ch = device_get_softc(dev); 274df6f4304SAlexander Motin 275df6f4304SAlexander Motin if (ata_pci_ch_attach(dev)) 276df6f4304SAlexander Motin return ENXIO; 277df6f4304SAlexander Motin ch->flags |= ATA_SATA; 278df6f4304SAlexander Motin return 0; 279df6f4304SAlexander Motin } 280df6f4304SAlexander Motin 281df6f4304SAlexander Motin static int 28213014ca0SSøren Schmidt ata_nvidia_status(device_t dev) 28313014ca0SSøren Schmidt { 28413014ca0SSøren Schmidt struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 28513014ca0SSøren Schmidt struct ata_channel *ch = device_get_softc(dev); 28613014ca0SSøren Schmidt int offset = ctlr->chip->cfg1 & NV4 ? 0x0440 : 0x0010; 28713014ca0SSøren Schmidt int shift = ch->unit << (ctlr->chip->cfg1 & NVQ ? 4 : 2); 28813014ca0SSøren Schmidt u_int32_t istatus; 28913014ca0SSøren Schmidt 29013014ca0SSøren Schmidt /* get interrupt status */ 29113014ca0SSøren Schmidt if (ctlr->chip->cfg1 & NVQ) 29213014ca0SSøren Schmidt istatus = ATA_INL(ctlr->r_res2, offset); 29313014ca0SSøren Schmidt else 29413014ca0SSøren Schmidt istatus = ATA_INB(ctlr->r_res2, offset); 29513014ca0SSøren Schmidt 29613014ca0SSøren Schmidt /* do we have any PHY events ? */ 29713014ca0SSøren Schmidt if (istatus & (0x0c << shift)) 298bda55b6aSAlexander Motin ata_sata_phy_check_events(dev, -1); 29913014ca0SSøren Schmidt 30013014ca0SSøren Schmidt /* clear interrupt(s) */ 30113014ca0SSøren Schmidt if (ctlr->chip->cfg1 & NVQ) 30213014ca0SSøren Schmidt ATA_OUTL(ctlr->r_res2, offset, (0x0f << shift) | 0x00f000f0); 30313014ca0SSøren Schmidt else 30413014ca0SSøren Schmidt ATA_OUTB(ctlr->r_res2, offset, (0x0f << shift)); 30513014ca0SSøren Schmidt 30613014ca0SSøren Schmidt /* do we have any device action ? */ 30713014ca0SSøren Schmidt return (istatus & (0x01 << shift)); 30813014ca0SSøren Schmidt } 30913014ca0SSøren Schmidt 31013014ca0SSøren Schmidt static void 31113014ca0SSøren Schmidt ata_nvidia_reset(device_t dev) 31213014ca0SSøren Schmidt { 313aecfe194SAlexander Motin struct ata_channel *ch = device_get_softc(dev); 314aecfe194SAlexander Motin 3159cf4fe2eSAlexander Motin if (ata_sata_phy_reset(dev, -1, 1)) 31613014ca0SSøren Schmidt ata_generic_reset(dev); 317aecfe194SAlexander Motin else 318aecfe194SAlexander Motin ch->devices = 0; 31913014ca0SSøren Schmidt } 32013014ca0SSøren Schmidt 321066f913aSAlexander Motin static int 322066f913aSAlexander Motin ata_nvidia_setmode(device_t dev, int target, int mode) 32313014ca0SSøren Schmidt { 324066f913aSAlexander Motin device_t parent = device_get_parent(dev); 325066f913aSAlexander Motin struct ata_pci_controller *ctlr = device_get_softc(parent); 326066f913aSAlexander Motin struct ata_channel *ch = device_get_softc(dev); 327066f913aSAlexander Motin int devno = (ch->unit << 1) + target; 328066f913aSAlexander Motin int piomode; 3295187458fSMarius Strobl static const uint8_t timings[] = 3305187458fSMarius Strobl { 0xa8, 0x65, 0x42, 0x22, 0x20, 0xa8, 0x22, 0x20 }; 3315187458fSMarius Strobl static const uint8_t modes[] = 3325187458fSMarius Strobl { 0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6, 0xc7 }; 33313014ca0SSøren Schmidt int reg = 0x63 - devno; 33413014ca0SSøren Schmidt 335066f913aSAlexander Motin mode = min(mode, ctlr->chip->max_dma); 33613014ca0SSøren Schmidt 337066f913aSAlexander Motin if (mode >= ATA_UDMA0) { 338066f913aSAlexander Motin pci_write_config(parent, reg, modes[mode & ATA_MODE_MASK], 1); 339066f913aSAlexander Motin piomode = ATA_PIO4; 340066f913aSAlexander Motin } else { 341066f913aSAlexander Motin pci_write_config(parent, reg, 0x8b, 1); 342066f913aSAlexander Motin piomode = mode; 34313014ca0SSøren Schmidt } 344066f913aSAlexander Motin pci_write_config(parent, reg - 0x08, timings[ata_mode2idx(piomode)], 1); 345066f913aSAlexander Motin return (mode); 34613014ca0SSøren Schmidt } 34713014ca0SSøren Schmidt 34813014ca0SSøren Schmidt ATA_DECLARE_DRIVER(ata_nvidia); 349