1 /*-
2  * SPDX-License-Identifier: ISC
3  *
4  * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5  * Copyright (c) 2002-2004 Atheros Communications, Inc.
6  *
7  * Permission to use, copy, modify, and/or distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  *
19  * $FreeBSD$
20  */
21 #include "opt_ah.h"
22 
23 #include "ah.h"
24 #include "ah_internal.h"
25 
26 #include "ar5210/ar5210.h"
27 #include "ar5210/ar5210reg.h"
28 
29 /*
30  * Notify Power Mgt is disabled in self-generated frames.
31  * If requested, set Power Mode of chip to auto/normal.
32  */
33 static void
34 ar5210SetPowerModeAuto(struct ath_hal *ah, int setChip)
35 {
36 	OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SV);
37 	if (setChip)
38 		OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_ALLOW);
39 }
40 
41 /*
42  * Notify Power Mgt is enabled in self-generated frames.
43  * If requested, force chip awake.
44  *
45  * Returns A_OK if chip is awake or successfully forced awake.
46  *
47  * WARNING WARNING WARNING
48  * There is a problem with the chip where sometimes it will not wake up.
49  */
50 static HAL_BOOL
51 ar5210SetPowerModeAwake(struct ath_hal *ah, int setChip)
52 {
53 #define	POWER_UP_TIME	2000
54 	uint32_t val;
55 	int i;
56 
57 	if (setChip) {
58 		OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_WAKE);
59 		OS_DELAY(2000);	/* Give chip the chance to awake */
60 
61 		for (i = POWER_UP_TIME / 200; i != 0; i--) {
62 			val = OS_REG_READ(ah, AR_PCICFG);
63 			if ((val & AR_PCICFG_SPWR_DN) == 0)
64 				break;
65 			OS_DELAY(200);
66 			OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE,
67 				AR_SCR_SLE_WAKE);
68 		}
69 		if (i == 0) {
70 #ifdef AH_DEBUG
71 			ath_hal_printf(ah, "%s: Failed to wakeup in %ums\n",
72 				__func__, POWER_UP_TIME/20);
73 #endif
74 			return AH_FALSE;
75 		}
76 	}
77 
78 	OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SV);
79 	return AH_TRUE;
80 #undef POWER_UP_TIME
81 }
82 
83 /*
84  * Notify Power Mgt is disabled in self-generated frames.
85  * If requested, force chip to sleep.
86  */
87 static void
88 ar5210SetPowerModeSleep(struct ath_hal *ah, int setChip)
89 {
90 	OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SV);
91 	if (setChip)
92 		OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP);
93 }
94 
95 HAL_BOOL
96 ar5210SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode, int setChip)
97 {
98 #ifdef AH_DEBUG
99 	static const char* modes[] = {
100 		"AWAKE",
101 		"FULL-SLEEP",
102 		"NETWORK SLEEP",
103 		"UNDEFINED"
104 	};
105 #endif
106 	int status = AH_TRUE;
107 
108 	HALDEBUG(ah, HAL_DEBUG_POWER, "%s: %s -> %s (%s)\n", __func__,
109 		modes[ah->ah_powerMode], modes[mode],
110 		setChip ? "set chip " : "");
111 	switch (mode) {
112 	case HAL_PM_AWAKE:
113 		if (setChip)
114 			ah->ah_powerMode = mode;
115 		status = ar5210SetPowerModeAwake(ah, setChip);
116 		break;
117 	case HAL_PM_FULL_SLEEP:
118 		ar5210SetPowerModeSleep(ah, setChip);
119 		if (setChip)
120 			ah->ah_powerMode = mode;
121 		break;
122 	case HAL_PM_NETWORK_SLEEP:
123 		ar5210SetPowerModeAuto(ah, setChip);
124 		if (setChip)
125 			ah->ah_powerMode = mode;
126 		break;
127 	default:
128 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown power mode %u\n",
129 		    __func__, mode);
130 		return AH_FALSE;
131 	}
132 	return status;
133 }
134 
135 HAL_POWER_MODE
136 ar5210GetPowerMode(struct ath_hal *ah)
137 {
138 	/* Just so happens the h/w maps directly to the abstracted value */
139 	return MS(OS_REG_READ(ah, AR_SCR), AR_SCR_SLE);
140 }
141