1 /* 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2006 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD$ 18 */ 19 #include "opt_ah.h" 20 21 #include "ah.h" 22 #include "ah_internal.h" 23 #include "ah_devid.h" 24 25 #include "ar5211/ar5211.h" 26 #include "ar5211/ar5211reg.h" 27 #include "ar5211/ar5211phy.h" 28 29 #include "ah_eeprom_v3.h" 30 31 static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah, 32 uint16_t flags, uint16_t *low, uint16_t *high); 33 static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah, 34 struct ieee80211_channel *chan); 35 36 static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore); 37 static void ar5211DisablePCIE(struct ath_hal *ah); 38 39 static const struct ath_hal_private ar5211hal = {{ 40 .ah_magic = AR5211_MAGIC, 41 42 .ah_getRateTable = ar5211GetRateTable, 43 .ah_detach = ar5211Detach, 44 45 /* Reset Functions */ 46 .ah_reset = ar5211Reset, 47 .ah_phyDisable = ar5211PhyDisable, 48 .ah_disable = ar5211Disable, 49 .ah_configPCIE = ar5211ConfigPCIE, 50 .ah_disablePCIE = ar5211DisablePCIE, 51 .ah_setPCUConfig = ar5211SetPCUConfig, 52 .ah_perCalibration = ar5211PerCalibration, 53 .ah_perCalibrationN = ar5211PerCalibrationN, 54 .ah_resetCalValid = ar5211ResetCalValid, 55 .ah_setTxPowerLimit = ar5211SetTxPowerLimit, 56 .ah_getChanNoise = ath_hal_getChanNoise, 57 58 /* Transmit functions */ 59 .ah_updateTxTrigLevel = ar5211UpdateTxTrigLevel, 60 .ah_setupTxQueue = ar5211SetupTxQueue, 61 .ah_setTxQueueProps = ar5211SetTxQueueProps, 62 .ah_getTxQueueProps = ar5211GetTxQueueProps, 63 .ah_releaseTxQueue = ar5211ReleaseTxQueue, 64 .ah_resetTxQueue = ar5211ResetTxQueue, 65 .ah_getTxDP = ar5211GetTxDP, 66 .ah_setTxDP = ar5211SetTxDP, 67 .ah_numTxPending = ar5211NumTxPending, 68 .ah_startTxDma = ar5211StartTxDma, 69 .ah_stopTxDma = ar5211StopTxDma, 70 .ah_setupTxDesc = ar5211SetupTxDesc, 71 .ah_setupXTxDesc = ar5211SetupXTxDesc, 72 .ah_fillTxDesc = ar5211FillTxDesc, 73 .ah_procTxDesc = ar5211ProcTxDesc, 74 .ah_getTxIntrQueue = ar5211GetTxIntrQueue, 75 .ah_reqTxIntrDesc = ar5211IntrReqTxDesc, 76 .ah_getTxCompletionRates = ar5211GetTxCompletionRates, 77 78 /* RX Functions */ 79 .ah_getRxDP = ar5211GetRxDP, 80 .ah_setRxDP = ar5211SetRxDP, 81 .ah_enableReceive = ar5211EnableReceive, 82 .ah_stopDmaReceive = ar5211StopDmaReceive, 83 .ah_startPcuReceive = ar5211StartPcuReceive, 84 .ah_stopPcuReceive = ar5211StopPcuReceive, 85 .ah_setMulticastFilter = ar5211SetMulticastFilter, 86 .ah_setMulticastFilterIndex = ar5211SetMulticastFilterIndex, 87 .ah_clrMulticastFilterIndex = ar5211ClrMulticastFilterIndex, 88 .ah_getRxFilter = ar5211GetRxFilter, 89 .ah_setRxFilter = ar5211SetRxFilter, 90 .ah_setupRxDesc = ar5211SetupRxDesc, 91 .ah_procRxDesc = ar5211ProcRxDesc, 92 .ah_rxMonitor = ar5211RxMonitor, 93 .ah_aniPoll = ar5211AniPoll, 94 .ah_procMibEvent = ar5211MibEvent, 95 96 /* Misc Functions */ 97 .ah_getCapability = ar5211GetCapability, 98 .ah_setCapability = ar5211SetCapability, 99 .ah_getDiagState = ar5211GetDiagState, 100 .ah_getMacAddress = ar5211GetMacAddress, 101 .ah_setMacAddress = ar5211SetMacAddress, 102 .ah_getBssIdMask = ar5211GetBssIdMask, 103 .ah_setBssIdMask = ar5211SetBssIdMask, 104 .ah_setRegulatoryDomain = ar5211SetRegulatoryDomain, 105 .ah_setLedState = ar5211SetLedState, 106 .ah_writeAssocid = ar5211WriteAssocid, 107 .ah_gpioCfgInput = ar5211GpioCfgInput, 108 .ah_gpioCfgOutput = ar5211GpioCfgOutput, 109 .ah_gpioGet = ar5211GpioGet, 110 .ah_gpioSet = ar5211GpioSet, 111 .ah_gpioSetIntr = ar5211GpioSetIntr, 112 .ah_getTsf32 = ar5211GetTsf32, 113 .ah_getTsf64 = ar5211GetTsf64, 114 .ah_resetTsf = ar5211ResetTsf, 115 .ah_detectCardPresent = ar5211DetectCardPresent, 116 .ah_updateMibCounters = ar5211UpdateMibCounters, 117 .ah_getRfGain = ar5211GetRfgain, 118 .ah_getDefAntenna = ar5211GetDefAntenna, 119 .ah_setDefAntenna = ar5211SetDefAntenna, 120 .ah_getAntennaSwitch = ar5211GetAntennaSwitch, 121 .ah_setAntennaSwitch = ar5211SetAntennaSwitch, 122 .ah_setSifsTime = ar5211SetSifsTime, 123 .ah_getSifsTime = ar5211GetSifsTime, 124 .ah_setSlotTime = ar5211SetSlotTime, 125 .ah_getSlotTime = ar5211GetSlotTime, 126 .ah_setAckTimeout = ar5211SetAckTimeout, 127 .ah_getAckTimeout = ar5211GetAckTimeout, 128 .ah_setAckCTSRate = ar5211SetAckCTSRate, 129 .ah_getAckCTSRate = ar5211GetAckCTSRate, 130 .ah_setCTSTimeout = ar5211SetCTSTimeout, 131 .ah_getCTSTimeout = ar5211GetCTSTimeout, 132 .ah_setDecompMask = ar5211SetDecompMask, 133 .ah_setCoverageClass = ar5211SetCoverageClass, 134 135 /* Key Cache Functions */ 136 .ah_getKeyCacheSize = ar5211GetKeyCacheSize, 137 .ah_resetKeyCacheEntry = ar5211ResetKeyCacheEntry, 138 .ah_isKeyCacheEntryValid = ar5211IsKeyCacheEntryValid, 139 .ah_setKeyCacheEntry = ar5211SetKeyCacheEntry, 140 .ah_setKeyCacheEntryMac = ar5211SetKeyCacheEntryMac, 141 142 /* Power Management Functions */ 143 .ah_setPowerMode = ar5211SetPowerMode, 144 .ah_getPowerMode = ar5211GetPowerMode, 145 146 /* Beacon Functions */ 147 .ah_setBeaconTimers = ar5211SetBeaconTimers, 148 .ah_beaconInit = ar5211BeaconInit, 149 .ah_setStationBeaconTimers = ar5211SetStaBeaconTimers, 150 .ah_resetStationBeaconTimers = ar5211ResetStaBeaconTimers, 151 152 /* Interrupt Functions */ 153 .ah_isInterruptPending = ar5211IsInterruptPending, 154 .ah_getPendingInterrupts = ar5211GetPendingInterrupts, 155 .ah_getInterrupts = ar5211GetInterrupts, 156 .ah_setInterrupts = ar5211SetInterrupts }, 157 158 .ah_getChannelEdges = ar5211GetChannelEdges, 159 .ah_getWirelessModes = ar5211GetWirelessModes, 160 .ah_eepromRead = ar5211EepromRead, 161 #ifdef AH_SUPPORT_WRITE_EEPROM 162 .ah_eepromWrite = ar5211EepromWrite, 163 #endif 164 .ah_getChipPowerLimits = ar5211GetChipPowerLimits, 165 }; 166 167 static HAL_BOOL ar5211ChipTest(struct ath_hal *); 168 static HAL_BOOL ar5211FillCapabilityInfo(struct ath_hal *ah); 169 170 /* 171 * Return the revsion id for the radio chip. This 172 * fetched via the PHY. 173 */ 174 static uint32_t 175 ar5211GetRadioRev(struct ath_hal *ah) 176 { 177 uint32_t val; 178 int i; 179 180 OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16); 181 for (i = 0; i < 8; i++) 182 OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000); 183 val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff; 184 val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4); 185 return ath_hal_reverseBits(val, 8); 186 } 187 188 /* 189 * Attach for an AR5211 part. 190 */ 191 static struct ath_hal * 192 ar5211Attach(uint16_t devid, HAL_SOFTC sc, 193 HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata, 194 HAL_STATUS *status) 195 { 196 #define N(a) (sizeof(a)/sizeof(a[0])) 197 struct ath_hal_5211 *ahp; 198 struct ath_hal *ah; 199 uint32_t val; 200 uint16_t eeval; 201 HAL_STATUS ecode; 202 203 HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n", 204 __func__, sc, (void*) st, (void*) sh); 205 206 /* NB: memory is returned zero'd */ 207 ahp = ath_hal_malloc(sizeof (struct ath_hal_5211)); 208 if (ahp == AH_NULL) { 209 HALDEBUG(AH_NULL, HAL_DEBUG_ANY, 210 "%s: cannot allocate memory for state block\n", __func__); 211 ecode = HAL_ENOMEM; 212 goto bad; 213 } 214 ah = &ahp->ah_priv.h; 215 /* set initial values */ 216 OS_MEMCPY(&ahp->ah_priv, &ar5211hal, sizeof(struct ath_hal_private)); 217 ah->ah_sc = sc; 218 ah->ah_st = st; 219 ah->ah_sh = sh; 220 221 ah->ah_devid = devid; /* NB: for AH_DEBUG_ALQ */ 222 AH_PRIVATE(ah)->ah_devid = devid; 223 AH_PRIVATE(ah)->ah_subvendorid = 0; /* XXX */ 224 225 AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER; 226 AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX; /* no scaling */ 227 228 ahp->ah_diversityControl = HAL_ANT_VARIABLE; 229 ahp->ah_staId1Defaults = 0; 230 ahp->ah_rssiThr = INIT_RSSI_THR; 231 ahp->ah_sifstime = (u_int) -1; 232 ahp->ah_slottime = (u_int) -1; 233 ahp->ah_acktimeout = (u_int) -1; 234 ahp->ah_ctstimeout = (u_int) -1; 235 236 if (!ar5211ChipReset(ah, AH_NULL)) { /* reset chip */ 237 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__); 238 ecode = HAL_EIO; 239 goto bad; 240 } 241 if (AH_PRIVATE(ah)->ah_devid == AR5211_FPGA11B) { 242 /* set it back to OFDM mode to be able to read analog rev id */ 243 OS_REG_WRITE(ah, AR5211_PHY_MODE, AR5211_PHY_MODE_OFDM); 244 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44); 245 OS_DELAY(1000); 246 } 247 248 /* Read Revisions from Chips */ 249 val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M; 250 AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S; 251 AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION_M; 252 253 if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_MAUI_2 || 254 AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_OAHU) { 255 HALDEBUG(ah, HAL_DEBUG_ANY, 256 "%s: Mac Chip Rev 0x%x is not supported by this driver\n", 257 __func__, AH_PRIVATE(ah)->ah_macVersion); 258 ecode = HAL_ENOTSUPP; 259 goto bad; 260 } 261 262 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID); 263 264 if (!ar5211ChipTest(ah)) { 265 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n", 266 __func__); 267 ecode = HAL_ESELFTEST; 268 goto bad; 269 } 270 271 /* Set correct Baseband to analog shift setting to access analog chips. */ 272 if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU) { 273 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007); 274 } else { 275 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000047); 276 } 277 OS_DELAY(2000); 278 279 /* Read Radio Chip Rev Extract */ 280 AH_PRIVATE(ah)->ah_analog5GhzRev = ar5211GetRadioRev(ah); 281 if ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xf0) != RAD5_SREV_MAJOR) { 282 HALDEBUG(ah, HAL_DEBUG_ANY, 283 "%s: 5G Radio Chip Rev 0x%02X is not supported by this " 284 "driver\n", __func__, AH_PRIVATE(ah)->ah_analog5GhzRev); 285 ecode = HAL_ENOTSUPP; 286 goto bad; 287 } 288 289 val = (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_EEPROM_SIZE_M) >> 290 AR_PCICFG_EEPROM_SIZE_S; 291 if (val != AR_PCICFG_EEPROM_SIZE_16K) { 292 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unsupported EEPROM size " 293 "%u (0x%x) found\n", __func__, val, val); 294 ecode = HAL_EESIZE; 295 goto bad; 296 } 297 ecode = ath_hal_legacyEepromAttach(ah); 298 if (ecode != HAL_OK) { 299 goto bad; 300 } 301 302 /* If Bmode and AR5211, verify 2.4 analog exists */ 303 if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU && 304 ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) { 305 /* Set correct Baseband to analog shift setting to access analog chips. */ 306 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00004007); 307 OS_DELAY(2000); 308 AH_PRIVATE(ah)->ah_analog2GhzRev = ar5211GetRadioRev(ah); 309 310 /* Set baseband for 5GHz chip */ 311 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007); 312 OS_DELAY(2000); 313 if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != RAD2_SREV_MAJOR) { 314 HALDEBUG(ah, HAL_DEBUG_ANY, 315 "%s: 2G Radio Chip Rev 0x%x is not supported by " 316 "this driver\n", __func__, 317 AH_PRIVATE(ah)->ah_analog2GhzRev); 318 ecode = HAL_ENOTSUPP; 319 goto bad; 320 } 321 } else { 322 ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_FALSE); 323 } 324 325 ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval); 326 if (ecode != HAL_OK) { 327 HALDEBUG(ah, HAL_DEBUG_ANY, 328 "%s: cannot read regulatory domain from EEPROM\n", 329 __func__); 330 goto bad; 331 } 332 AH_PRIVATE(ah)->ah_currentRD = eeval; 333 AH_PRIVATE(ah)->ah_getNfAdjust = ar5211GetNfAdjust; 334 335 /* 336 * Got everything we need now to setup the capabilities. 337 */ 338 (void) ar5211FillCapabilityInfo(ah); 339 340 /* Initialize gain ladder thermal calibration structure */ 341 ar5211InitializeGainValues(ah); 342 343 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); 344 if (ecode != HAL_OK) { 345 HALDEBUG(ah, HAL_DEBUG_ANY, 346 "%s: error getting mac address from EEPROM\n", __func__); 347 goto bad; 348 } 349 350 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); 351 352 return ah; 353 bad: 354 if (ahp) 355 ar5211Detach((struct ath_hal *) ahp); 356 if (status) 357 *status = ecode; 358 return AH_NULL; 359 #undef N 360 } 361 362 void 363 ar5211Detach(struct ath_hal *ah) 364 { 365 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__); 366 367 HALASSERT(ah != AH_NULL); 368 HALASSERT(ah->ah_magic == AR5211_MAGIC); 369 370 ath_hal_eepromDetach(ah); 371 ath_hal_free(ah); 372 } 373 374 static HAL_BOOL 375 ar5211ChipTest(struct ath_hal *ah) 376 { 377 uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) }; 378 uint32_t regHold[2]; 379 uint32_t patternData[4] = 380 { 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999 }; 381 int i, j; 382 383 /* Test PHY & MAC registers */ 384 for (i = 0; i < 2; i++) { 385 uint32_t addr = regAddr[i]; 386 uint32_t wrData, rdData; 387 388 regHold[i] = OS_REG_READ(ah, addr); 389 for (j = 0; j < 0x100; j++) { 390 wrData = (j << 16) | j; 391 OS_REG_WRITE(ah, addr, wrData); 392 rdData = OS_REG_READ(ah, addr); 393 if (rdData != wrData) { 394 HALDEBUG(ah, HAL_DEBUG_ANY, 395 "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n", 396 __func__, addr, wrData, rdData); 397 return AH_FALSE; 398 } 399 } 400 for (j = 0; j < 4; j++) { 401 wrData = patternData[j]; 402 OS_REG_WRITE(ah, addr, wrData); 403 rdData = OS_REG_READ(ah, addr); 404 if (wrData != rdData) { 405 HALDEBUG(ah, HAL_DEBUG_ANY, 406 "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n", 407 __func__, addr, wrData, rdData); 408 return AH_FALSE; 409 } 410 } 411 OS_REG_WRITE(ah, regAddr[i], regHold[i]); 412 } 413 OS_DELAY(100); 414 return AH_TRUE; 415 } 416 417 /* 418 * Store the channel edges for the requested operational mode 419 */ 420 static HAL_BOOL 421 ar5211GetChannelEdges(struct ath_hal *ah, 422 uint16_t flags, uint16_t *low, uint16_t *high) 423 { 424 if (flags & IEEE80211_CHAN_5GHZ) { 425 *low = 4920; 426 *high = 6100; 427 return AH_TRUE; 428 } 429 if (flags & IEEE80211_CHAN_2GHZ && 430 ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) { 431 *low = 2312; 432 *high = 2732; 433 return AH_TRUE; 434 } 435 return AH_FALSE; 436 } 437 438 static HAL_BOOL 439 ar5211GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan) 440 { 441 /* XXX fill in, this is just a placeholder */ 442 HALDEBUG(ah, HAL_DEBUG_ATTACH, 443 "%s: no min/max power for %u/0x%x\n", 444 __func__, chan->ic_freq, chan->ic_flags); 445 chan->ic_maxpower = MAX_RATE_POWER; 446 chan->ic_minpower = 0; 447 return AH_TRUE; 448 } 449 450 static void 451 ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore) 452 { 453 } 454 455 static void 456 ar5211DisablePCIE(struct ath_hal *ah) 457 { 458 } 459 460 /* 461 * Fill all software cached or static hardware state information. 462 */ 463 static HAL_BOOL 464 ar5211FillCapabilityInfo(struct ath_hal *ah) 465 { 466 struct ath_hal_private *ahpriv = AH_PRIVATE(ah); 467 HAL_CAPABILITIES *pCap = &ahpriv->ah_caps; 468 469 /* Construct wireless mode from EEPROM */ 470 pCap->halWirelessModes = 0; 471 if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) { 472 pCap->halWirelessModes |= HAL_MODE_11A; 473 if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE)) 474 pCap->halWirelessModes |= HAL_MODE_TURBO; 475 } 476 if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) 477 pCap->halWirelessModes |= HAL_MODE_11B; 478 479 pCap->halLow2GhzChan = 2312; 480 pCap->halHigh2GhzChan = 2732; 481 pCap->halLow5GhzChan = 4920; 482 pCap->halHigh5GhzChan = 6100; 483 484 pCap->halChanSpreadSupport = AH_TRUE; 485 pCap->halSleepAfterBeaconBroken = AH_TRUE; 486 pCap->halPSPollBroken = AH_TRUE; 487 pCap->halVEOLSupport = AH_TRUE; 488 489 pCap->halTotalQueues = HAL_NUM_TX_QUEUES; 490 pCap->halKeyCacheSize = 128; 491 492 /* XXX not needed */ 493 pCap->halChanHalfRate = AH_FALSE; 494 pCap->halChanQuarterRate = AH_FALSE; 495 496 if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) && 497 ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) { 498 /* NB: enabled by default */ 499 ahpriv->ah_rfkillEnabled = AH_TRUE; 500 pCap->halRfSilentSupport = AH_TRUE; 501 } 502 503 pCap->halTstampPrecision = 13; 504 pCap->halIntrMask = HAL_INT_COMMON 505 | HAL_INT_RX 506 | HAL_INT_TX 507 | HAL_INT_FATAL 508 | HAL_INT_BNR 509 | HAL_INT_TIM 510 ; 511 512 pCap->hal4kbSplitTransSupport = AH_TRUE; 513 514 /* XXX might be ok w/ some chip revs */ 515 ahpriv->ah_rxornIsFatal = AH_TRUE; 516 return AH_TRUE; 517 } 518 519 static const char* 520 ar5211Probe(uint16_t vendorid, uint16_t devid) 521 { 522 if (vendorid == ATHEROS_VENDOR_ID) { 523 if (devid == AR5211_DEVID || devid == AR5311_DEVID || 524 devid == AR5211_DEFAULT) 525 return "Atheros 5211"; 526 if (devid == AR5211_FPGA11B) 527 return "Atheros 5211 (FPGA)"; 528 } 529 return AH_NULL; 530 } 531 AH_CHIP(AR5211, ar5211Probe, ar5211Attach); 532