xref: /freebsd/sys/dev/ath/ath_hal/ar5212/ar2413.c (revision 4d846d26)
1 /*-
2  * SPDX-License-Identifier: ISC
3  *
4  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5  * Copyright (c) 2002-2008 Atheros Communications, Inc.
6  *
7  * Permission to use, copy, modify, and/or distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  *
19  * $FreeBSD$
20  */
21 #include "opt_ah.h"
22 
23 #include "ah.h"
24 #include "ah_internal.h"
25 
26 #include "ar5212/ar5212.h"
27 #include "ar5212/ar5212reg.h"
28 #include "ar5212/ar5212phy.h"
29 
30 #include "ah_eeprom_v3.h"
31 
32 #define AH_5212_2413
33 #include "ar5212/ar5212.ini"
34 
35 #define	N(a)	(sizeof(a)/sizeof(a[0]))
36 
37 struct ar2413State {
38 	RF_HAL_FUNCS	base;		/* public state, must be first */
39 	uint16_t	pcdacTable[PWR_TABLE_SIZE_2413];
40 
41 	uint32_t	Bank1Data[N(ar5212Bank1_2413)];
42 	uint32_t	Bank2Data[N(ar5212Bank2_2413)];
43 	uint32_t	Bank3Data[N(ar5212Bank3_2413)];
44 	uint32_t	Bank6Data[N(ar5212Bank6_2413)];
45 	uint32_t	Bank7Data[N(ar5212Bank7_2413)];
46 
47 	/*
48 	 * Private state for reduced stack usage.
49 	 */
50 	/* filled out Vpd table for all pdGains (chanL) */
51 	uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]
52 			    [MAX_PWR_RANGE_IN_HALF_DB];
53 	/* filled out Vpd table for all pdGains (chanR) */
54 	uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]
55 			    [MAX_PWR_RANGE_IN_HALF_DB];
56 	/* filled out Vpd table for all pdGains (interpolated) */
57 	uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]
58 			    [MAX_PWR_RANGE_IN_HALF_DB];
59 };
60 #define	AR2413(ah)	((struct ar2413State *) AH5212(ah)->ah_rfHal)
61 
62 extern	void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
63 		uint32_t numBits, uint32_t firstBit, uint32_t column);
64 
65 static void
66 ar2413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
67 	int writes)
68 {
69 	HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2413, modesIndex, writes);
70 	HAL_INI_WRITE_ARRAY(ah, ar5212Common_2413, 1, writes);
71 	HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2413, freqIndex, writes);
72 }
73 
74 /*
75  * Take the MHz channel value and set the Channel value
76  *
77  * ASSUMES: Writes enabled to analog bus
78  */
79 static HAL_BOOL
80 ar2413SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
81 {
82 	uint16_t freq = ath_hal_gethwchannel(ah, chan);
83 	uint32_t channelSel  = 0;
84 	uint32_t bModeSynth  = 0;
85 	uint32_t aModeRefSel = 0;
86 	uint32_t reg32       = 0;
87 
88 	OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
89 
90 	if (freq < 4800) {
91 		uint32_t txctl;
92 
93 		if (((freq - 2192) % 5) == 0) {
94 			channelSel = ((freq - 672) * 2 - 3040)/10;
95 			bModeSynth = 0;
96 		} else if (((freq - 2224) % 5) == 0) {
97 			channelSel = ((freq - 704) * 2 - 3040) / 10;
98 			bModeSynth = 1;
99 		} else {
100 			HALDEBUG(ah, HAL_DEBUG_ANY,
101 			    "%s: invalid channel %u MHz\n",
102 			    __func__, freq);
103 			return AH_FALSE;
104 		}
105 
106 		channelSel = (channelSel << 2) & 0xff;
107 		channelSel = ath_hal_reverseBits(channelSel, 8);
108 
109 		txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
110 		if (freq == 2484) {
111 			/* Enable channel spreading for channel 14 */
112 			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
113 				txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
114 		} else {
115 			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
116 				txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
117 		}
118 	} else if (((freq % 5) == 2) && (freq <= 5435)) {
119 		freq = freq - 2; /* Align to even 5MHz raster */
120 		channelSel = ath_hal_reverseBits(
121 			(uint32_t)(((freq - 4800)*10)/25 + 1), 8);
122             	aModeRefSel = ath_hal_reverseBits(0, 2);
123 	} else if ((freq % 20) == 0 && freq >= 5120) {
124 		channelSel = ath_hal_reverseBits(
125 			((freq - 4800) / 20 << 2), 8);
126 		aModeRefSel = ath_hal_reverseBits(3, 2);
127 	} else if ((freq % 10) == 0) {
128 		channelSel = ath_hal_reverseBits(
129 			((freq - 4800) / 10 << 1), 8);
130 		aModeRefSel = ath_hal_reverseBits(2, 2);
131 	} else if ((freq % 5) == 0) {
132 		channelSel = ath_hal_reverseBits(
133 			(freq - 4800) / 5, 8);
134 		aModeRefSel = ath_hal_reverseBits(1, 2);
135 	} else {
136 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
137 		    __func__, freq);
138 		return AH_FALSE;
139 	}
140 
141 	reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
142 			(1 << 12) | 0x1;
143 	OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
144 
145 	reg32 >>= 8;
146 	OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
147 
148 	AH_PRIVATE(ah)->ah_curchan = chan;
149 
150 	return AH_TRUE;
151 }
152 
153 /*
154  * Reads EEPROM header info from device structure and programs
155  * all rf registers
156  *
157  * REQUIRES: Access to the analog rf device
158  */
159 static HAL_BOOL
160 ar2413SetRfRegs(struct ath_hal *ah,
161 	const struct ieee80211_channel *chan,
162 	uint16_t modesIndex, uint16_t *rfXpdGain)
163 {
164 #define	RF_BANK_SETUP(_priv, _ix, _col) do {				    \
165 	int i;								    \
166 	for (i = 0; i < N(ar5212Bank##_ix##_2413); i++)			    \
167 		(_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2413[i][_col];\
168 } while (0)
169 	struct ath_hal_5212 *ahp = AH5212(ah);
170 	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
171 	uint16_t ob2GHz = 0, db2GHz = 0;
172 	struct ar2413State *priv = AR2413(ah);
173 	int regWrites = 0;
174 
175 	HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
176 	    __func__, chan->ic_freq, chan->ic_flags, modesIndex);
177 
178 	HALASSERT(priv);
179 
180 	/* Setup rf parameters */
181 	if (IEEE80211_IS_CHAN_B(chan)) {
182 		ob2GHz = ee->ee_obFor24;
183 		db2GHz = ee->ee_dbFor24;
184 	} else {
185 		ob2GHz = ee->ee_obFor24g;
186 		db2GHz = ee->ee_dbFor24g;
187 	}
188 
189 	/* Bank 1 Write */
190 	RF_BANK_SETUP(priv, 1, 1);
191 
192 	/* Bank 2 Write */
193 	RF_BANK_SETUP(priv, 2, modesIndex);
194 
195 	/* Bank 3 Write */
196 	RF_BANK_SETUP(priv, 3, modesIndex);
197 
198 	/* Bank 6 Write */
199 	RF_BANK_SETUP(priv, 6, modesIndex);
200 
201 	ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz,   3, 168, 0);
202 	ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz,   3, 165, 0);
203 
204 	/* Bank 7 Setup */
205 	RF_BANK_SETUP(priv, 7, modesIndex);
206 
207 	/* Write Analog registers */
208 	HAL_INI_WRITE_BANK(ah, ar5212Bank1_2413, priv->Bank1Data, regWrites);
209 	HAL_INI_WRITE_BANK(ah, ar5212Bank2_2413, priv->Bank2Data, regWrites);
210 	HAL_INI_WRITE_BANK(ah, ar5212Bank3_2413, priv->Bank3Data, regWrites);
211 	HAL_INI_WRITE_BANK(ah, ar5212Bank6_2413, priv->Bank6Data, regWrites);
212 	HAL_INI_WRITE_BANK(ah, ar5212Bank7_2413, priv->Bank7Data, regWrites);
213 
214 	/* Now that we have reprogrammed rfgain value, clear the flag. */
215 	ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
216 
217 	return AH_TRUE;
218 #undef	RF_BANK_SETUP
219 }
220 
221 /*
222  * Return a reference to the requested RF Bank.
223  */
224 static uint32_t *
225 ar2413GetRfBank(struct ath_hal *ah, int bank)
226 {
227 	struct ar2413State *priv = AR2413(ah);
228 
229 	HALASSERT(priv != AH_NULL);
230 	switch (bank) {
231 	case 1: return priv->Bank1Data;
232 	case 2: return priv->Bank2Data;
233 	case 3: return priv->Bank3Data;
234 	case 6: return priv->Bank6Data;
235 	case 7: return priv->Bank7Data;
236 	}
237 	HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
238 	    __func__, bank);
239 	return AH_NULL;
240 }
241 
242 /*
243  * Return indices surrounding the value in sorted integer lists.
244  *
245  * NB: the input list is assumed to be sorted in ascending order
246  */
247 static void
248 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
249                           uint32_t *vlo, uint32_t *vhi)
250 {
251 	int16_t target = v;
252 	const uint16_t *ep = lp+listSize;
253 	const uint16_t *tp;
254 
255 	/*
256 	 * Check first and last elements for out-of-bounds conditions.
257 	 */
258 	if (target < lp[0]) {
259 		*vlo = *vhi = 0;
260 		return;
261 	}
262 	if (target >= ep[-1]) {
263 		*vlo = *vhi = listSize - 1;
264 		return;
265 	}
266 
267 	/* look for value being near or between 2 values in list */
268 	for (tp = lp; tp < ep; tp++) {
269 		/*
270 		 * If value is close to the current value of the list
271 		 * then target is not between values, it is one of the values
272 		 */
273 		if (*tp == target) {
274 			*vlo = *vhi = tp - (const uint16_t *) lp;
275 			return;
276 		}
277 		/*
278 		 * Look for value being between current value and next value
279 		 * if so return these 2 values
280 		 */
281 		if (target < tp[1]) {
282 			*vlo = tp - (const uint16_t *) lp;
283 			*vhi = *vlo + 1;
284 			return;
285 		}
286 	}
287 }
288 
289 /*
290  * Fill the Vpdlist for indices Pmax-Pmin
291  */
292 static HAL_BOOL
293 ar2413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t  Pmax,
294 		   const int16_t *pwrList, const uint16_t *VpdList,
295 		   uint16_t numIntercepts, uint16_t retVpdList[][64])
296 {
297 	uint16_t ii, jj, kk;
298 	int16_t currPwr = (int16_t)(2*Pmin);
299 	/* since Pmin is pwr*2 and pwrList is 4*pwr */
300 	uint32_t  idxL, idxR;
301 
302 	ii = 0;
303 	jj = 0;
304 
305 	if (numIntercepts < 2)
306 		return AH_FALSE;
307 
308 	while (ii <= (uint16_t)(Pmax - Pmin)) {
309 		GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,
310 				   numIntercepts, &(idxL), &(idxR));
311 		if (idxR < 1)
312 			idxR = 1;			/* extrapolate below */
313 		if (idxL == (uint32_t)(numIntercepts - 1))
314 			idxL = numIntercepts - 2;	/* extrapolate above */
315 		if (pwrList[idxL] == pwrList[idxR])
316 			kk = VpdList[idxL];
317 		else
318 			kk = (uint16_t)
319 				(((currPwr - pwrList[idxL])*VpdList[idxR]+
320 				  (pwrList[idxR] - currPwr)*VpdList[idxL])/
321 				 (pwrList[idxR] - pwrList[idxL]));
322 		retVpdList[pdGainIdx][ii] = kk;
323 		ii++;
324 		currPwr += 2;				/* half dB steps */
325 	}
326 
327 	return AH_TRUE;
328 }
329 
330 /*
331  * Returns interpolated or the scaled up interpolated value
332  */
333 static int16_t
334 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
335 	int16_t targetLeft, int16_t targetRight)
336 {
337 	int16_t rv;
338 
339 	if (srcRight != srcLeft) {
340 		rv = ((target - srcLeft)*targetRight +
341 		      (srcRight - target)*targetLeft) / (srcRight - srcLeft);
342 	} else {
343 		rv = targetLeft;
344 	}
345 	return rv;
346 }
347 
348 /*
349  * Uses the data points read from EEPROM to reconstruct the pdadc power table
350  * Called by ar2413SetPowerTable()
351  */
352 static int
353 ar2413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
354 		const RAW_DATA_STRUCT_2413 *pRawDataset,
355 		uint16_t pdGainOverlap_t2,
356 		int16_t  *pMinCalPower, uint16_t pPdGainBoundaries[],
357 		uint16_t pPdGainValues[], uint16_t pPDADCValues[])
358 {
359 	struct ar2413State *priv = AR2413(ah);
360 #define	VpdTable_L	priv->vpdTable_L
361 #define	VpdTable_R	priv->vpdTable_R
362 #define	VpdTable_I	priv->vpdTable_I
363 	uint32_t ii, jj, kk;
364 	int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
365 	uint32_t idxL, idxR;
366 	uint32_t numPdGainsUsed = 0;
367 	/*
368 	 * If desired to support -ve power levels in future, just
369 	 * change pwr_I_0 to signed 5-bits.
370 	 */
371 	int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
372 	/* to accommodate -ve power levels later on. */
373 	int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
374 	/* to accommodate -ve power levels later on */
375 	uint16_t numVpd = 0;
376 	uint16_t Vpd_step;
377 	int16_t tmpVal ;
378 	uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
379 
380 	/* Get upper lower index */
381 	GetLowerUpperIndex(channel, pRawDataset->pChannels,
382 				 pRawDataset->numChannels, &(idxL), &(idxR));
383 
384 	for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
385 		jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
386 		/* work backwards 'cause highest pdGain for lowest power */
387 		numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
388 		if (numVpd > 0) {
389 			pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
390 			Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
391 			if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
392 				Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
393 			}
394 			Pmin_t2[numPdGainsUsed] = (int16_t)
395 				(Pmin_t2[numPdGainsUsed] / 2);
396 			Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
397 			if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
398 				Pmax_t2[numPdGainsUsed] =
399 					pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
400 			Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
401 			ar2413FillVpdTable(
402 					   numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
403 					   &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
404 					   &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
405 					   );
406 			ar2413FillVpdTable(
407 					   numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
408 					   &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
409 					   &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
410 					   );
411 			for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
412 				VpdTable_I[numPdGainsUsed][kk] =
413 					interpolate_signed(
414 							   channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
415 							   (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
416 			}
417 			/* fill VpdTable_I for this pdGain */
418 			numPdGainsUsed++;
419 		}
420 		/* if this pdGain is used */
421 	}
422 
423 	*pMinCalPower = Pmin_t2[0];
424 	kk = 0; /* index for the final table */
425 	for (ii = 0; ii < numPdGainsUsed; ii++) {
426 		if (ii == (numPdGainsUsed - 1))
427 			pPdGainBoundaries[ii] = Pmax_t2[ii] +
428 				PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
429 		else
430 			pPdGainBoundaries[ii] = (uint16_t)
431 				((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
432 		if (pPdGainBoundaries[ii] > 63) {
433 			HALDEBUG(ah, HAL_DEBUG_ANY,
434 			    "%s: clamp pPdGainBoundaries[%d] %d\n",
435 			    __func__, ii, pPdGainBoundaries[ii]);/*XXX*/
436 			pPdGainBoundaries[ii] = 63;
437 		}
438 
439 		/* Find starting index for this pdGain */
440 		if (ii == 0)
441 			ss = 0; /* for the first pdGain, start from index 0 */
442 		else
443 			ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
444 				pdGainOverlap_t2;
445 		Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
446 		Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
447 		/*
448 		 *-ve ss indicates need to extrapolate data below for this pdGain
449 		 */
450 		while (ss < 0) {
451 			tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
452 			pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
453 			ss++;
454 		}
455 
456 		sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
457 		tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
458 		maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
459 
460 		while (ss < (int16_t)maxIndex)
461 			pPDADCValues[kk++] = VpdTable_I[ii][ss++];
462 
463 		Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
464 				       VpdTable_I[ii][sizeCurrVpdTable-2]);
465 		Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
466 		/*
467 		 * for last gain, pdGainBoundary == Pmax_t2, so will
468 		 * have to extrapolate
469 		 */
470 		if (tgtIndex > maxIndex) {	/* need to extrapolate above */
471 			while(ss < (int16_t)tgtIndex) {
472 				tmpVal = (uint16_t)
473 					(VpdTable_I[ii][sizeCurrVpdTable-1] +
474 					 (ss-maxIndex)*Vpd_step);
475 				pPDADCValues[kk++] = (tmpVal > 127) ?
476 					127 : tmpVal;
477 				ss++;
478 			}
479 		}				/* extrapolated above */
480 	}					/* for all pdGainUsed */
481 
482 	while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
483 		pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
484 		ii++;
485 	}
486 	while (kk < 128) {
487 		pPDADCValues[kk] = pPDADCValues[kk-1];
488 		kk++;
489 	}
490 
491 	return numPdGainsUsed;
492 #undef VpdTable_L
493 #undef VpdTable_R
494 #undef VpdTable_I
495 }
496 
497 static HAL_BOOL
498 ar2413SetPowerTable(struct ath_hal *ah,
499 	int16_t *minPower, int16_t *maxPower,
500 	const struct ieee80211_channel *chan,
501 	uint16_t *rfXpdGain)
502 {
503 	uint16_t freq = ath_hal_gethwchannel(ah, chan);
504 	struct ath_hal_5212 *ahp = AH5212(ah);
505 	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
506 	const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
507 	uint16_t pdGainOverlap_t2;
508 	int16_t minCalPower2413_t2;
509 	uint16_t *pdadcValues = ahp->ah_pcdacTable;
510 	uint16_t gainBoundaries[4];
511 	uint32_t reg32, regoffset;
512 	int i, numPdGainsUsed;
513 #ifndef AH_USE_INIPDGAIN
514 	uint32_t tpcrg1;
515 #endif
516 
517 	HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
518 	    __func__, freq, chan->ic_flags);
519 
520 	if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
521 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
522 	else if (IEEE80211_IS_CHAN_B(chan))
523 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
524 	else {
525 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__);
526 		return AH_FALSE;
527 	}
528 
529 	pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
530 					  AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
531 
532 	numPdGainsUsed = ar2413getGainBoundariesAndPdadcsForPowers(ah,
533 		freq, pRawDataset, pdGainOverlap_t2,
534 		&minCalPower2413_t2,gainBoundaries, rfXpdGain, pdadcValues);
535 	HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
536 
537 #ifdef AH_USE_INIPDGAIN
538 	/*
539 	 * Use pd_gains curve from eeprom; Atheros always uses
540 	 * the default curve from the ini file but some vendors
541 	 * (e.g. Zcomax) want to override this curve and not
542 	 * honoring their settings results in tx power 5dBm low.
543 	 */
544 	OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
545 			 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
546 #else
547 	tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
548 	tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
549 		  | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
550 	switch (numPdGainsUsed) {
551 	case 3:
552 		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
553 		tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
554 		/* fall thru... */
555 	case 2:
556 		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
557 		tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
558 		/* fall thru... */
559 	case 1:
560 		tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
561 		tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
562 		break;
563 	}
564 #ifdef AH_DEBUG
565 	if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
566 		HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
567 		    "pd_gains (default 0x%x, calculated 0x%x)\n",
568 		    __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
569 #endif
570 	OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
571 #endif
572 
573 	/*
574 	 * Note the pdadc table may not start at 0 dBm power, could be
575 	 * negative or greater than 0.  Need to offset the power
576 	 * values by the amount of minPower for griffin
577 	 */
578 	if (minCalPower2413_t2 != 0)
579 		ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2413_t2);
580 	else
581 		ahp->ah_txPowerIndexOffset = 0;
582 
583 	/* Finally, write the power values into the baseband power table */
584 	regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
585 	for (i = 0; i < 32; i++) {
586 		reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0)  |
587 			((pdadcValues[4*i + 1] & 0xFF) << 8)  |
588 			((pdadcValues[4*i + 2] & 0xFF) << 16) |
589 			((pdadcValues[4*i + 3] & 0xFF) << 24) ;
590 		OS_REG_WRITE(ah, regoffset, reg32);
591 		regoffset += 4;
592 	}
593 
594 	OS_REG_WRITE(ah, AR_PHY_TPCRG5,
595 		     SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
596 		     SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
597 		     SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
598 		     SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
599 		     SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
600 
601 	return AH_TRUE;
602 }
603 
604 static int16_t
605 ar2413GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
606 {
607 	uint32_t ii,jj;
608 	uint16_t Pmin=0,numVpd;
609 
610 	for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
611 		jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
612 		/* work backwards 'cause highest pdGain for lowest power */
613 		numVpd = data->pDataPerPDGain[jj].numVpd;
614 		if (numVpd > 0) {
615 			Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
616 			return(Pmin);
617 		}
618 	}
619 	return(Pmin);
620 }
621 
622 static int16_t
623 ar2413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
624 {
625 	uint32_t ii;
626 	uint16_t Pmax=0,numVpd;
627 
628 	for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
629 		/* work forwards cuase lowest pdGain for highest power */
630 		numVpd = data->pDataPerPDGain[ii].numVpd;
631 		if (numVpd > 0) {
632 			Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
633 			return(Pmax);
634 		}
635 	}
636 	return(Pmax);
637 }
638 
639 static HAL_BOOL
640 ar2413GetChannelMaxMinPower(struct ath_hal *ah,
641 	const struct ieee80211_channel *chan,
642 	int16_t *maxPow, int16_t *minPow)
643 {
644 	uint16_t freq = chan->ic_freq;		/* NB: never mapped */
645 	const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
646 	const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
647 	const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL;
648 	uint16_t numChannels;
649 	int totalD,totalF, totalMin,last, i;
650 
651 	*maxPow = 0;
652 
653 	if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
654 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
655 	else if (IEEE80211_IS_CHAN_B(chan))
656 		pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
657 	else
658 		return(AH_FALSE);
659 
660 	numChannels = pRawDataset->numChannels;
661 	data = pRawDataset->pDataPerChannel;
662 
663 	/* Make sure the channel is in the range of the TP values
664 	 *  (freq piers)
665 	 */
666 	if (numChannels < 1)
667 		return(AH_FALSE);
668 
669 	if ((freq < data[0].channelValue) ||
670 	    (freq > data[numChannels-1].channelValue)) {
671 		if (freq < data[0].channelValue) {
672 			*maxPow = ar2413GetMaxPower(ah, &data[0]);
673 			*minPow = ar2413GetMinPower(ah, &data[0]);
674 			return(AH_TRUE);
675 		} else {
676 			*maxPow = ar2413GetMaxPower(ah, &data[numChannels - 1]);
677 			*minPow = ar2413GetMinPower(ah, &data[numChannels - 1]);
678 			return(AH_TRUE);
679 		}
680 	}
681 
682 	/* Linearly interpolate the power value now */
683 	for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);
684 	     last = i++);
685 	totalD = data[i].channelValue - data[last].channelValue;
686 	if (totalD > 0) {
687 		totalF = ar2413GetMaxPower(ah, &data[i]) - ar2413GetMaxPower(ah, &data[last]);
688 		*maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +
689 				     ar2413GetMaxPower(ah, &data[last])*totalD)/totalD);
690 		totalMin = ar2413GetMinPower(ah, &data[i]) - ar2413GetMinPower(ah, &data[last]);
691 		*minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +
692 				     ar2413GetMinPower(ah, &data[last])*totalD)/totalD);
693 		return(AH_TRUE);
694 	} else {
695 		if (freq == data[i].channelValue) {
696 			*maxPow = ar2413GetMaxPower(ah, &data[i]);
697 			*minPow = ar2413GetMinPower(ah, &data[i]);
698 			return(AH_TRUE);
699 		} else
700 			return(AH_FALSE);
701 	}
702 }
703 
704 /*
705  * Free memory for analog bank scratch buffers
706  */
707 static void
708 ar2413RfDetach(struct ath_hal *ah)
709 {
710 	struct ath_hal_5212 *ahp = AH5212(ah);
711 
712 	HALASSERT(ahp->ah_rfHal != AH_NULL);
713 	ath_hal_free(ahp->ah_rfHal);
714 	ahp->ah_rfHal = AH_NULL;
715 }
716 
717 /*
718  * Allocate memory for analog bank scratch buffers
719  * Scratch Buffer will be reinitialized every reset so no need to zero now
720  */
721 static HAL_BOOL
722 ar2413RfAttach(struct ath_hal *ah, HAL_STATUS *status)
723 {
724 	struct ath_hal_5212 *ahp = AH5212(ah);
725 	struct ar2413State *priv;
726 
727 	HALASSERT(ah->ah_magic == AR5212_MAGIC);
728 
729 	HALASSERT(ahp->ah_rfHal == AH_NULL);
730 	priv = ath_hal_malloc(sizeof(struct ar2413State));
731 	if (priv == AH_NULL) {
732 		HALDEBUG(ah, HAL_DEBUG_ANY,
733 		    "%s: cannot allocate private state\n", __func__);
734 		*status = HAL_ENOMEM;		/* XXX */
735 		return AH_FALSE;
736 	}
737 	priv->base.rfDetach		= ar2413RfDetach;
738 	priv->base.writeRegs		= ar2413WriteRegs;
739 	priv->base.getRfBank		= ar2413GetRfBank;
740 	priv->base.setChannel		= ar2413SetChannel;
741 	priv->base.setRfRegs		= ar2413SetRfRegs;
742 	priv->base.setPowerTable	= ar2413SetPowerTable;
743 	priv->base.getChannelMaxMinPower = ar2413GetChannelMaxMinPower;
744 	priv->base.getNfAdjust		= ar5212GetNfAdjust;
745 
746 	ahp->ah_pcdacTable = priv->pcdacTable;
747 	ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
748 	ahp->ah_rfHal = &priv->base;
749 
750 	return AH_TRUE;
751 }
752 
753 static HAL_BOOL
754 ar2413Probe(struct ath_hal *ah)
755 {
756 	return IS_2413(ah);
757 }
758 AH_RF(RF2413, ar2413Probe, ar2413RfAttach);
759