1204582f2SAdrian Chadd /* 2204582f2SAdrian Chadd * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting 3204582f2SAdrian Chadd * Copyright (c) 2008 Atheros Communications, Inc. 4204582f2SAdrian Chadd * 5204582f2SAdrian Chadd * Permission to use, copy, modify, and/or distribute this software for any 6204582f2SAdrian Chadd * purpose with or without fee is hereby granted, provided that the above 7204582f2SAdrian Chadd * copyright notice and this permission notice appear in all copies. 8204582f2SAdrian Chadd * 9204582f2SAdrian Chadd * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10204582f2SAdrian Chadd * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11204582f2SAdrian Chadd * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12204582f2SAdrian Chadd * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13204582f2SAdrian Chadd * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14204582f2SAdrian Chadd * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15204582f2SAdrian Chadd * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16204582f2SAdrian Chadd * 17204582f2SAdrian Chadd * $FreeBSD$ 18204582f2SAdrian Chadd */ 19204582f2SAdrian Chadd #include "opt_ah.h" 20204582f2SAdrian Chadd 21204582f2SAdrian Chadd /* 22204582f2SAdrian Chadd * NB: Merlin and later have a simpler RF backend. 23204582f2SAdrian Chadd */ 24204582f2SAdrian Chadd #include "ah.h" 25204582f2SAdrian Chadd #include "ah_internal.h" 26204582f2SAdrian Chadd 27204582f2SAdrian Chadd #include "ah_eeprom_v14.h" 28204582f2SAdrian Chadd 29204582f2SAdrian Chadd #include "ar9002/ar9280.h" 30204582f2SAdrian Chadd #include "ar5416/ar5416reg.h" 31204582f2SAdrian Chadd #include "ar5416/ar5416phy.h" 32204582f2SAdrian Chadd 33204582f2SAdrian Chadd #define N(a) (sizeof(a)/sizeof(a[0])) 34204582f2SAdrian Chadd 35204582f2SAdrian Chadd struct ar9280State { 36204582f2SAdrian Chadd RF_HAL_FUNCS base; /* public state, must be first */ 37204582f2SAdrian Chadd uint16_t pcdacTable[1]; /* XXX */ 38204582f2SAdrian Chadd }; 39204582f2SAdrian Chadd #define AR9280(ah) ((struct ar9280State *) AH5212(ah)->ah_rfHal) 40204582f2SAdrian Chadd 41204582f2SAdrian Chadd static HAL_BOOL ar9280GetChannelMaxMinPower(struct ath_hal *, 42204582f2SAdrian Chadd const struct ieee80211_channel *, int16_t *maxPow,int16_t *minPow); 43204582f2SAdrian Chadd int16_t ar9280GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c); 44204582f2SAdrian Chadd 45204582f2SAdrian Chadd static void 46204582f2SAdrian Chadd ar9280WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 47204582f2SAdrian Chadd int writes) 48204582f2SAdrian Chadd { 49204582f2SAdrian Chadd (void) ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_bb_rfgain, 50204582f2SAdrian Chadd freqIndex, writes); 51204582f2SAdrian Chadd } 52204582f2SAdrian Chadd 53204582f2SAdrian Chadd /* 54204582f2SAdrian Chadd * Take the MHz channel value and set the Channel value 55204582f2SAdrian Chadd * 56204582f2SAdrian Chadd * ASSUMES: Writes enabled to analog bus 57204582f2SAdrian Chadd * 58204582f2SAdrian Chadd * Actual Expression, 59204582f2SAdrian Chadd * 60204582f2SAdrian Chadd * For 2GHz channel, 61204582f2SAdrian Chadd * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) 62204582f2SAdrian Chadd * (freq_ref = 40MHz) 63204582f2SAdrian Chadd * 64204582f2SAdrian Chadd * For 5GHz channel, 65204582f2SAdrian Chadd * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10) 66204582f2SAdrian Chadd * (freq_ref = 40MHz/(24>>amodeRefSel)) 67204582f2SAdrian Chadd * 68204582f2SAdrian Chadd * For 5GHz channels which are 5MHz spaced, 69204582f2SAdrian Chadd * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) 70204582f2SAdrian Chadd * (freq_ref = 40MHz) 71204582f2SAdrian Chadd */ 72204582f2SAdrian Chadd static HAL_BOOL 73204582f2SAdrian Chadd ar9280SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) 74204582f2SAdrian Chadd { 75204582f2SAdrian Chadd uint16_t bMode, fracMode, aModeRefSel = 0; 76204582f2SAdrian Chadd uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; 77204582f2SAdrian Chadd CHAN_CENTERS centers; 78204582f2SAdrian Chadd uint32_t refDivA = 24; 79204582f2SAdrian Chadd 80204582f2SAdrian Chadd OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq); 81204582f2SAdrian Chadd 82204582f2SAdrian Chadd ar5416GetChannelCenters(ah, chan, ¢ers); 83204582f2SAdrian Chadd freq = centers.synth_center; 84204582f2SAdrian Chadd 85204582f2SAdrian Chadd reg32 = OS_REG_READ(ah, AR_PHY_SYNTH_CONTROL); 86204582f2SAdrian Chadd reg32 &= 0xc0000000; 87204582f2SAdrian Chadd 88204582f2SAdrian Chadd if (freq < 4800) { /* 2 GHz, fractional mode */ 89204582f2SAdrian Chadd uint32_t txctl; 90204582f2SAdrian Chadd 91204582f2SAdrian Chadd bMode = 1; 92204582f2SAdrian Chadd fracMode = 1; 93204582f2SAdrian Chadd aModeRefSel = 0; 94204582f2SAdrian Chadd channelSel = (freq * 0x10000)/15; 95204582f2SAdrian Chadd 96204582f2SAdrian Chadd txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 97204582f2SAdrian Chadd if (freq == 2484) { 98204582f2SAdrian Chadd /* Enable channel spreading for channel 14 */ 99204582f2SAdrian Chadd OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 100204582f2SAdrian Chadd txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 101204582f2SAdrian Chadd } else { 102204582f2SAdrian Chadd OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 103204582f2SAdrian Chadd txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 104204582f2SAdrian Chadd } 105204582f2SAdrian Chadd } else { 106204582f2SAdrian Chadd bMode = 0; 107204582f2SAdrian Chadd fracMode = 0; 108204582f2SAdrian Chadd 109204582f2SAdrian Chadd if ((freq % 20) == 0) { 110204582f2SAdrian Chadd aModeRefSel = 3; 111204582f2SAdrian Chadd } else if ((freq % 10) == 0) { 112204582f2SAdrian Chadd aModeRefSel = 2; 113204582f2SAdrian Chadd } else { 114204582f2SAdrian Chadd aModeRefSel = 0; 115204582f2SAdrian Chadd /* Enable 2G (fractional) mode for channels which are 5MHz spaced */ 116204582f2SAdrian Chadd fracMode = 1; 117204582f2SAdrian Chadd refDivA = 1; 118204582f2SAdrian Chadd channelSel = (freq * 0x8000)/15; 119204582f2SAdrian Chadd 120204582f2SAdrian Chadd /* RefDivA setting */ 121204582f2SAdrian Chadd OS_REG_RMW_FIELD(ah, AR_AN_SYNTH9, 122204582f2SAdrian Chadd AR_AN_SYNTH9_REFDIVA, refDivA); 123204582f2SAdrian Chadd } 124204582f2SAdrian Chadd if (!fracMode) { 125204582f2SAdrian Chadd ndiv = (freq * (refDivA >> aModeRefSel))/60; 126204582f2SAdrian Chadd channelSel = ndiv & 0x1ff; 127204582f2SAdrian Chadd channelFrac = (ndiv & 0xfffffe00) * 2; 128204582f2SAdrian Chadd channelSel = (channelSel << 17) | channelFrac; 129204582f2SAdrian Chadd } 130204582f2SAdrian Chadd } 131204582f2SAdrian Chadd 132204582f2SAdrian Chadd reg32 = reg32 | (bMode << 29) | (fracMode << 28) | 133204582f2SAdrian Chadd (aModeRefSel << 26) | (channelSel); 134204582f2SAdrian Chadd 135204582f2SAdrian Chadd OS_REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32); 136204582f2SAdrian Chadd 137204582f2SAdrian Chadd AH_PRIVATE(ah)->ah_curchan = chan; 138204582f2SAdrian Chadd 139204582f2SAdrian Chadd return AH_TRUE; 140204582f2SAdrian Chadd } 141204582f2SAdrian Chadd 142204582f2SAdrian Chadd /* 143204582f2SAdrian Chadd * Return a reference to the requested RF Bank. 144204582f2SAdrian Chadd */ 145204582f2SAdrian Chadd static uint32_t * 146204582f2SAdrian Chadd ar9280GetRfBank(struct ath_hal *ah, int bank) 147204582f2SAdrian Chadd { 148204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 149204582f2SAdrian Chadd __func__, bank); 150204582f2SAdrian Chadd return AH_NULL; 151204582f2SAdrian Chadd } 152204582f2SAdrian Chadd 153204582f2SAdrian Chadd /* 154204582f2SAdrian Chadd * Reads EEPROM header info from device structure and programs 155204582f2SAdrian Chadd * all rf registers 156204582f2SAdrian Chadd */ 157204582f2SAdrian Chadd static HAL_BOOL 158204582f2SAdrian Chadd ar9280SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, 159204582f2SAdrian Chadd uint16_t modesIndex, uint16_t *rfXpdGain) 160204582f2SAdrian Chadd { 161204582f2SAdrian Chadd return AH_TRUE; /* nothing to do */ 162204582f2SAdrian Chadd } 163204582f2SAdrian Chadd 164204582f2SAdrian Chadd /* 165204582f2SAdrian Chadd * Read the transmit power levels from the structures taken from EEPROM 166204582f2SAdrian Chadd * Interpolate read transmit power values for this channel 167204582f2SAdrian Chadd * Organize the transmit power values into a table for writing into the hardware 168204582f2SAdrian Chadd */ 169204582f2SAdrian Chadd 170204582f2SAdrian Chadd static HAL_BOOL 171204582f2SAdrian Chadd ar9280SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax, 172204582f2SAdrian Chadd const struct ieee80211_channel *chan, uint16_t *rfXpdGain) 173204582f2SAdrian Chadd { 174204582f2SAdrian Chadd return AH_TRUE; 175204582f2SAdrian Chadd } 176204582f2SAdrian Chadd 177204582f2SAdrian Chadd #if 0 178204582f2SAdrian Chadd static int16_t 179204582f2SAdrian Chadd ar9280GetMinPower(struct ath_hal *ah, EXPN_DATA_PER_CHANNEL_5112 *data) 180204582f2SAdrian Chadd { 181204582f2SAdrian Chadd int i, minIndex; 182204582f2SAdrian Chadd int16_t minGain,minPwr,minPcdac,retVal; 183204582f2SAdrian Chadd 184204582f2SAdrian Chadd /* Assume NUM_POINTS_XPD0 > 0 */ 185204582f2SAdrian Chadd minGain = data->pDataPerXPD[0].xpd_gain; 186204582f2SAdrian Chadd for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) { 187204582f2SAdrian Chadd if (data->pDataPerXPD[i].xpd_gain < minGain) { 188204582f2SAdrian Chadd minIndex = i; 189204582f2SAdrian Chadd minGain = data->pDataPerXPD[i].xpd_gain; 190204582f2SAdrian Chadd } 191204582f2SAdrian Chadd } 192204582f2SAdrian Chadd minPwr = data->pDataPerXPD[minIndex].pwr_t4[0]; 193204582f2SAdrian Chadd minPcdac = data->pDataPerXPD[minIndex].pcdac[0]; 194204582f2SAdrian Chadd for (i=1; i<NUM_POINTS_XPD0; i++) { 195204582f2SAdrian Chadd if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) { 196204582f2SAdrian Chadd minPwr = data->pDataPerXPD[minIndex].pwr_t4[i]; 197204582f2SAdrian Chadd minPcdac = data->pDataPerXPD[minIndex].pcdac[i]; 198204582f2SAdrian Chadd } 199204582f2SAdrian Chadd } 200204582f2SAdrian Chadd retVal = minPwr - (minPcdac*2); 201204582f2SAdrian Chadd return(retVal); 202204582f2SAdrian Chadd } 203204582f2SAdrian Chadd #endif 204204582f2SAdrian Chadd 205204582f2SAdrian Chadd static HAL_BOOL 206204582f2SAdrian Chadd ar9280GetChannelMaxMinPower(struct ath_hal *ah, 207204582f2SAdrian Chadd const struct ieee80211_channel *chan, 208204582f2SAdrian Chadd int16_t *maxPow, int16_t *minPow) 209204582f2SAdrian Chadd { 210204582f2SAdrian Chadd #if 0 211204582f2SAdrian Chadd struct ath_hal_5212 *ahp = AH5212(ah); 212204582f2SAdrian Chadd int numChannels=0,i,last; 213204582f2SAdrian Chadd int totalD, totalF,totalMin; 214204582f2SAdrian Chadd EXPN_DATA_PER_CHANNEL_5112 *data=AH_NULL; 215204582f2SAdrian Chadd EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL; 216204582f2SAdrian Chadd 217204582f2SAdrian Chadd *maxPow = 0; 218204582f2SAdrian Chadd if (IS_CHAN_A(chan)) { 219204582f2SAdrian Chadd powerArray = ahp->ah_modePowerArray5112; 220204582f2SAdrian Chadd data = powerArray[headerInfo11A].pDataPerChannel; 221204582f2SAdrian Chadd numChannels = powerArray[headerInfo11A].numChannels; 222204582f2SAdrian Chadd } else if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) { 223204582f2SAdrian Chadd /* XXX - is this correct? Should we also use the same power for turbo G? */ 224204582f2SAdrian Chadd powerArray = ahp->ah_modePowerArray5112; 225204582f2SAdrian Chadd data = powerArray[headerInfo11G].pDataPerChannel; 226204582f2SAdrian Chadd numChannels = powerArray[headerInfo11G].numChannels; 227204582f2SAdrian Chadd } else if (IS_CHAN_B(chan)) { 228204582f2SAdrian Chadd powerArray = ahp->ah_modePowerArray5112; 229204582f2SAdrian Chadd data = powerArray[headerInfo11B].pDataPerChannel; 230204582f2SAdrian Chadd numChannels = powerArray[headerInfo11B].numChannels; 231204582f2SAdrian Chadd } else { 232204582f2SAdrian Chadd return (AH_TRUE); 233204582f2SAdrian Chadd } 234204582f2SAdrian Chadd /* Make sure the channel is in the range of the TP values 235204582f2SAdrian Chadd * (freq piers) 236204582f2SAdrian Chadd */ 237204582f2SAdrian Chadd if ((numChannels < 1) || 238204582f2SAdrian Chadd (chan->channel < data[0].channelValue) || 239204582f2SAdrian Chadd (chan->channel > data[numChannels-1].channelValue)) 240204582f2SAdrian Chadd return(AH_FALSE); 241204582f2SAdrian Chadd 242204582f2SAdrian Chadd /* Linearly interpolate the power value now */ 243204582f2SAdrian Chadd for (last=0,i=0; 244204582f2SAdrian Chadd (i<numChannels) && (chan->channel > data[i].channelValue); 245204582f2SAdrian Chadd last=i++); 246204582f2SAdrian Chadd totalD = data[i].channelValue - data[last].channelValue; 247204582f2SAdrian Chadd if (totalD > 0) { 248204582f2SAdrian Chadd totalF = data[i].maxPower_t4 - data[last].maxPower_t4; 249204582f2SAdrian Chadd *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD); 250204582f2SAdrian Chadd 251204582f2SAdrian Chadd totalMin = ar9280GetMinPower(ah,&data[i]) - ar9280GetMinPower(ah, &data[last]); 252204582f2SAdrian Chadd *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + ar9280GetMinPower(ah, &data[last])*totalD)/totalD); 253204582f2SAdrian Chadd return (AH_TRUE); 254204582f2SAdrian Chadd } else { 255204582f2SAdrian Chadd if (chan->channel == data[i].channelValue) { 256204582f2SAdrian Chadd *maxPow = data[i].maxPower_t4; 257204582f2SAdrian Chadd *minPow = ar9280GetMinPower(ah, &data[i]); 258204582f2SAdrian Chadd return(AH_TRUE); 259204582f2SAdrian Chadd } else 260204582f2SAdrian Chadd return(AH_FALSE); 261204582f2SAdrian Chadd } 262204582f2SAdrian Chadd #else 263204582f2SAdrian Chadd *maxPow = *minPow = 0; 264204582f2SAdrian Chadd return AH_FALSE; 265204582f2SAdrian Chadd #endif 266204582f2SAdrian Chadd } 267204582f2SAdrian Chadd 268204582f2SAdrian Chadd static void 269204582f2SAdrian Chadd ar9280GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[]) 270204582f2SAdrian Chadd { 271204582f2SAdrian Chadd int16_t nf; 272204582f2SAdrian Chadd 273204582f2SAdrian Chadd nf = MS(OS_REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR); 274204582f2SAdrian Chadd if (nf & 0x100) 275204582f2SAdrian Chadd nf = 0 - ((nf ^ 0x1ff) + 1); 276204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_NFCAL, 277204582f2SAdrian Chadd "NF calibrated [ctl] [chain 0] is %d\n", nf); 278204582f2SAdrian Chadd nfarray[0] = nf; 279204582f2SAdrian Chadd 280204582f2SAdrian Chadd nf = MS(OS_REG_READ(ah, AR_PHY_CH1_CCA), AR9280_PHY_CH1_MINCCA_PWR); 281204582f2SAdrian Chadd if (nf & 0x100) 282204582f2SAdrian Chadd nf = 0 - ((nf ^ 0x1ff) + 1); 283204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_NFCAL, 284204582f2SAdrian Chadd "NF calibrated [ctl] [chain 1] is %d\n", nf); 285204582f2SAdrian Chadd nfarray[1] = nf; 286204582f2SAdrian Chadd 287204582f2SAdrian Chadd nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR); 288204582f2SAdrian Chadd if (nf & 0x100) 289204582f2SAdrian Chadd nf = 0 - ((nf ^ 0x1ff) + 1); 290204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_NFCAL, 291204582f2SAdrian Chadd "NF calibrated [ext] [chain 0] is %d\n", nf); 292204582f2SAdrian Chadd nfarray[3] = nf; 293204582f2SAdrian Chadd 294204582f2SAdrian Chadd nf = MS(OS_REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR9280_PHY_CH1_EXT_MINCCA_PWR); 295204582f2SAdrian Chadd if (nf & 0x100) 296204582f2SAdrian Chadd nf = 0 - ((nf ^ 0x1ff) + 1); 297204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_NFCAL, 298204582f2SAdrian Chadd "NF calibrated [ext] [chain 1] is %d\n", nf); 299204582f2SAdrian Chadd nfarray[4] = nf; 300204582f2SAdrian Chadd } 301204582f2SAdrian Chadd 302204582f2SAdrian Chadd /* 303204582f2SAdrian Chadd * Adjust NF based on statistical values for 5GHz frequencies. 304204582f2SAdrian Chadd * Stubbed:Not used by Fowl 305204582f2SAdrian Chadd */ 306204582f2SAdrian Chadd int16_t 307204582f2SAdrian Chadd ar9280GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c) 308204582f2SAdrian Chadd { 309204582f2SAdrian Chadd return 0; 310204582f2SAdrian Chadd } 311204582f2SAdrian Chadd 312204582f2SAdrian Chadd /* 313204582f2SAdrian Chadd * Free memory for analog bank scratch buffers 314204582f2SAdrian Chadd */ 315204582f2SAdrian Chadd static void 316204582f2SAdrian Chadd ar9280RfDetach(struct ath_hal *ah) 317204582f2SAdrian Chadd { 318204582f2SAdrian Chadd struct ath_hal_5212 *ahp = AH5212(ah); 319204582f2SAdrian Chadd 320204582f2SAdrian Chadd HALASSERT(ahp->ah_rfHal != AH_NULL); 321204582f2SAdrian Chadd ath_hal_free(ahp->ah_rfHal); 322204582f2SAdrian Chadd ahp->ah_rfHal = AH_NULL; 323204582f2SAdrian Chadd } 324204582f2SAdrian Chadd 325204582f2SAdrian Chadd HAL_BOOL 326204582f2SAdrian Chadd ar9280RfAttach(struct ath_hal *ah, HAL_STATUS *status) 327204582f2SAdrian Chadd { 328204582f2SAdrian Chadd struct ath_hal_5212 *ahp = AH5212(ah); 329204582f2SAdrian Chadd struct ar9280State *priv; 330204582f2SAdrian Chadd 331204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: attach AR9280 radio\n", __func__); 332204582f2SAdrian Chadd 333204582f2SAdrian Chadd HALASSERT(ahp->ah_rfHal == AH_NULL); 334204582f2SAdrian Chadd priv = ath_hal_malloc(sizeof(struct ar9280State)); 335204582f2SAdrian Chadd if (priv == AH_NULL) { 336204582f2SAdrian Chadd HALDEBUG(ah, HAL_DEBUG_ANY, 337204582f2SAdrian Chadd "%s: cannot allocate private state\n", __func__); 338204582f2SAdrian Chadd *status = HAL_ENOMEM; /* XXX */ 339204582f2SAdrian Chadd return AH_FALSE; 340204582f2SAdrian Chadd } 341204582f2SAdrian Chadd priv->base.rfDetach = ar9280RfDetach; 342204582f2SAdrian Chadd priv->base.writeRegs = ar9280WriteRegs; 343204582f2SAdrian Chadd priv->base.getRfBank = ar9280GetRfBank; 344204582f2SAdrian Chadd priv->base.setChannel = ar9280SetChannel; 345204582f2SAdrian Chadd priv->base.setRfRegs = ar9280SetRfRegs; 346204582f2SAdrian Chadd priv->base.setPowerTable = ar9280SetPowerTable; 347204582f2SAdrian Chadd priv->base.getChannelMaxMinPower = ar9280GetChannelMaxMinPower; 348204582f2SAdrian Chadd priv->base.getNfAdjust = ar9280GetNfAdjust; 349204582f2SAdrian Chadd 350204582f2SAdrian Chadd ahp->ah_pcdacTable = priv->pcdacTable; 351204582f2SAdrian Chadd ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 352204582f2SAdrian Chadd ahp->ah_rfHal = &priv->base; 353204582f2SAdrian Chadd /* 354204582f2SAdrian Chadd * Set noise floor adjust method; we arrange a 355204582f2SAdrian Chadd * direct call instead of thunking. 356204582f2SAdrian Chadd */ 357204582f2SAdrian Chadd AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust; 358204582f2SAdrian Chadd AH_PRIVATE(ah)->ah_getNoiseFloor = ar9280GetNoiseFloor; 359204582f2SAdrian Chadd 360204582f2SAdrian Chadd return AH_TRUE; 361204582f2SAdrian Chadd } 362