14ad7e9b0SAdrian Chadd /*- 2f4a3eb02SAdrian Chadd * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org> 3f4a3eb02SAdrian Chadd * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com> 44ad7e9b0SAdrian Chadd * All rights reserved. 54ad7e9b0SAdrian Chadd * 64ad7e9b0SAdrian Chadd * Redistribution and use in source and binary forms, with or without 74ad7e9b0SAdrian Chadd * modification, are permitted provided that the following conditions 84ad7e9b0SAdrian Chadd * are met: 94ad7e9b0SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 104ad7e9b0SAdrian Chadd * notice, this list of conditions and the following disclaimer, 114ad7e9b0SAdrian Chadd * without modification. 124ad7e9b0SAdrian Chadd * 2. Redistributions in binary form must reproduce at minimum a disclaimer 134ad7e9b0SAdrian Chadd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 144ad7e9b0SAdrian Chadd * redistribution must be conditioned upon including a substantially 154ad7e9b0SAdrian Chadd * similar Disclaimer requirement for further binary redistribution. 164ad7e9b0SAdrian Chadd * 174ad7e9b0SAdrian Chadd * NO WARRANTY 184ad7e9b0SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 194ad7e9b0SAdrian Chadd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 204ad7e9b0SAdrian Chadd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 214ad7e9b0SAdrian Chadd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 224ad7e9b0SAdrian Chadd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 234ad7e9b0SAdrian Chadd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 244ad7e9b0SAdrian Chadd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 254ad7e9b0SAdrian Chadd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 264ad7e9b0SAdrian Chadd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 274ad7e9b0SAdrian Chadd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 284ad7e9b0SAdrian Chadd * THE POSSIBILITY OF SUCH DAMAGES. 294ad7e9b0SAdrian Chadd */ 304ad7e9b0SAdrian Chadd 314ad7e9b0SAdrian Chadd #include <sys/cdefs.h> 324ad7e9b0SAdrian Chadd __FBSDID("$FreeBSD$"); 334ad7e9b0SAdrian Chadd 344ad7e9b0SAdrian Chadd /* 354ad7e9b0SAdrian Chadd * Broadcom ChipCommon driver. 364ad7e9b0SAdrian Chadd * 374ad7e9b0SAdrian Chadd * With the exception of some very early chipsets, the ChipCommon core 384ad7e9b0SAdrian Chadd * has been included in all HND SoCs and chipsets based on the siba(4) 394ad7e9b0SAdrian Chadd * and bcma(4) interconnects, providing a common interface to chipset 400c91e892SLandon J. Fuller * identification, bus enumeration, UARTs, clocks, watchdog interrupts, 410c91e892SLandon J. Fuller * GPIO, flash, etc. 424ad7e9b0SAdrian Chadd */ 434ad7e9b0SAdrian Chadd 444ad7e9b0SAdrian Chadd #include <sys/param.h> 454ad7e9b0SAdrian Chadd #include <sys/kernel.h> 46f4a3eb02SAdrian Chadd #include <sys/lock.h> 474ad7e9b0SAdrian Chadd #include <sys/bus.h> 48e129bcd6SLandon J. Fuller #include <sys/rman.h> 49f4a3eb02SAdrian Chadd #include <sys/malloc.h> 504ad7e9b0SAdrian Chadd #include <sys/module.h> 51f4a3eb02SAdrian Chadd #include <sys/mutex.h> 524ad7e9b0SAdrian Chadd #include <sys/systm.h> 534ad7e9b0SAdrian Chadd 544ad7e9b0SAdrian Chadd #include <machine/bus.h> 554ad7e9b0SAdrian Chadd #include <machine/resource.h> 564ad7e9b0SAdrian Chadd 574ad7e9b0SAdrian Chadd #include <dev/bhnd/bhnd.h> 58f4a3eb02SAdrian Chadd #include <dev/bhnd/bhndvar.h> 59e83ce340SAdrian Chadd 604ad7e9b0SAdrian Chadd #include "chipcreg.h" 614ad7e9b0SAdrian Chadd #include "chipcvar.h" 620c91e892SLandon J. Fuller 63f4a3eb02SAdrian Chadd #include "chipc_private.h" 644ad7e9b0SAdrian Chadd 654ad7e9b0SAdrian Chadd devclass_t bhnd_chipc_devclass; /**< bhnd(4) chipcommon device class */ 664ad7e9b0SAdrian Chadd 6736e4410aSAdrian Chadd static struct bhnd_device_quirk chipc_quirks[]; 6836e4410aSAdrian Chadd 694ad7e9b0SAdrian Chadd /* Supported device identifiers */ 7036e4410aSAdrian Chadd static const struct bhnd_device chipc_devices[] = { 71b0b9c854SLandon J. Fuller BHND_DEVICE(BCM, CC, NULL, chipc_quirks), 7236e4410aSAdrian Chadd BHND_DEVICE_END 734ad7e9b0SAdrian Chadd }; 744ad7e9b0SAdrian Chadd 7536e4410aSAdrian Chadd 764ad7e9b0SAdrian Chadd /* Device quirks table */ 774ad7e9b0SAdrian Chadd static struct bhnd_device_quirk chipc_quirks[] = { 7856a4cdd1SLandon J. Fuller /* HND OTP controller revisions */ 7956a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_EQ (12), CHIPC_QUIRK_OTP_HND), /* (?) */ 8056a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_EQ (17), CHIPC_QUIRK_OTP_HND), /* BCM4311 */ 8156a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_EQ (22), CHIPC_QUIRK_OTP_HND), /* BCM4312 */ 8256a4cdd1SLandon J. Fuller 8356a4cdd1SLandon J. Fuller /* IPX OTP controller revisions */ 8456a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_EQ (21), CHIPC_QUIRK_OTP_IPX), 8556a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_GTE(23), CHIPC_QUIRK_OTP_IPX), 8656a4cdd1SLandon J. Fuller 875ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_GTE(32), CHIPC_QUIRK_SUPPORTS_SPROM), 885ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_GTE(35), CHIPC_QUIRK_SUPPORTS_CAP_EXT), 8956a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_GTE(49), CHIPC_QUIRK_IPX_OTPL_SIZE), 905ad9ac03SAdrian Chadd 915ad9ac03SAdrian Chadd /* 4706 variant quirks */ 925ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_EQ (38), CHIPC_QUIRK_4706_NFLASH), /* BCM5357? */ 935ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (4706, HWREV_ANY, CHIPC_QUIRK_4706_NFLASH), 945ad9ac03SAdrian Chadd 955ad9ac03SAdrian Chadd /* 4331 quirks*/ 965ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (4331, HWREV_ANY, CHIPC_QUIRK_4331_EXTPA_MUX_SPROM), 975ad9ac03SAdrian Chadd BHND_PKG_QUIRK (4331, TN, CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM), 985ad9ac03SAdrian Chadd BHND_PKG_QUIRK (4331, TNA0, CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM), 995ad9ac03SAdrian Chadd BHND_PKG_QUIRK (4331, TT, CHIPC_QUIRK_4331_EXTPA2_MUX_SPROM), 1005ad9ac03SAdrian Chadd 1015ad9ac03SAdrian Chadd /* 4360 quirks */ 1025ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (4352, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 1035ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (43460, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 1045ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (43462, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 1055ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (43602, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 106f4a3eb02SAdrian Chadd 10736e4410aSAdrian Chadd BHND_DEVICE_QUIRK_END 1084ad7e9b0SAdrian Chadd }; 1094ad7e9b0SAdrian Chadd 1100c91e892SLandon J. Fuller // FIXME: IRQ shouldn't be hard-coded 1110c91e892SLandon J. Fuller #define CHIPC_MIPS_IRQ 2 112785df0cbSAdrian Chadd 1130c91e892SLandon J. Fuller static int chipc_add_children(struct chipc_softc *sc); 114f4a3eb02SAdrian Chadd 11556a4cdd1SLandon J. Fuller static bhnd_nvram_src chipc_find_nvram_src(struct chipc_softc *sc, 11656a4cdd1SLandon J. Fuller struct chipc_caps *caps); 117f4a3eb02SAdrian Chadd static int chipc_read_caps(struct chipc_softc *sc, 118f4a3eb02SAdrian Chadd struct chipc_caps *caps); 119f4a3eb02SAdrian Chadd 120f4a3eb02SAdrian Chadd static bool chipc_should_enable_sprom( 121f4a3eb02SAdrian Chadd struct chipc_softc *sc); 122f4a3eb02SAdrian Chadd 1230c91e892SLandon J. Fuller static int chipc_try_activate_resource( 1240c91e892SLandon J. Fuller struct chipc_softc *sc, device_t child, 1250c91e892SLandon J. Fuller int type, int rid, struct resource *r, 1260c91e892SLandon J. Fuller bool req_direct); 1270c91e892SLandon J. Fuller 128f4a3eb02SAdrian Chadd static int chipc_init_rman(struct chipc_softc *sc); 129f4a3eb02SAdrian Chadd static void chipc_free_rman(struct chipc_softc *sc); 130f4a3eb02SAdrian Chadd static struct rman *chipc_get_rman(struct chipc_softc *sc, 131f4a3eb02SAdrian Chadd int type); 132f4a3eb02SAdrian Chadd 1334ad7e9b0SAdrian Chadd /* quirk and capability flag convenience macros */ 1344ad7e9b0SAdrian Chadd #define CHIPC_QUIRK(_sc, _name) \ 1354ad7e9b0SAdrian Chadd ((_sc)->quirks & CHIPC_QUIRK_ ## _name) 1364ad7e9b0SAdrian Chadd 1374ad7e9b0SAdrian Chadd #define CHIPC_CAP(_sc, _name) \ 138f4a3eb02SAdrian Chadd ((_sc)->caps._name) 1394ad7e9b0SAdrian Chadd 1404ad7e9b0SAdrian Chadd #define CHIPC_ASSERT_QUIRK(_sc, name) \ 1414ad7e9b0SAdrian Chadd KASSERT(CHIPC_QUIRK((_sc), name), ("quirk " __STRING(_name) " not set")) 1424ad7e9b0SAdrian Chadd 1434ad7e9b0SAdrian Chadd #define CHIPC_ASSERT_CAP(_sc, name) \ 1444ad7e9b0SAdrian Chadd KASSERT(CHIPC_CAP((_sc), name), ("capability " __STRING(_name) " not set")) 1454ad7e9b0SAdrian Chadd 1464ad7e9b0SAdrian Chadd static int 1474ad7e9b0SAdrian Chadd chipc_probe(device_t dev) 1484ad7e9b0SAdrian Chadd { 14936e4410aSAdrian Chadd const struct bhnd_device *id; 1504ad7e9b0SAdrian Chadd 15136e4410aSAdrian Chadd id = bhnd_device_lookup(dev, chipc_devices, sizeof(chipc_devices[0])); 15236e4410aSAdrian Chadd if (id == NULL) 1534ad7e9b0SAdrian Chadd return (ENXIO); 15436e4410aSAdrian Chadd 15536e4410aSAdrian Chadd bhnd_set_default_core_desc(dev); 15636e4410aSAdrian Chadd return (BUS_PROBE_DEFAULT); 1574ad7e9b0SAdrian Chadd } 1584ad7e9b0SAdrian Chadd 1594ad7e9b0SAdrian Chadd static int 1604ad7e9b0SAdrian Chadd chipc_attach(device_t dev) 1614ad7e9b0SAdrian Chadd { 1624ad7e9b0SAdrian Chadd struct chipc_softc *sc; 1634ad7e9b0SAdrian Chadd int error; 1644ad7e9b0SAdrian Chadd 1654ad7e9b0SAdrian Chadd sc = device_get_softc(dev); 1664ad7e9b0SAdrian Chadd sc->dev = dev; 16736e4410aSAdrian Chadd sc->quirks = bhnd_device_quirks(dev, chipc_devices, 16836e4410aSAdrian Chadd sizeof(chipc_devices[0])); 169f4a3eb02SAdrian Chadd sc->sprom_refcnt = 0; 170e83ce340SAdrian Chadd 171e83ce340SAdrian Chadd CHIPC_LOCK_INIT(sc); 172f4a3eb02SAdrian Chadd STAILQ_INIT(&sc->mem_regions); 1734ad7e9b0SAdrian Chadd 174f4a3eb02SAdrian Chadd /* Set up resource management */ 175f4a3eb02SAdrian Chadd if ((error = chipc_init_rman(sc))) { 176f4a3eb02SAdrian Chadd device_printf(sc->dev, 177f4a3eb02SAdrian Chadd "failed to initialize chipc resource state: %d\n", error); 178f4a3eb02SAdrian Chadd goto failed; 179f4a3eb02SAdrian Chadd } 1804ad7e9b0SAdrian Chadd 1810c91e892SLandon J. Fuller /* Allocate the region containing the chipc register block */ 182f4a3eb02SAdrian Chadd if ((sc->core_region = chipc_find_region_by_rid(sc, 0)) == NULL) { 183f4a3eb02SAdrian Chadd error = ENXIO; 184f4a3eb02SAdrian Chadd goto failed; 185f4a3eb02SAdrian Chadd } 186f4a3eb02SAdrian Chadd 187f4a3eb02SAdrian Chadd error = chipc_retain_region(sc, sc->core_region, 188f4a3eb02SAdrian Chadd RF_ALLOCATED|RF_ACTIVE); 189f4a3eb02SAdrian Chadd if (error) { 190f4a3eb02SAdrian Chadd sc->core_region = NULL; 191f4a3eb02SAdrian Chadd goto failed; 1920c91e892SLandon J. Fuller } 1930c91e892SLandon J. Fuller 1940c91e892SLandon J. Fuller /* Save a direct reference to our chipc registers */ 195f4a3eb02SAdrian Chadd sc->core = sc->core_region->cr_res; 1964ad7e9b0SAdrian Chadd 197f4a3eb02SAdrian Chadd /* Fetch and parse capability register(s) */ 198f4a3eb02SAdrian Chadd if ((error = chipc_read_caps(sc, &sc->caps))) 199f4a3eb02SAdrian Chadd goto failed; 2004ad7e9b0SAdrian Chadd 201f4a3eb02SAdrian Chadd if (bootverbose) 202f4a3eb02SAdrian Chadd chipc_print_caps(sc->dev, &sc->caps); 203f4a3eb02SAdrian Chadd 2040c91e892SLandon J. Fuller /* Attach all supported child devices */ 2050c91e892SLandon J. Fuller if ((error = chipc_add_children(sc))) 2060c91e892SLandon J. Fuller goto failed; 2070c91e892SLandon J. Fuller 208f4a3eb02SAdrian Chadd if ((error = bus_generic_attach(dev))) 209f4a3eb02SAdrian Chadd goto failed; 2104ad7e9b0SAdrian Chadd 2114ad7e9b0SAdrian Chadd return (0); 2124ad7e9b0SAdrian Chadd 213f4a3eb02SAdrian Chadd failed: 2147d1fb1aaSLandon J. Fuller device_delete_children(sc->dev); 2157d1fb1aaSLandon J. Fuller 216f4a3eb02SAdrian Chadd if (sc->core_region != NULL) { 217f4a3eb02SAdrian Chadd chipc_release_region(sc, sc->core_region, 218f4a3eb02SAdrian Chadd RF_ALLOCATED|RF_ACTIVE); 219f4a3eb02SAdrian Chadd } 220f4a3eb02SAdrian Chadd 221f4a3eb02SAdrian Chadd chipc_free_rman(sc); 222e83ce340SAdrian Chadd CHIPC_LOCK_DESTROY(sc); 2234ad7e9b0SAdrian Chadd return (error); 2244ad7e9b0SAdrian Chadd } 2254ad7e9b0SAdrian Chadd 2264ad7e9b0SAdrian Chadd static int 2274ad7e9b0SAdrian Chadd chipc_detach(device_t dev) 2284ad7e9b0SAdrian Chadd { 2294ad7e9b0SAdrian Chadd struct chipc_softc *sc; 230f4a3eb02SAdrian Chadd int error; 2314ad7e9b0SAdrian Chadd 2324ad7e9b0SAdrian Chadd sc = device_get_softc(dev); 233f4a3eb02SAdrian Chadd 234f4a3eb02SAdrian Chadd if ((error = bus_generic_detach(dev))) 235f4a3eb02SAdrian Chadd return (error); 236f4a3eb02SAdrian Chadd 237f4a3eb02SAdrian Chadd chipc_release_region(sc, sc->core_region, RF_ALLOCATED|RF_ACTIVE); 238f4a3eb02SAdrian Chadd chipc_free_rman(sc); 239e83ce340SAdrian Chadd 240e83ce340SAdrian Chadd CHIPC_LOCK_DESTROY(sc); 2414ad7e9b0SAdrian Chadd 2424ad7e9b0SAdrian Chadd return (0); 2434ad7e9b0SAdrian Chadd } 2444ad7e9b0SAdrian Chadd 2450c91e892SLandon J. Fuller static int 2460c91e892SLandon J. Fuller chipc_add_children(struct chipc_softc *sc) 2470c91e892SLandon J. Fuller { 2480c91e892SLandon J. Fuller device_t child; 2490c91e892SLandon J. Fuller const char *flash_bus; 2500c91e892SLandon J. Fuller int error; 2510c91e892SLandon J. Fuller 2520c91e892SLandon J. Fuller /* SPROM/OTP */ 2530c91e892SLandon J. Fuller if (sc->caps.nvram_src == BHND_NVRAM_SRC_SPROM || 2540c91e892SLandon J. Fuller sc->caps.nvram_src == BHND_NVRAM_SRC_OTP) 2550c91e892SLandon J. Fuller { 2560c91e892SLandon J. Fuller child = BUS_ADD_CHILD(sc->dev, 0, "bhnd_nvram", -1); 2570c91e892SLandon J. Fuller if (child == NULL) { 2580c91e892SLandon J. Fuller device_printf(sc->dev, "failed to add nvram device\n"); 2590c91e892SLandon J. Fuller return (ENXIO); 2600c91e892SLandon J. Fuller } 2610c91e892SLandon J. Fuller 2620c91e892SLandon J. Fuller /* Both OTP and external SPROM are mapped at CHIPC_SPROM_OTP */ 2630c91e892SLandon J. Fuller error = chipc_set_resource(sc, child, SYS_RES_MEMORY, 0, 2640c91e892SLandon J. Fuller CHIPC_SPROM_OTP, CHIPC_SPROM_OTP_SIZE, 0, 0); 2650c91e892SLandon J. Fuller if (error) 2660c91e892SLandon J. Fuller return (error); 2670c91e892SLandon J. Fuller } 2680c91e892SLandon J. Fuller 2690c91e892SLandon J. Fuller #ifdef notyet 2700c91e892SLandon J. Fuller /* 2710c91e892SLandon J. Fuller * PMU/SLOWCLK/INSTACLK 2720c91e892SLandon J. Fuller * 2730c91e892SLandon J. Fuller * On AOB ("Always on Bus") devices, a PMU core (if it exists) is 2740c91e892SLandon J. Fuller * enumerated directly by the bhnd(4) bus -- not chipc. 2750c91e892SLandon J. Fuller * 2760c91e892SLandon J. Fuller * Otherwise, we always add a PMU child device, and let the 2770c91e892SLandon J. Fuller * chipc bhnd_pmu drivers probe for it. If the core supports an 2780c91e892SLandon J. Fuller * earlier non-PMU clock/power register interface, one of the instaclk, 2790c91e892SLandon J. Fuller * powerctl, or null bhnd_pmu drivers will claim the device. 2800c91e892SLandon J. Fuller */ 2810c91e892SLandon J. Fuller if (!sc->caps.aob || (sc->caps.aob && !sc->caps.pmu)) { 2820c91e892SLandon J. Fuller child = BUS_ADD_CHILD(sc->dev, 0, "bhnd_pmu", -1); 2830c91e892SLandon J. Fuller if (child == NULL) { 2840c91e892SLandon J. Fuller device_printf(sc->dev, "failed to add pmu\n"); 2850c91e892SLandon J. Fuller return (ENXIO); 2860c91e892SLandon J. Fuller } 2870c91e892SLandon J. Fuller 2880c91e892SLandon J. Fuller /* Associate the applicable register block */ 2890c91e892SLandon J. Fuller error = 0; 2900c91e892SLandon J. Fuller if (sc->caps.pmu) { 2910c91e892SLandon J. Fuller error = chipc_set_resource(sc, child, SYS_RES_MEMORY, 0, 2920c91e892SLandon J. Fuller CHIPC_PMU, CHIPC_PMU_SIZE, 0, 0); 2930c91e892SLandon J. Fuller } else if (sc->caps.power_control) { 2940c91e892SLandon J. Fuller error = chipc_set_resource(sc, child, SYS_RES_MEMORY, 0, 2950c91e892SLandon J. Fuller CHIPC_PWRCTL, CHIPC_PWRCTL_SIZE, 0, 0); 2960c91e892SLandon J. Fuller } 2970c91e892SLandon J. Fuller 2980c91e892SLandon J. Fuller if (error) 2990c91e892SLandon J. Fuller return (error); 3000c91e892SLandon J. Fuller 3010c91e892SLandon J. Fuller } 3020c91e892SLandon J. Fuller #endif /* notyet */ 3030c91e892SLandon J. Fuller 3040c91e892SLandon J. Fuller /* All remaining devices are SoC-only */ 3050c91e892SLandon J. Fuller if (bhnd_get_attach_type(sc->dev) != BHND_ATTACH_NATIVE) 3060c91e892SLandon J. Fuller return (0); 3070c91e892SLandon J. Fuller 3080c91e892SLandon J. Fuller /* UARTs */ 3090c91e892SLandon J. Fuller for (u_int i = 0; i < min(sc->caps.num_uarts, CHIPC_UART_MAX); i++) { 3100c91e892SLandon J. Fuller child = BUS_ADD_CHILD(sc->dev, 0, "uart", -1); 3110c91e892SLandon J. Fuller if (child == NULL) { 3120c91e892SLandon J. Fuller device_printf(sc->dev, "failed to add uart%u\n", i); 3130c91e892SLandon J. Fuller return (ENXIO); 3140c91e892SLandon J. Fuller } 3150c91e892SLandon J. Fuller 3160c91e892SLandon J. Fuller /* Shared IRQ */ 3170c91e892SLandon J. Fuller error = bus_set_resource(child, SYS_RES_IRQ, 0, CHIPC_MIPS_IRQ, 3180c91e892SLandon J. Fuller 1); 3190c91e892SLandon J. Fuller if (error) { 3200c91e892SLandon J. Fuller device_printf(sc->dev, "failed to set uart%u irq %u\n", 3210c91e892SLandon J. Fuller i, CHIPC_MIPS_IRQ); 3220c91e892SLandon J. Fuller return (error); 3230c91e892SLandon J. Fuller } 3240c91e892SLandon J. Fuller 3250c91e892SLandon J. Fuller /* UART registers are mapped sequentially */ 3260c91e892SLandon J. Fuller error = chipc_set_resource(sc, child, SYS_RES_MEMORY, 0, 3270c91e892SLandon J. Fuller CHIPC_UART(i), CHIPC_UART_SIZE, 0, 0); 3280c91e892SLandon J. Fuller if (error) 3290c91e892SLandon J. Fuller return (error); 3300c91e892SLandon J. Fuller } 3310c91e892SLandon J. Fuller 3320c91e892SLandon J. Fuller /* Flash */ 3330c91e892SLandon J. Fuller flash_bus = chipc_flash_bus_name(sc->caps.flash_type); 3340c91e892SLandon J. Fuller if (flash_bus != NULL) { 3350c91e892SLandon J. Fuller child = BUS_ADD_CHILD(sc->dev, 0, flash_bus, -1); 3360c91e892SLandon J. Fuller if (child == NULL) { 3370c91e892SLandon J. Fuller device_printf(sc->dev, "failed to add %s device\n", 3380c91e892SLandon J. Fuller flash_bus); 3390c91e892SLandon J. Fuller return (ENXIO); 3400c91e892SLandon J. Fuller } 3410c91e892SLandon J. Fuller 3420c91e892SLandon J. Fuller /* flash memory mapping */ 3430c91e892SLandon J. Fuller error = chipc_set_resource(sc, child, SYS_RES_MEMORY, 0, 3440c91e892SLandon J. Fuller 0, RM_MAX_END, 1, 1); 3450c91e892SLandon J. Fuller if (error) 3460c91e892SLandon J. Fuller return (error); 3470c91e892SLandon J. Fuller 3480c91e892SLandon J. Fuller /* flashctrl registers */ 3490c91e892SLandon J. Fuller error = chipc_set_resource(sc, child, SYS_RES_MEMORY, 1, 3500c91e892SLandon J. Fuller CHIPC_SFLASH_BASE, CHIPC_SFLASH_SIZE, 0, 0); 3510c91e892SLandon J. Fuller if (error) 3520c91e892SLandon J. Fuller return (error); 3530c91e892SLandon J. Fuller } 3540c91e892SLandon J. Fuller 3550c91e892SLandon J. Fuller return (0); 3560c91e892SLandon J. Fuller } 3570c91e892SLandon J. Fuller 35856a4cdd1SLandon J. Fuller /** 35956a4cdd1SLandon J. Fuller * Determine the NVRAM data source for this device. 36056a4cdd1SLandon J. Fuller * 36156a4cdd1SLandon J. Fuller * The SPROM, OTP, and flash capability flags must be fully populated in 36256a4cdd1SLandon J. Fuller * @p caps. 36356a4cdd1SLandon J. Fuller * 36456a4cdd1SLandon J. Fuller * @param sc chipc driver state. 36556a4cdd1SLandon J. Fuller * @param caps capability flags to be used to derive NVRAM configuration. 36656a4cdd1SLandon J. Fuller */ 36756a4cdd1SLandon J. Fuller static bhnd_nvram_src 36856a4cdd1SLandon J. Fuller chipc_find_nvram_src(struct chipc_softc *sc, struct chipc_caps *caps) 36956a4cdd1SLandon J. Fuller { 37056a4cdd1SLandon J. Fuller uint32_t otp_st, srom_ctrl; 37156a4cdd1SLandon J. Fuller 37256a4cdd1SLandon J. Fuller /* Very early devices vend SPROM/OTP/CIS (if at all) via the 37356a4cdd1SLandon J. Fuller * host bridge interface instead of ChipCommon. */ 37456a4cdd1SLandon J. Fuller if (!CHIPC_QUIRK(sc, SUPPORTS_SPROM)) 37556a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_UNKNOWN); 37656a4cdd1SLandon J. Fuller 37756a4cdd1SLandon J. Fuller /* 37856a4cdd1SLandon J. Fuller * Later chipset revisions standardized the SPROM capability flags and 37956a4cdd1SLandon J. Fuller * register interfaces. 38056a4cdd1SLandon J. Fuller * 38156a4cdd1SLandon J. Fuller * We check for hardware presence in order of precedence. For example, 38256a4cdd1SLandon J. Fuller * SPROM is is always used in preference to internal OTP if found. 38356a4cdd1SLandon J. Fuller */ 38456a4cdd1SLandon J. Fuller if (caps->sprom) { 38556a4cdd1SLandon J. Fuller srom_ctrl = bhnd_bus_read_4(sc->core, CHIPC_SPROM_CTRL); 38656a4cdd1SLandon J. Fuller if (srom_ctrl & CHIPC_SRC_PRESENT) 38756a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_SPROM); 38856a4cdd1SLandon J. Fuller } 38956a4cdd1SLandon J. Fuller 39056a4cdd1SLandon J. Fuller /* Check for programmed OTP H/W subregion (contains SROM data) */ 39156a4cdd1SLandon J. Fuller if (CHIPC_QUIRK(sc, SUPPORTS_OTP) && caps->otp_size > 0) { 39256a4cdd1SLandon J. Fuller /* TODO: need access to HND-OTP device */ 39356a4cdd1SLandon J. Fuller if (!CHIPC_QUIRK(sc, OTP_HND)) { 39456a4cdd1SLandon J. Fuller device_printf(sc->dev, 39556a4cdd1SLandon J. Fuller "NVRAM unavailable: unsupported OTP controller.\n"); 39656a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_UNKNOWN); 39756a4cdd1SLandon J. Fuller } 39856a4cdd1SLandon J. Fuller 39956a4cdd1SLandon J. Fuller otp_st = bhnd_bus_read_4(sc->core, CHIPC_OTPST); 40056a4cdd1SLandon J. Fuller if (otp_st & CHIPC_OTPS_GUP_HW) 40156a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_OTP); 40256a4cdd1SLandon J. Fuller } 40356a4cdd1SLandon J. Fuller 40456a4cdd1SLandon J. Fuller /* Check for flash */ 40556a4cdd1SLandon J. Fuller if (caps->flash_type != CHIPC_FLASH_NONE) 40656a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_FLASH); 40756a4cdd1SLandon J. Fuller 40856a4cdd1SLandon J. Fuller /* No NVRAM hardware capability declared */ 40956a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_UNKNOWN); 41056a4cdd1SLandon J. Fuller } 41156a4cdd1SLandon J. Fuller 412f4a3eb02SAdrian Chadd /* Read and parse chipc capabilities */ 4134ad7e9b0SAdrian Chadd static int 414f4a3eb02SAdrian Chadd chipc_read_caps(struct chipc_softc *sc, struct chipc_caps *caps) 4154ad7e9b0SAdrian Chadd { 416f4a3eb02SAdrian Chadd uint32_t cap_reg; 417f4a3eb02SAdrian Chadd uint32_t cap_ext_reg; 418f4a3eb02SAdrian Chadd uint32_t regval; 419f4a3eb02SAdrian Chadd 420f4a3eb02SAdrian Chadd /* Fetch cap registers */ 421f4a3eb02SAdrian Chadd cap_reg = bhnd_bus_read_4(sc->core, CHIPC_CAPABILITIES); 422f4a3eb02SAdrian Chadd cap_ext_reg = 0; 423f4a3eb02SAdrian Chadd if (CHIPC_QUIRK(sc, SUPPORTS_CAP_EXT)) 424f4a3eb02SAdrian Chadd cap_ext_reg = bhnd_bus_read_4(sc->core, CHIPC_CAPABILITIES_EXT); 425f4a3eb02SAdrian Chadd 426f4a3eb02SAdrian Chadd /* Extract values */ 427f4a3eb02SAdrian Chadd caps->num_uarts = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_NUM_UART); 428f4a3eb02SAdrian Chadd caps->mipseb = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_MIPSEB); 429f4a3eb02SAdrian Chadd caps->uart_gpio = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_UARTGPIO); 430f4a3eb02SAdrian Chadd caps->uart_clock = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_UCLKSEL); 431f4a3eb02SAdrian Chadd 432f4a3eb02SAdrian Chadd caps->extbus_type = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_EXTBUS); 433f4a3eb02SAdrian Chadd caps->power_control = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_PWR_CTL); 434f4a3eb02SAdrian Chadd caps->jtag_master = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_JTAGP); 435f4a3eb02SAdrian Chadd 436f4a3eb02SAdrian Chadd caps->pll_type = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_PLL); 437f4a3eb02SAdrian Chadd caps->backplane_64 = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_BKPLN64); 438f4a3eb02SAdrian Chadd caps->boot_rom = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_ROM); 439f4a3eb02SAdrian Chadd caps->pmu = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_PMU); 440f4a3eb02SAdrian Chadd caps->eci = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_ECI); 441f4a3eb02SAdrian Chadd caps->sprom = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_SPROM); 442f4a3eb02SAdrian Chadd caps->otp_size = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_OTP_SIZE); 443f4a3eb02SAdrian Chadd 444f4a3eb02SAdrian Chadd caps->seci = CHIPC_GET_FLAG(cap_ext_reg, CHIPC_CAP2_SECI); 445f4a3eb02SAdrian Chadd caps->gsio = CHIPC_GET_FLAG(cap_ext_reg, CHIPC_CAP2_GSIO); 446f4a3eb02SAdrian Chadd caps->aob = CHIPC_GET_FLAG(cap_ext_reg, CHIPC_CAP2_AOB); 447f4a3eb02SAdrian Chadd 448f4a3eb02SAdrian Chadd /* Fetch OTP size for later IPX controller revisions */ 44956a4cdd1SLandon J. Fuller if (CHIPC_QUIRK(sc, IPX_OTPL_SIZE)) { 450f4a3eb02SAdrian Chadd regval = bhnd_bus_read_4(sc->core, CHIPC_OTPLAYOUT); 451f4a3eb02SAdrian Chadd caps->otp_size = CHIPC_GET_BITS(regval, CHIPC_OTPL_SIZE); 4524ad7e9b0SAdrian Chadd } 4534ad7e9b0SAdrian Chadd 4545ad9ac03SAdrian Chadd /* Determine flash type and parameters */ 455f4a3eb02SAdrian Chadd caps->cfi_width = 0; 456f4a3eb02SAdrian Chadd switch (CHIPC_GET_BITS(cap_reg, CHIPC_CAP_FLASH)) { 457f4a3eb02SAdrian Chadd case CHIPC_CAP_SFLASH_ST: 458f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_SFLASH_ST; 459f4a3eb02SAdrian Chadd break; 460f4a3eb02SAdrian Chadd case CHIPC_CAP_SFLASH_AT: 461f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_SFLASH_AT; 462f4a3eb02SAdrian Chadd break; 463f4a3eb02SAdrian Chadd case CHIPC_CAP_NFLASH: 4640c91e892SLandon J. Fuller /* unimplemented */ 465f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_NFLASH; 466f4a3eb02SAdrian Chadd break; 467f4a3eb02SAdrian Chadd case CHIPC_CAP_PFLASH: 468f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_PFLASH_CFI; 469f4a3eb02SAdrian Chadd 470f4a3eb02SAdrian Chadd /* determine cfi width */ 471f4a3eb02SAdrian Chadd regval = bhnd_bus_read_4(sc->core, CHIPC_FLASH_CFG); 472f4a3eb02SAdrian Chadd if (CHIPC_GET_FLAG(regval, CHIPC_FLASH_CFG_DS)) 473f4a3eb02SAdrian Chadd caps->cfi_width = 2; 474f4a3eb02SAdrian Chadd else 475f4a3eb02SAdrian Chadd caps->cfi_width = 1; 476f4a3eb02SAdrian Chadd 477f4a3eb02SAdrian Chadd break; 478f4a3eb02SAdrian Chadd case CHIPC_CAP_FLASH_NONE: 479f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_FLASH_NONE; 480f4a3eb02SAdrian Chadd break; 481f4a3eb02SAdrian Chadd 482f4a3eb02SAdrian Chadd } 483f4a3eb02SAdrian Chadd 484f4a3eb02SAdrian Chadd /* Handle 4706_NFLASH fallback */ 485f4a3eb02SAdrian Chadd if (CHIPC_QUIRK(sc, 4706_NFLASH) && 486f4a3eb02SAdrian Chadd CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_4706_NFLASH)) 4874ad7e9b0SAdrian Chadd { 488f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_NFLASH_4706; 489f4a3eb02SAdrian Chadd } 490f4a3eb02SAdrian Chadd 49156a4cdd1SLandon J. Fuller 49256a4cdd1SLandon J. Fuller /* Determine NVRAM source. Must occur after the SPROM/OTP/flash 49356a4cdd1SLandon J. Fuller * capability flags have been populated. */ 49456a4cdd1SLandon J. Fuller caps->nvram_src = chipc_find_nvram_src(sc, caps); 49556a4cdd1SLandon J. Fuller 49656a4cdd1SLandon J. Fuller /* Determine the SPROM offset within OTP (if any). SPROM-formatted 49756a4cdd1SLandon J. Fuller * data is placed within the OTP general use region. */ 49856a4cdd1SLandon J. Fuller caps->sprom_offset = 0; 49956a4cdd1SLandon J. Fuller if (caps->nvram_src == BHND_NVRAM_SRC_OTP) { 50056a4cdd1SLandon J. Fuller CHIPC_ASSERT_QUIRK(sc, OTP_IPX); 50156a4cdd1SLandon J. Fuller 50256a4cdd1SLandon J. Fuller /* Bit offset to GUP HW subregion containing SPROM data */ 50356a4cdd1SLandon J. Fuller regval = bhnd_bus_read_4(sc->core, CHIPC_OTPLAYOUT); 50456a4cdd1SLandon J. Fuller caps->sprom_offset = CHIPC_GET_BITS(regval, CHIPC_OTPL_GUP); 50556a4cdd1SLandon J. Fuller 50656a4cdd1SLandon J. Fuller /* Convert to bytes */ 50756a4cdd1SLandon J. Fuller caps->sprom_offset /= 8; 50856a4cdd1SLandon J. Fuller } 50956a4cdd1SLandon J. Fuller 5104ad7e9b0SAdrian Chadd return (0); 5114ad7e9b0SAdrian Chadd } 5124ad7e9b0SAdrian Chadd 513f4a3eb02SAdrian Chadd static int 514f4a3eb02SAdrian Chadd chipc_suspend(device_t dev) 515f4a3eb02SAdrian Chadd { 516f4a3eb02SAdrian Chadd return (bus_generic_suspend(dev)); 517f4a3eb02SAdrian Chadd } 518f4a3eb02SAdrian Chadd 519f4a3eb02SAdrian Chadd static int 520f4a3eb02SAdrian Chadd chipc_resume(device_t dev) 521f4a3eb02SAdrian Chadd { 522f4a3eb02SAdrian Chadd return (bus_generic_resume(dev)); 523f4a3eb02SAdrian Chadd } 524f4a3eb02SAdrian Chadd 525f4a3eb02SAdrian Chadd static void 526f4a3eb02SAdrian Chadd chipc_probe_nomatch(device_t dev, device_t child) 527f4a3eb02SAdrian Chadd { 528f4a3eb02SAdrian Chadd struct resource_list *rl; 529f4a3eb02SAdrian Chadd const char *name; 530f4a3eb02SAdrian Chadd 531f4a3eb02SAdrian Chadd name = device_get_name(child); 532f4a3eb02SAdrian Chadd if (name == NULL) 533f4a3eb02SAdrian Chadd name = "unknown device"; 534f4a3eb02SAdrian Chadd 535f4a3eb02SAdrian Chadd device_printf(dev, "<%s> at", name); 536f4a3eb02SAdrian Chadd 537f4a3eb02SAdrian Chadd rl = BUS_GET_RESOURCE_LIST(dev, child); 538f4a3eb02SAdrian Chadd if (rl != NULL) { 539f4a3eb02SAdrian Chadd resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); 540f4a3eb02SAdrian Chadd resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); 541f4a3eb02SAdrian Chadd } 542f4a3eb02SAdrian Chadd 543f4a3eb02SAdrian Chadd printf(" (no driver attached)\n"); 544f4a3eb02SAdrian Chadd } 545f4a3eb02SAdrian Chadd 546f4a3eb02SAdrian Chadd static int 547f4a3eb02SAdrian Chadd chipc_print_child(device_t dev, device_t child) 548f4a3eb02SAdrian Chadd { 549f4a3eb02SAdrian Chadd struct resource_list *rl; 550f4a3eb02SAdrian Chadd int retval = 0; 551f4a3eb02SAdrian Chadd 552f4a3eb02SAdrian Chadd retval += bus_print_child_header(dev, child); 553f4a3eb02SAdrian Chadd 554f4a3eb02SAdrian Chadd rl = BUS_GET_RESOURCE_LIST(dev, child); 555f4a3eb02SAdrian Chadd if (rl != NULL) { 556f4a3eb02SAdrian Chadd retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, 557f4a3eb02SAdrian Chadd "%#jx"); 558f4a3eb02SAdrian Chadd retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, 559f4a3eb02SAdrian Chadd "%jd"); 560f4a3eb02SAdrian Chadd } 561f4a3eb02SAdrian Chadd 562f4a3eb02SAdrian Chadd retval += bus_print_child_domain(dev, child); 563f4a3eb02SAdrian Chadd retval += bus_print_child_footer(dev, child); 564f4a3eb02SAdrian Chadd 565f4a3eb02SAdrian Chadd return (retval); 566f4a3eb02SAdrian Chadd } 567f4a3eb02SAdrian Chadd 568f4a3eb02SAdrian Chadd static int 569f4a3eb02SAdrian Chadd chipc_child_pnpinfo_str(device_t dev, device_t child, char *buf, 570f4a3eb02SAdrian Chadd size_t buflen) 571f4a3eb02SAdrian Chadd { 572f4a3eb02SAdrian Chadd if (buflen == 0) 573f4a3eb02SAdrian Chadd return (EOVERFLOW); 574f4a3eb02SAdrian Chadd 575f4a3eb02SAdrian Chadd *buf = '\0'; 576f4a3eb02SAdrian Chadd return (0); 577f4a3eb02SAdrian Chadd } 578f4a3eb02SAdrian Chadd 579f4a3eb02SAdrian Chadd static int 580f4a3eb02SAdrian Chadd chipc_child_location_str(device_t dev, device_t child, char *buf, 581f4a3eb02SAdrian Chadd size_t buflen) 582f4a3eb02SAdrian Chadd { 583f4a3eb02SAdrian Chadd if (buflen == 0) 584f4a3eb02SAdrian Chadd return (EOVERFLOW); 585f4a3eb02SAdrian Chadd 586f4a3eb02SAdrian Chadd *buf = '\0'; 587f4a3eb02SAdrian Chadd return (ENXIO); 588f4a3eb02SAdrian Chadd } 589f4a3eb02SAdrian Chadd 590f4a3eb02SAdrian Chadd static device_t 591f4a3eb02SAdrian Chadd chipc_add_child(device_t dev, u_int order, const char *name, int unit) 592f4a3eb02SAdrian Chadd { 5930c91e892SLandon J. Fuller struct chipc_softc *sc; 594f4a3eb02SAdrian Chadd struct chipc_devinfo *dinfo; 595f4a3eb02SAdrian Chadd device_t child; 5960c91e892SLandon J. Fuller 5970c91e892SLandon J. Fuller sc = device_get_softc(dev); 598f4a3eb02SAdrian Chadd 599f4a3eb02SAdrian Chadd child = device_add_child_ordered(dev, order, name, unit); 600f4a3eb02SAdrian Chadd if (child == NULL) 601f4a3eb02SAdrian Chadd return (NULL); 602f4a3eb02SAdrian Chadd 603f4a3eb02SAdrian Chadd dinfo = malloc(sizeof(struct chipc_devinfo), M_BHND, M_NOWAIT); 604f4a3eb02SAdrian Chadd if (dinfo == NULL) { 605f4a3eb02SAdrian Chadd device_delete_child(dev, child); 606f4a3eb02SAdrian Chadd return (NULL); 607f4a3eb02SAdrian Chadd } 608f4a3eb02SAdrian Chadd 609f4a3eb02SAdrian Chadd resource_list_init(&dinfo->resources); 610f4a3eb02SAdrian Chadd device_set_ivars(child, dinfo); 611f4a3eb02SAdrian Chadd 612f4a3eb02SAdrian Chadd return (child); 613f4a3eb02SAdrian Chadd } 614f4a3eb02SAdrian Chadd 615f4a3eb02SAdrian Chadd static void 616f4a3eb02SAdrian Chadd chipc_child_deleted(device_t dev, device_t child) 617f4a3eb02SAdrian Chadd { 618f4a3eb02SAdrian Chadd struct chipc_devinfo *dinfo = device_get_ivars(child); 619f4a3eb02SAdrian Chadd 620f4a3eb02SAdrian Chadd if (dinfo != NULL) { 621f4a3eb02SAdrian Chadd resource_list_free(&dinfo->resources); 622f4a3eb02SAdrian Chadd free(dinfo, M_BHND); 623f4a3eb02SAdrian Chadd } 624f4a3eb02SAdrian Chadd 625f4a3eb02SAdrian Chadd device_set_ivars(child, NULL); 626f4a3eb02SAdrian Chadd } 627f4a3eb02SAdrian Chadd 628f4a3eb02SAdrian Chadd static struct resource_list * 629f4a3eb02SAdrian Chadd chipc_get_resource_list(device_t dev, device_t child) 630f4a3eb02SAdrian Chadd { 631f4a3eb02SAdrian Chadd struct chipc_devinfo *dinfo = device_get_ivars(child); 632f4a3eb02SAdrian Chadd return (&dinfo->resources); 633f4a3eb02SAdrian Chadd } 634f4a3eb02SAdrian Chadd 635f4a3eb02SAdrian Chadd 636f4a3eb02SAdrian Chadd /* Allocate region records for the given port, and add the port's memory 637f4a3eb02SAdrian Chadd * range to the mem_rman */ 638f4a3eb02SAdrian Chadd static int 639f4a3eb02SAdrian Chadd chipc_rman_init_regions (struct chipc_softc *sc, bhnd_port_type type, 640f4a3eb02SAdrian Chadd u_int port) 641f4a3eb02SAdrian Chadd { 642f4a3eb02SAdrian Chadd struct chipc_region *cr; 643f4a3eb02SAdrian Chadd rman_res_t start, end; 644f4a3eb02SAdrian Chadd u_int num_regions; 645f4a3eb02SAdrian Chadd int error; 646f4a3eb02SAdrian Chadd 6470c91e892SLandon J. Fuller num_regions = bhnd_get_region_count(sc->dev, type, port); 648f4a3eb02SAdrian Chadd for (u_int region = 0; region < num_regions; region++) { 649f4a3eb02SAdrian Chadd /* Allocate new region record */ 650f4a3eb02SAdrian Chadd cr = chipc_alloc_region(sc, type, port, region); 651f4a3eb02SAdrian Chadd if (cr == NULL) 652f4a3eb02SAdrian Chadd return (ENODEV); 653f4a3eb02SAdrian Chadd 654f4a3eb02SAdrian Chadd /* Can't manage regions that cannot be allocated */ 655f4a3eb02SAdrian Chadd if (cr->cr_rid < 0) { 656f4a3eb02SAdrian Chadd BHND_DEBUG_DEV(sc->dev, "no rid for chipc region " 657f4a3eb02SAdrian Chadd "%s%u.%u", bhnd_port_type_name(type), port, region); 658f4a3eb02SAdrian Chadd chipc_free_region(sc, cr); 659f4a3eb02SAdrian Chadd continue; 660f4a3eb02SAdrian Chadd } 661f4a3eb02SAdrian Chadd 662f4a3eb02SAdrian Chadd /* Add to rman's managed range */ 663f4a3eb02SAdrian Chadd start = cr->cr_addr; 664f4a3eb02SAdrian Chadd end = cr->cr_end; 665f4a3eb02SAdrian Chadd if ((error = rman_manage_region(&sc->mem_rman, start, end))) { 666f4a3eb02SAdrian Chadd chipc_free_region(sc, cr); 667f4a3eb02SAdrian Chadd return (error); 668f4a3eb02SAdrian Chadd } 669f4a3eb02SAdrian Chadd 670f4a3eb02SAdrian Chadd /* Add to region list */ 671f4a3eb02SAdrian Chadd STAILQ_INSERT_TAIL(&sc->mem_regions, cr, cr_link); 672f4a3eb02SAdrian Chadd } 673f4a3eb02SAdrian Chadd 674f4a3eb02SAdrian Chadd return (0); 675f4a3eb02SAdrian Chadd } 676f4a3eb02SAdrian Chadd 677f4a3eb02SAdrian Chadd /* Initialize memory state for all chipc port regions */ 678f4a3eb02SAdrian Chadd static int 679f4a3eb02SAdrian Chadd chipc_init_rman(struct chipc_softc *sc) 680f4a3eb02SAdrian Chadd { 681f4a3eb02SAdrian Chadd u_int num_ports; 682f4a3eb02SAdrian Chadd int error; 683f4a3eb02SAdrian Chadd 684f4a3eb02SAdrian Chadd /* Port types for which we'll register chipc_region mappings */ 685f4a3eb02SAdrian Chadd bhnd_port_type types[] = { 686f4a3eb02SAdrian Chadd BHND_PORT_DEVICE 687f4a3eb02SAdrian Chadd }; 688f4a3eb02SAdrian Chadd 689f4a3eb02SAdrian Chadd /* Initialize resource manager */ 690f4a3eb02SAdrian Chadd sc->mem_rman.rm_start = 0; 691f4a3eb02SAdrian Chadd sc->mem_rman.rm_end = BUS_SPACE_MAXADDR; 692f4a3eb02SAdrian Chadd sc->mem_rman.rm_type = RMAN_ARRAY; 693f4a3eb02SAdrian Chadd sc->mem_rman.rm_descr = "ChipCommon Device Memory"; 694f4a3eb02SAdrian Chadd if ((error = rman_init(&sc->mem_rman))) { 695f4a3eb02SAdrian Chadd device_printf(sc->dev, "could not initialize mem_rman: %d\n", 696f4a3eb02SAdrian Chadd error); 697f4a3eb02SAdrian Chadd return (error); 698f4a3eb02SAdrian Chadd } 699f4a3eb02SAdrian Chadd 700f4a3eb02SAdrian Chadd /* Populate per-port-region state */ 701f4a3eb02SAdrian Chadd for (u_int i = 0; i < nitems(types); i++) { 702f4a3eb02SAdrian Chadd num_ports = bhnd_get_port_count(sc->dev, types[i]); 703f4a3eb02SAdrian Chadd for (u_int port = 0; port < num_ports; port++) { 704f4a3eb02SAdrian Chadd error = chipc_rman_init_regions(sc, types[i], port); 705f4a3eb02SAdrian Chadd if (error) { 706f4a3eb02SAdrian Chadd device_printf(sc->dev, 707f4a3eb02SAdrian Chadd "region init failed for %s%u: %d\n", 708f4a3eb02SAdrian Chadd bhnd_port_type_name(types[i]), port, 709f4a3eb02SAdrian Chadd error); 710f4a3eb02SAdrian Chadd 711f4a3eb02SAdrian Chadd goto failed; 712f4a3eb02SAdrian Chadd } 713f4a3eb02SAdrian Chadd } 714f4a3eb02SAdrian Chadd } 715f4a3eb02SAdrian Chadd 716f4a3eb02SAdrian Chadd return (0); 717f4a3eb02SAdrian Chadd 718f4a3eb02SAdrian Chadd failed: 719f4a3eb02SAdrian Chadd chipc_free_rman(sc); 720f4a3eb02SAdrian Chadd return (error); 721f4a3eb02SAdrian Chadd } 722f4a3eb02SAdrian Chadd 723f4a3eb02SAdrian Chadd /* Free memory management state */ 724f4a3eb02SAdrian Chadd static void 725f4a3eb02SAdrian Chadd chipc_free_rman(struct chipc_softc *sc) 726f4a3eb02SAdrian Chadd { 727f4a3eb02SAdrian Chadd struct chipc_region *cr, *cr_next; 728f4a3eb02SAdrian Chadd 729f4a3eb02SAdrian Chadd STAILQ_FOREACH_SAFE(cr, &sc->mem_regions, cr_link, cr_next) 730f4a3eb02SAdrian Chadd chipc_free_region(sc, cr); 731f4a3eb02SAdrian Chadd 732f4a3eb02SAdrian Chadd rman_fini(&sc->mem_rman); 733f4a3eb02SAdrian Chadd } 734f4a3eb02SAdrian Chadd 735f4a3eb02SAdrian Chadd /** 736f4a3eb02SAdrian Chadd * Return the rman instance for a given resource @p type, if any. 737f4a3eb02SAdrian Chadd * 738f4a3eb02SAdrian Chadd * @param sc The chipc device state. 739f4a3eb02SAdrian Chadd * @param type The resource type (e.g. SYS_RES_MEMORY, SYS_RES_IRQ, ...) 740f4a3eb02SAdrian Chadd */ 741f4a3eb02SAdrian Chadd static struct rman * 742f4a3eb02SAdrian Chadd chipc_get_rman(struct chipc_softc *sc, int type) 743f4a3eb02SAdrian Chadd { 744f4a3eb02SAdrian Chadd switch (type) { 745f4a3eb02SAdrian Chadd case SYS_RES_MEMORY: 746f4a3eb02SAdrian Chadd return (&sc->mem_rman); 747f4a3eb02SAdrian Chadd 748f4a3eb02SAdrian Chadd case SYS_RES_IRQ: 749f4a3eb02SAdrian Chadd /* IRQs can be used with RF_SHAREABLE, so we don't perform 750f4a3eb02SAdrian Chadd * any local proxying of resource requests. */ 751f4a3eb02SAdrian Chadd return (NULL); 752f4a3eb02SAdrian Chadd 753f4a3eb02SAdrian Chadd default: 754f4a3eb02SAdrian Chadd return (NULL); 755f4a3eb02SAdrian Chadd }; 756f4a3eb02SAdrian Chadd } 757f4a3eb02SAdrian Chadd 758f4a3eb02SAdrian Chadd static struct resource * 759f4a3eb02SAdrian Chadd chipc_alloc_resource(device_t dev, device_t child, int type, 760f4a3eb02SAdrian Chadd int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 761f4a3eb02SAdrian Chadd { 762f4a3eb02SAdrian Chadd struct chipc_softc *sc; 763f4a3eb02SAdrian Chadd struct chipc_region *cr; 764f4a3eb02SAdrian Chadd struct resource_list_entry *rle; 765f4a3eb02SAdrian Chadd struct resource *rv; 766f4a3eb02SAdrian Chadd struct rman *rm; 767f4a3eb02SAdrian Chadd int error; 768f4a3eb02SAdrian Chadd bool passthrough, isdefault; 769f4a3eb02SAdrian Chadd 770f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 771f4a3eb02SAdrian Chadd passthrough = (device_get_parent(child) != dev); 772f4a3eb02SAdrian Chadd isdefault = RMAN_IS_DEFAULT_RANGE(start, end); 773f4a3eb02SAdrian Chadd rle = NULL; 774f4a3eb02SAdrian Chadd 775f4a3eb02SAdrian Chadd /* Fetch the resource manager, delegate request if necessary */ 776f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 777f4a3eb02SAdrian Chadd if (rm == NULL) { 778f4a3eb02SAdrian Chadd /* Requested resource type is delegated to our parent */ 779f4a3eb02SAdrian Chadd rv = bus_generic_rl_alloc_resource(dev, child, type, rid, 780f4a3eb02SAdrian Chadd start, end, count, flags); 781f4a3eb02SAdrian Chadd return (rv); 782f4a3eb02SAdrian Chadd } 783f4a3eb02SAdrian Chadd 784f4a3eb02SAdrian Chadd /* Populate defaults */ 785f4a3eb02SAdrian Chadd if (!passthrough && isdefault) { 786f4a3eb02SAdrian Chadd /* Fetch the resource list entry. */ 787f4a3eb02SAdrian Chadd rle = resource_list_find(BUS_GET_RESOURCE_LIST(dev, child), 788f4a3eb02SAdrian Chadd type, *rid); 789f4a3eb02SAdrian Chadd if (rle == NULL) { 790f4a3eb02SAdrian Chadd device_printf(dev, 791f4a3eb02SAdrian Chadd "default resource %#x type %d for child %s " 792f4a3eb02SAdrian Chadd "not found\n", *rid, type, 793f4a3eb02SAdrian Chadd device_get_nameunit(child)); 794f4a3eb02SAdrian Chadd return (NULL); 795f4a3eb02SAdrian Chadd } 796f4a3eb02SAdrian Chadd 797f4a3eb02SAdrian Chadd if (rle->res != NULL) { 798f4a3eb02SAdrian Chadd device_printf(dev, 7992b693a88SLandon J. Fuller "resource entry %#x type %d for child %s is busy " 8002b693a88SLandon J. Fuller "[%d]\n", 8012b693a88SLandon J. Fuller *rid, type, device_get_nameunit(child), 8022b693a88SLandon J. Fuller rman_get_flags(rle->res)); 803f4a3eb02SAdrian Chadd 804f4a3eb02SAdrian Chadd return (NULL); 805f4a3eb02SAdrian Chadd } 806f4a3eb02SAdrian Chadd 807f4a3eb02SAdrian Chadd start = rle->start; 808f4a3eb02SAdrian Chadd end = rle->end; 809f4a3eb02SAdrian Chadd count = ulmax(count, rle->count); 810f4a3eb02SAdrian Chadd } 811f4a3eb02SAdrian Chadd 812f4a3eb02SAdrian Chadd /* Locate a mapping region */ 813f4a3eb02SAdrian Chadd if ((cr = chipc_find_region(sc, start, end)) == NULL) { 814f4a3eb02SAdrian Chadd /* Resource requests outside our shared port regions can be 815f4a3eb02SAdrian Chadd * delegated to our parent. */ 816f4a3eb02SAdrian Chadd rv = bus_generic_rl_alloc_resource(dev, child, type, rid, 817f4a3eb02SAdrian Chadd start, end, count, flags); 818f4a3eb02SAdrian Chadd return (rv); 819f4a3eb02SAdrian Chadd } 820f4a3eb02SAdrian Chadd 821f4a3eb02SAdrian Chadd /* Try to retain a region reference */ 8227d1fb1aaSLandon J. Fuller if ((error = chipc_retain_region(sc, cr, RF_ALLOCATED))) 823f4a3eb02SAdrian Chadd return (NULL); 824f4a3eb02SAdrian Chadd 825f4a3eb02SAdrian Chadd /* Make our rman reservation */ 826f4a3eb02SAdrian Chadd rv = rman_reserve_resource(rm, start, end, count, flags & ~RF_ACTIVE, 827f4a3eb02SAdrian Chadd child); 828f4a3eb02SAdrian Chadd if (rv == NULL) { 829f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ALLOCATED); 830f4a3eb02SAdrian Chadd return (NULL); 831f4a3eb02SAdrian Chadd } 832f4a3eb02SAdrian Chadd 833f4a3eb02SAdrian Chadd rman_set_rid(rv, *rid); 834f4a3eb02SAdrian Chadd 835f4a3eb02SAdrian Chadd /* Activate */ 836f4a3eb02SAdrian Chadd if (flags & RF_ACTIVE) { 837f4a3eb02SAdrian Chadd error = bus_activate_resource(child, type, *rid, rv); 838f4a3eb02SAdrian Chadd if (error) { 839f4a3eb02SAdrian Chadd device_printf(dev, 840f4a3eb02SAdrian Chadd "failed to activate entry %#x type %d for " 841f4a3eb02SAdrian Chadd "child %s: %d\n", 842f4a3eb02SAdrian Chadd *rid, type, device_get_nameunit(child), error); 843f4a3eb02SAdrian Chadd 844f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ALLOCATED); 845f4a3eb02SAdrian Chadd rman_release_resource(rv); 846f4a3eb02SAdrian Chadd 847f4a3eb02SAdrian Chadd return (NULL); 848f4a3eb02SAdrian Chadd } 849f4a3eb02SAdrian Chadd } 850f4a3eb02SAdrian Chadd 851f4a3eb02SAdrian Chadd /* Update child's resource list entry */ 852f4a3eb02SAdrian Chadd if (rle != NULL) { 853f4a3eb02SAdrian Chadd rle->res = rv; 854f4a3eb02SAdrian Chadd rle->start = rman_get_start(rv); 855f4a3eb02SAdrian Chadd rle->end = rman_get_end(rv); 856f4a3eb02SAdrian Chadd rle->count = rman_get_size(rv); 857f4a3eb02SAdrian Chadd } 858f4a3eb02SAdrian Chadd 859f4a3eb02SAdrian Chadd return (rv); 860f4a3eb02SAdrian Chadd } 861f4a3eb02SAdrian Chadd 862f4a3eb02SAdrian Chadd static int 863f4a3eb02SAdrian Chadd chipc_release_resource(device_t dev, device_t child, int type, int rid, 864f4a3eb02SAdrian Chadd struct resource *r) 865f4a3eb02SAdrian Chadd { 866f4a3eb02SAdrian Chadd struct chipc_softc *sc; 867f4a3eb02SAdrian Chadd struct chipc_region *cr; 868f4a3eb02SAdrian Chadd struct rman *rm; 8692b693a88SLandon J. Fuller struct resource_list_entry *rle; 870f4a3eb02SAdrian Chadd int error; 871f4a3eb02SAdrian Chadd 872f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 873f4a3eb02SAdrian Chadd 874f4a3eb02SAdrian Chadd /* Handled by parent bus? */ 875f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 876f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 877f4a3eb02SAdrian Chadd return (bus_generic_rl_release_resource(dev, child, type, rid, 878f4a3eb02SAdrian Chadd r)); 879f4a3eb02SAdrian Chadd } 880f4a3eb02SAdrian Chadd 881f4a3eb02SAdrian Chadd /* Locate the mapping region */ 882f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, rman_get_start(r), rman_get_end(r)); 883f4a3eb02SAdrian Chadd if (cr == NULL) 884f4a3eb02SAdrian Chadd return (EINVAL); 885f4a3eb02SAdrian Chadd 886f4a3eb02SAdrian Chadd /* Deactivate resources */ 887f4a3eb02SAdrian Chadd if (rman_get_flags(r) & RF_ACTIVE) { 888f4a3eb02SAdrian Chadd error = BUS_DEACTIVATE_RESOURCE(dev, child, type, rid, r); 889f4a3eb02SAdrian Chadd if (error) 890f4a3eb02SAdrian Chadd return (error); 891f4a3eb02SAdrian Chadd } 892f4a3eb02SAdrian Chadd 893f4a3eb02SAdrian Chadd if ((error = rman_release_resource(r))) 894f4a3eb02SAdrian Chadd return (error); 895f4a3eb02SAdrian Chadd 896f4a3eb02SAdrian Chadd /* Drop allocation reference */ 897f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ALLOCATED); 898f4a3eb02SAdrian Chadd 8992b693a88SLandon J. Fuller /* Clear reference from the resource list entry if exists */ 9002b693a88SLandon J. Fuller rle = resource_list_find(BUS_GET_RESOURCE_LIST(dev, child), type, rid); 9012b693a88SLandon J. Fuller if (rle != NULL) 9022b693a88SLandon J. Fuller rle->res = NULL; 9032b693a88SLandon J. Fuller 904f4a3eb02SAdrian Chadd return (0); 905f4a3eb02SAdrian Chadd } 906f4a3eb02SAdrian Chadd 907f4a3eb02SAdrian Chadd static int 908f4a3eb02SAdrian Chadd chipc_adjust_resource(device_t dev, device_t child, int type, 909f4a3eb02SAdrian Chadd struct resource *r, rman_res_t start, rman_res_t end) 910f4a3eb02SAdrian Chadd { 911f4a3eb02SAdrian Chadd struct chipc_softc *sc; 912f4a3eb02SAdrian Chadd struct chipc_region *cr; 913f4a3eb02SAdrian Chadd struct rman *rm; 914f4a3eb02SAdrian Chadd 915f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 916f4a3eb02SAdrian Chadd 917f4a3eb02SAdrian Chadd /* Handled by parent bus? */ 918f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 919f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 920f4a3eb02SAdrian Chadd return (bus_generic_adjust_resource(dev, child, type, r, start, 921f4a3eb02SAdrian Chadd end)); 922f4a3eb02SAdrian Chadd } 923f4a3eb02SAdrian Chadd 924f4a3eb02SAdrian Chadd /* The range is limited to the existing region mapping */ 925f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, rman_get_start(r), rman_get_end(r)); 926f4a3eb02SAdrian Chadd if (cr == NULL) 927f4a3eb02SAdrian Chadd return (EINVAL); 928f4a3eb02SAdrian Chadd 929f4a3eb02SAdrian Chadd if (end <= start) 930f4a3eb02SAdrian Chadd return (EINVAL); 931f4a3eb02SAdrian Chadd 932f4a3eb02SAdrian Chadd if (start < cr->cr_addr || end > cr->cr_end) 933f4a3eb02SAdrian Chadd return (EINVAL); 934f4a3eb02SAdrian Chadd 935f4a3eb02SAdrian Chadd /* Range falls within the existing region */ 936f4a3eb02SAdrian Chadd return (rman_adjust_resource(r, start, end)); 937f4a3eb02SAdrian Chadd } 938f4a3eb02SAdrian Chadd 939f4a3eb02SAdrian Chadd /** 940f4a3eb02SAdrian Chadd * Retain an RF_ACTIVE reference to the region mapping @p r, and 941f4a3eb02SAdrian Chadd * configure @p r with its subregion values. 942f4a3eb02SAdrian Chadd * 943f4a3eb02SAdrian Chadd * @param sc Driver instance state. 944f4a3eb02SAdrian Chadd * @param child Requesting child device. 945f4a3eb02SAdrian Chadd * @param type resource type of @p r. 946f4a3eb02SAdrian Chadd * @param rid resource id of @p r 947f4a3eb02SAdrian Chadd * @param r resource to be activated. 948f4a3eb02SAdrian Chadd * @param req_direct If true, failure to allocate a direct bhnd resource 949f4a3eb02SAdrian Chadd * will be treated as an error. If false, the resource will not be marked 950f4a3eb02SAdrian Chadd * as RF_ACTIVE if bhnd direct resource allocation fails. 951f4a3eb02SAdrian Chadd */ 952f4a3eb02SAdrian Chadd static int 953f4a3eb02SAdrian Chadd chipc_try_activate_resource(struct chipc_softc *sc, device_t child, int type, 954f4a3eb02SAdrian Chadd int rid, struct resource *r, bool req_direct) 955f4a3eb02SAdrian Chadd { 956f4a3eb02SAdrian Chadd struct rman *rm; 957f4a3eb02SAdrian Chadd struct chipc_region *cr; 958f4a3eb02SAdrian Chadd bhnd_size_t cr_offset; 959f4a3eb02SAdrian Chadd rman_res_t r_start, r_end, r_size; 960f4a3eb02SAdrian Chadd int error; 961f4a3eb02SAdrian Chadd 962f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 963f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) 964f4a3eb02SAdrian Chadd return (EINVAL); 965f4a3eb02SAdrian Chadd 966f4a3eb02SAdrian Chadd r_start = rman_get_start(r); 967f4a3eb02SAdrian Chadd r_end = rman_get_end(r); 968f4a3eb02SAdrian Chadd r_size = rman_get_size(r); 969f4a3eb02SAdrian Chadd 970f4a3eb02SAdrian Chadd /* Find the corresponding chipc region */ 971f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, r_start, r_end); 972f4a3eb02SAdrian Chadd if (cr == NULL) 973f4a3eb02SAdrian Chadd return (EINVAL); 974f4a3eb02SAdrian Chadd 975f4a3eb02SAdrian Chadd /* Calculate subregion offset within the chipc region */ 976f4a3eb02SAdrian Chadd cr_offset = r_start - cr->cr_addr; 977f4a3eb02SAdrian Chadd 978f4a3eb02SAdrian Chadd /* Retain (and activate, if necessary) the chipc region */ 979f4a3eb02SAdrian Chadd if ((error = chipc_retain_region(sc, cr, RF_ACTIVE))) 980f4a3eb02SAdrian Chadd return (error); 981f4a3eb02SAdrian Chadd 982f4a3eb02SAdrian Chadd /* Configure child resource with its subregion values. */ 983f4a3eb02SAdrian Chadd if (cr->cr_res->direct) { 984f4a3eb02SAdrian Chadd error = chipc_init_child_resource(r, cr->cr_res->res, 985f4a3eb02SAdrian Chadd cr_offset, r_size); 986f4a3eb02SAdrian Chadd if (error) 987f4a3eb02SAdrian Chadd goto cleanup; 988f4a3eb02SAdrian Chadd 989f4a3eb02SAdrian Chadd /* Mark active */ 990f4a3eb02SAdrian Chadd if ((error = rman_activate_resource(r))) 991f4a3eb02SAdrian Chadd goto cleanup; 992f4a3eb02SAdrian Chadd } else if (req_direct) { 993f4a3eb02SAdrian Chadd error = ENOMEM; 994f4a3eb02SAdrian Chadd goto cleanup; 995f4a3eb02SAdrian Chadd } 996f4a3eb02SAdrian Chadd 997f4a3eb02SAdrian Chadd return (0); 998f4a3eb02SAdrian Chadd 999f4a3eb02SAdrian Chadd cleanup: 1000f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ACTIVE); 1001f4a3eb02SAdrian Chadd return (error); 1002f4a3eb02SAdrian Chadd } 1003f4a3eb02SAdrian Chadd 1004f4a3eb02SAdrian Chadd static int 1005f4a3eb02SAdrian Chadd chipc_activate_bhnd_resource(device_t dev, device_t child, int type, 1006f4a3eb02SAdrian Chadd int rid, struct bhnd_resource *r) 1007f4a3eb02SAdrian Chadd { 1008f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1009f4a3eb02SAdrian Chadd struct rman *rm; 1010f4a3eb02SAdrian Chadd int error; 1011f4a3eb02SAdrian Chadd 1012f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1013f4a3eb02SAdrian Chadd 1014f4a3eb02SAdrian Chadd /* Delegate non-locally managed resources to parent */ 1015f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1016f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r->res, rm)) { 1017f4a3eb02SAdrian Chadd return (bhnd_bus_generic_activate_resource(dev, child, type, 1018f4a3eb02SAdrian Chadd rid, r)); 1019f4a3eb02SAdrian Chadd } 1020f4a3eb02SAdrian Chadd 1021f4a3eb02SAdrian Chadd /* Try activating the chipc region resource */ 1022f4a3eb02SAdrian Chadd error = chipc_try_activate_resource(sc, child, type, rid, r->res, 1023f4a3eb02SAdrian Chadd false); 1024f4a3eb02SAdrian Chadd if (error) 1025f4a3eb02SAdrian Chadd return (error); 1026f4a3eb02SAdrian Chadd 1027f4a3eb02SAdrian Chadd /* Mark the child resource as direct according to the returned resource 1028f4a3eb02SAdrian Chadd * state */ 1029f4a3eb02SAdrian Chadd if (rman_get_flags(r->res) & RF_ACTIVE) 1030f4a3eb02SAdrian Chadd r->direct = true; 1031f4a3eb02SAdrian Chadd 1032f4a3eb02SAdrian Chadd return (0); 1033f4a3eb02SAdrian Chadd } 1034f4a3eb02SAdrian Chadd 1035f4a3eb02SAdrian Chadd static int 1036f4a3eb02SAdrian Chadd chipc_activate_resource(device_t dev, device_t child, int type, int rid, 1037f4a3eb02SAdrian Chadd struct resource *r) 1038f4a3eb02SAdrian Chadd { 1039f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1040f4a3eb02SAdrian Chadd struct rman *rm; 1041f4a3eb02SAdrian Chadd 1042f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1043f4a3eb02SAdrian Chadd 1044f4a3eb02SAdrian Chadd /* Delegate non-locally managed resources to parent */ 1045f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1046f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 1047f4a3eb02SAdrian Chadd return (bus_generic_activate_resource(dev, child, type, rid, 1048f4a3eb02SAdrian Chadd r)); 1049f4a3eb02SAdrian Chadd } 1050f4a3eb02SAdrian Chadd 1051f4a3eb02SAdrian Chadd /* Try activating the chipc region-based resource */ 1052f4a3eb02SAdrian Chadd return (chipc_try_activate_resource(sc, child, type, rid, r, true)); 1053f4a3eb02SAdrian Chadd } 1054f4a3eb02SAdrian Chadd 1055f4a3eb02SAdrian Chadd /** 1056f4a3eb02SAdrian Chadd * Default bhndb(4) implementation of BUS_DEACTIVATE_RESOURCE(). 1057f4a3eb02SAdrian Chadd */ 1058f4a3eb02SAdrian Chadd static int 1059f4a3eb02SAdrian Chadd chipc_deactivate_resource(device_t dev, device_t child, int type, 1060f4a3eb02SAdrian Chadd int rid, struct resource *r) 1061f4a3eb02SAdrian Chadd { 1062f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1063f4a3eb02SAdrian Chadd struct chipc_region *cr; 1064f4a3eb02SAdrian Chadd struct rman *rm; 1065f4a3eb02SAdrian Chadd int error; 1066f4a3eb02SAdrian Chadd 1067f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1068f4a3eb02SAdrian Chadd 1069f4a3eb02SAdrian Chadd /* Handled by parent bus? */ 1070f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1071f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 1072f4a3eb02SAdrian Chadd return (bus_generic_deactivate_resource(dev, child, type, rid, 1073f4a3eb02SAdrian Chadd r)); 1074f4a3eb02SAdrian Chadd } 1075f4a3eb02SAdrian Chadd 1076f4a3eb02SAdrian Chadd /* Find the corresponding chipc region */ 1077f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, rman_get_start(r), rman_get_end(r)); 1078f4a3eb02SAdrian Chadd if (cr == NULL) 1079f4a3eb02SAdrian Chadd return (EINVAL); 1080f4a3eb02SAdrian Chadd 1081f4a3eb02SAdrian Chadd /* Mark inactive */ 1082f4a3eb02SAdrian Chadd if ((error = rman_deactivate_resource(r))) 1083f4a3eb02SAdrian Chadd return (error); 1084f4a3eb02SAdrian Chadd 1085f4a3eb02SAdrian Chadd /* Drop associated RF_ACTIVE reference */ 1086f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ACTIVE); 1087f4a3eb02SAdrian Chadd 1088f4a3eb02SAdrian Chadd return (0); 1089f4a3eb02SAdrian Chadd } 1090f4a3eb02SAdrian Chadd 1091f4a3eb02SAdrian Chadd /** 1092f4a3eb02SAdrian Chadd * Examine bus state and make a best effort determination of whether it's 1093f4a3eb02SAdrian Chadd * likely safe to enable the muxed SPROM pins. 1094f4a3eb02SAdrian Chadd * 1095f4a3eb02SAdrian Chadd * On devices that do not use SPROM pin muxing, always returns true. 1096f4a3eb02SAdrian Chadd * 1097f4a3eb02SAdrian Chadd * @param sc chipc driver state. 1098f4a3eb02SAdrian Chadd */ 1099f4a3eb02SAdrian Chadd static bool 1100f4a3eb02SAdrian Chadd chipc_should_enable_sprom(struct chipc_softc *sc) 1101f4a3eb02SAdrian Chadd { 1102f4a3eb02SAdrian Chadd device_t *devs; 1103f4a3eb02SAdrian Chadd device_t hostb; 1104f4a3eb02SAdrian Chadd device_t parent; 1105f4a3eb02SAdrian Chadd int devcount; 1106f4a3eb02SAdrian Chadd int error; 1107f4a3eb02SAdrian Chadd bool result; 1108f4a3eb02SAdrian Chadd 1109f4a3eb02SAdrian Chadd mtx_assert(&Giant, MA_OWNED); /* for newbus */ 1110f4a3eb02SAdrian Chadd 1111f4a3eb02SAdrian Chadd /* Nothing to do? */ 1112f4a3eb02SAdrian Chadd if (!CHIPC_QUIRK(sc, MUX_SPROM)) 1113f4a3eb02SAdrian Chadd return (true); 1114f4a3eb02SAdrian Chadd 1115f4a3eb02SAdrian Chadd parent = device_get_parent(sc->dev); 1116f4a3eb02SAdrian Chadd hostb = bhnd_find_hostb_device(parent); 1117f4a3eb02SAdrian Chadd 1118f4a3eb02SAdrian Chadd if ((error = device_get_children(parent, &devs, &devcount))) 1119f4a3eb02SAdrian Chadd return (false); 1120f4a3eb02SAdrian Chadd 1121f4a3eb02SAdrian Chadd /* Reject any active devices other than ChipCommon, or the 1122f4a3eb02SAdrian Chadd * host bridge (if any). */ 1123f4a3eb02SAdrian Chadd result = true; 1124f4a3eb02SAdrian Chadd for (int i = 0; i < devcount; i++) { 1125f4a3eb02SAdrian Chadd if (devs[i] == hostb || devs[i] == sc->dev) 1126f4a3eb02SAdrian Chadd continue; 1127f4a3eb02SAdrian Chadd 1128f4a3eb02SAdrian Chadd if (!device_is_attached(devs[i])) 1129f4a3eb02SAdrian Chadd continue; 1130f4a3eb02SAdrian Chadd 1131f4a3eb02SAdrian Chadd if (device_is_suspended(devs[i])) 1132f4a3eb02SAdrian Chadd continue; 1133f4a3eb02SAdrian Chadd 1134f4a3eb02SAdrian Chadd /* Active device; assume SPROM is busy */ 1135f4a3eb02SAdrian Chadd result = false; 1136f4a3eb02SAdrian Chadd break; 1137f4a3eb02SAdrian Chadd } 1138f4a3eb02SAdrian Chadd 1139f4a3eb02SAdrian Chadd free(devs, M_TEMP); 1140f4a3eb02SAdrian Chadd return (result); 1141f4a3eb02SAdrian Chadd } 1142e83ce340SAdrian Chadd 1143e83ce340SAdrian Chadd /** 1144e83ce340SAdrian Chadd * If required by this device, enable access to the SPROM. 1145e83ce340SAdrian Chadd * 1146e83ce340SAdrian Chadd * @param sc chipc driver state. 1147e83ce340SAdrian Chadd */ 1148e83ce340SAdrian Chadd static int 1149f4a3eb02SAdrian Chadd chipc_enable_sprom_pins(device_t dev) 1150e83ce340SAdrian Chadd { 1151f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1152e83ce340SAdrian Chadd uint32_t cctrl; 1153f4a3eb02SAdrian Chadd int error; 1154e83ce340SAdrian Chadd 1155f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1156e83ce340SAdrian Chadd 1157e83ce340SAdrian Chadd /* Nothing to do? */ 1158e83ce340SAdrian Chadd if (!CHIPC_QUIRK(sc, MUX_SPROM)) 1159e83ce340SAdrian Chadd return (0); 1160e83ce340SAdrian Chadd 1161f4a3eb02SAdrian Chadd /* Make sure we're holding Giant for newbus */ 1162f4a3eb02SAdrian Chadd mtx_lock(&Giant); 1163f4a3eb02SAdrian Chadd CHIPC_LOCK(sc); 1164f4a3eb02SAdrian Chadd 1165f4a3eb02SAdrian Chadd /* Already enabled? */ 1166f4a3eb02SAdrian Chadd if (sc->sprom_refcnt >= 1) { 1167f4a3eb02SAdrian Chadd error = 0; 1168f4a3eb02SAdrian Chadd goto finished; 1169f4a3eb02SAdrian Chadd } 1170f4a3eb02SAdrian Chadd 1171f4a3eb02SAdrian Chadd /* Check whether bus is busy */ 1172f4a3eb02SAdrian Chadd if (!chipc_should_enable_sprom(sc)) { 1173f4a3eb02SAdrian Chadd error = EBUSY; 1174f4a3eb02SAdrian Chadd goto finished; 1175f4a3eb02SAdrian Chadd } 1176f4a3eb02SAdrian Chadd 1177e83ce340SAdrian Chadd cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); 1178e83ce340SAdrian Chadd 1179e83ce340SAdrian Chadd /* 4331 devices */ 1180e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA_MUX_SPROM)) { 1181e83ce340SAdrian Chadd cctrl &= ~CHIPC_CCTRL4331_EXTPA_EN; 1182e83ce340SAdrian Chadd 1183e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_GPIO2_5_MUX_SPROM)) 1184e83ce340SAdrian Chadd cctrl &= ~CHIPC_CCTRL4331_EXTPA_ON_GPIO2_5; 1185e83ce340SAdrian Chadd 1186e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA2_MUX_SPROM)) 1187e83ce340SAdrian Chadd cctrl &= ~CHIPC_CCTRL4331_EXTPA_EN2; 1188e83ce340SAdrian Chadd 1189e83ce340SAdrian Chadd bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); 1190f4a3eb02SAdrian Chadd error = 0; 1191f4a3eb02SAdrian Chadd goto finished; 1192e83ce340SAdrian Chadd } 1193e83ce340SAdrian Chadd 1194e83ce340SAdrian Chadd /* 4360 devices */ 1195e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4360_FEM_MUX_SPROM)) { 1196e83ce340SAdrian Chadd /* Unimplemented */ 1197e83ce340SAdrian Chadd } 1198e83ce340SAdrian Chadd 1199e83ce340SAdrian Chadd /* Refuse to proceed on unsupported devices with muxed SPROM pins */ 1200e83ce340SAdrian Chadd device_printf(sc->dev, "muxed sprom lines on unrecognized device\n"); 1201f4a3eb02SAdrian Chadd error = ENXIO; 1202f4a3eb02SAdrian Chadd 1203f4a3eb02SAdrian Chadd finished: 1204f4a3eb02SAdrian Chadd /* Bump the reference count */ 1205f4a3eb02SAdrian Chadd if (error == 0) 1206f4a3eb02SAdrian Chadd sc->sprom_refcnt++; 1207f4a3eb02SAdrian Chadd 1208f4a3eb02SAdrian Chadd CHIPC_UNLOCK(sc); 1209f4a3eb02SAdrian Chadd mtx_unlock(&Giant); 1210f4a3eb02SAdrian Chadd 1211f4a3eb02SAdrian Chadd return (error); 1212e83ce340SAdrian Chadd } 1213e83ce340SAdrian Chadd 1214e83ce340SAdrian Chadd /** 1215e83ce340SAdrian Chadd * If required by this device, revert any GPIO/pin configuration applied 1216e83ce340SAdrian Chadd * to allow SPROM access. 1217e83ce340SAdrian Chadd * 1218e83ce340SAdrian Chadd * @param sc chipc driver state. 1219e83ce340SAdrian Chadd */ 1220f4a3eb02SAdrian Chadd static void 1221f4a3eb02SAdrian Chadd chipc_disable_sprom_pins(device_t dev) 1222e83ce340SAdrian Chadd { 1223f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1224e83ce340SAdrian Chadd uint32_t cctrl; 1225e83ce340SAdrian Chadd 1226f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1227e83ce340SAdrian Chadd 1228e83ce340SAdrian Chadd /* Nothing to do? */ 1229e83ce340SAdrian Chadd if (!CHIPC_QUIRK(sc, MUX_SPROM)) 1230f4a3eb02SAdrian Chadd return; 1231f4a3eb02SAdrian Chadd 1232f4a3eb02SAdrian Chadd CHIPC_LOCK(sc); 1233f4a3eb02SAdrian Chadd 1234f4a3eb02SAdrian Chadd /* Check reference count, skip disable if in-use. */ 1235f4a3eb02SAdrian Chadd KASSERT(sc->sprom_refcnt > 0, ("sprom refcnt overrelease")); 1236f4a3eb02SAdrian Chadd sc->sprom_refcnt--; 1237f4a3eb02SAdrian Chadd if (sc->sprom_refcnt > 0) 1238f4a3eb02SAdrian Chadd goto finished; 1239e83ce340SAdrian Chadd 1240e83ce340SAdrian Chadd cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); 1241e83ce340SAdrian Chadd 1242e83ce340SAdrian Chadd /* 4331 devices */ 1243e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA_MUX_SPROM)) { 1244e83ce340SAdrian Chadd cctrl |= CHIPC_CCTRL4331_EXTPA_EN; 1245e83ce340SAdrian Chadd 1246e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_GPIO2_5_MUX_SPROM)) 1247e83ce340SAdrian Chadd cctrl |= CHIPC_CCTRL4331_EXTPA_ON_GPIO2_5; 1248e83ce340SAdrian Chadd 1249e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA2_MUX_SPROM)) 1250e83ce340SAdrian Chadd cctrl |= CHIPC_CCTRL4331_EXTPA_EN2; 1251e83ce340SAdrian Chadd 1252e83ce340SAdrian Chadd bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); 1253f4a3eb02SAdrian Chadd goto finished; 1254e83ce340SAdrian Chadd } 1255e83ce340SAdrian Chadd 1256e83ce340SAdrian Chadd /* 4360 devices */ 1257e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4360_FEM_MUX_SPROM)) { 1258e83ce340SAdrian Chadd /* Unimplemented */ 1259e83ce340SAdrian Chadd } 1260e83ce340SAdrian Chadd 1261f4a3eb02SAdrian Chadd finished: 1262f4a3eb02SAdrian Chadd CHIPC_UNLOCK(sc); 1263e83ce340SAdrian Chadd } 1264e83ce340SAdrian Chadd 12658ef24a0dSAdrian Chadd static void 12668ef24a0dSAdrian Chadd chipc_write_chipctrl(device_t dev, uint32_t value, uint32_t mask) 12678ef24a0dSAdrian Chadd { 12688ef24a0dSAdrian Chadd struct chipc_softc *sc; 12698ef24a0dSAdrian Chadd uint32_t cctrl; 12708ef24a0dSAdrian Chadd 12718ef24a0dSAdrian Chadd sc = device_get_softc(dev); 12728ef24a0dSAdrian Chadd 12738ef24a0dSAdrian Chadd CHIPC_LOCK(sc); 12748ef24a0dSAdrian Chadd 12758ef24a0dSAdrian Chadd cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); 12768ef24a0dSAdrian Chadd cctrl = (cctrl & ~mask) | (value | mask); 12778ef24a0dSAdrian Chadd bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); 12788ef24a0dSAdrian Chadd 12798ef24a0dSAdrian Chadd CHIPC_UNLOCK(sc); 12808ef24a0dSAdrian Chadd } 12818ef24a0dSAdrian Chadd 12822b693a88SLandon J. Fuller static struct chipc_caps * 12832b693a88SLandon J. Fuller chipc_get_caps(device_t dev) 12842b693a88SLandon J. Fuller { 12852b693a88SLandon J. Fuller struct chipc_softc *sc; 12862b693a88SLandon J. Fuller 12872b693a88SLandon J. Fuller sc = device_get_softc(dev); 12882b693a88SLandon J. Fuller return (&sc->caps); 12892b693a88SLandon J. Fuller } 12902b693a88SLandon J. Fuller 12914ad7e9b0SAdrian Chadd static device_method_t chipc_methods[] = { 12924ad7e9b0SAdrian Chadd /* Device interface */ 12934ad7e9b0SAdrian Chadd DEVMETHOD(device_probe, chipc_probe), 12944ad7e9b0SAdrian Chadd DEVMETHOD(device_attach, chipc_attach), 12954ad7e9b0SAdrian Chadd DEVMETHOD(device_detach, chipc_detach), 12964ad7e9b0SAdrian Chadd DEVMETHOD(device_suspend, chipc_suspend), 12974ad7e9b0SAdrian Chadd DEVMETHOD(device_resume, chipc_resume), 12984ad7e9b0SAdrian Chadd 1299f4a3eb02SAdrian Chadd /* Bus interface */ 1300f4a3eb02SAdrian Chadd DEVMETHOD(bus_probe_nomatch, chipc_probe_nomatch), 1301f4a3eb02SAdrian Chadd DEVMETHOD(bus_print_child, chipc_print_child), 1302f4a3eb02SAdrian Chadd DEVMETHOD(bus_child_pnpinfo_str, chipc_child_pnpinfo_str), 1303f4a3eb02SAdrian Chadd DEVMETHOD(bus_child_location_str, chipc_child_location_str), 1304f4a3eb02SAdrian Chadd 1305f4a3eb02SAdrian Chadd DEVMETHOD(bus_add_child, chipc_add_child), 1306f4a3eb02SAdrian Chadd DEVMETHOD(bus_child_deleted, chipc_child_deleted), 1307f4a3eb02SAdrian Chadd 1308f4a3eb02SAdrian Chadd DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 1309f4a3eb02SAdrian Chadd DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 1310f4a3eb02SAdrian Chadd DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource), 1311f4a3eb02SAdrian Chadd DEVMETHOD(bus_alloc_resource, chipc_alloc_resource), 1312f4a3eb02SAdrian Chadd DEVMETHOD(bus_release_resource, chipc_release_resource), 1313f4a3eb02SAdrian Chadd DEVMETHOD(bus_adjust_resource, chipc_adjust_resource), 1314f4a3eb02SAdrian Chadd DEVMETHOD(bus_activate_resource, chipc_activate_resource), 1315f4a3eb02SAdrian Chadd DEVMETHOD(bus_deactivate_resource, chipc_deactivate_resource), 1316f4a3eb02SAdrian Chadd DEVMETHOD(bus_get_resource_list, chipc_get_resource_list), 1317f4a3eb02SAdrian Chadd 1318f4a3eb02SAdrian Chadd DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 1319f4a3eb02SAdrian Chadd DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 1320f4a3eb02SAdrian Chadd DEVMETHOD(bus_config_intr, bus_generic_config_intr), 1321f4a3eb02SAdrian Chadd DEVMETHOD(bus_bind_intr, bus_generic_bind_intr), 1322f4a3eb02SAdrian Chadd DEVMETHOD(bus_describe_intr, bus_generic_describe_intr), 1323f4a3eb02SAdrian Chadd 1324f4a3eb02SAdrian Chadd /* BHND bus inteface */ 1325f4a3eb02SAdrian Chadd DEVMETHOD(bhnd_bus_activate_resource, chipc_activate_bhnd_resource), 1326f4a3eb02SAdrian Chadd 13274ad7e9b0SAdrian Chadd /* ChipCommon interface */ 13288ef24a0dSAdrian Chadd DEVMETHOD(bhnd_chipc_write_chipctrl, chipc_write_chipctrl), 1329f4a3eb02SAdrian Chadd DEVMETHOD(bhnd_chipc_enable_sprom, chipc_enable_sprom_pins), 1330f4a3eb02SAdrian Chadd DEVMETHOD(bhnd_chipc_disable_sprom, chipc_disable_sprom_pins), 13312b693a88SLandon J. Fuller DEVMETHOD(bhnd_chipc_get_caps, chipc_get_caps), 1332e83ce340SAdrian Chadd 13334ad7e9b0SAdrian Chadd DEVMETHOD_END 13344ad7e9b0SAdrian Chadd }; 13354ad7e9b0SAdrian Chadd 13364ad7e9b0SAdrian Chadd DEFINE_CLASS_0(bhnd_chipc, chipc_driver, chipc_methods, sizeof(struct chipc_softc)); 1337e129bcd6SLandon J. Fuller EARLY_DRIVER_MODULE(bhnd_chipc, bhnd, chipc_driver, bhnd_chipc_devclass, 0, 0, 1338e129bcd6SLandon J. Fuller BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); 133996546b75SAdrian Chadd MODULE_DEPEND(bhnd_chipc, bhnd, 1, 1, 1); 13404ad7e9b0SAdrian Chadd MODULE_VERSION(bhnd_chipc, 1); 1341