14ad7e9b0SAdrian Chadd /*- 2f4a3eb02SAdrian Chadd * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org> 3f4a3eb02SAdrian Chadd * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com> 44ad7e9b0SAdrian Chadd * All rights reserved. 54ad7e9b0SAdrian Chadd * 64ad7e9b0SAdrian Chadd * Redistribution and use in source and binary forms, with or without 74ad7e9b0SAdrian Chadd * modification, are permitted provided that the following conditions 84ad7e9b0SAdrian Chadd * are met: 94ad7e9b0SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 104ad7e9b0SAdrian Chadd * notice, this list of conditions and the following disclaimer, 114ad7e9b0SAdrian Chadd * without modification. 124ad7e9b0SAdrian Chadd * 2. Redistributions in binary form must reproduce at minimum a disclaimer 134ad7e9b0SAdrian Chadd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 144ad7e9b0SAdrian Chadd * redistribution must be conditioned upon including a substantially 154ad7e9b0SAdrian Chadd * similar Disclaimer requirement for further binary redistribution. 164ad7e9b0SAdrian Chadd * 174ad7e9b0SAdrian Chadd * NO WARRANTY 184ad7e9b0SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 194ad7e9b0SAdrian Chadd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 204ad7e9b0SAdrian Chadd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 214ad7e9b0SAdrian Chadd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 224ad7e9b0SAdrian Chadd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 234ad7e9b0SAdrian Chadd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 244ad7e9b0SAdrian Chadd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 254ad7e9b0SAdrian Chadd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 264ad7e9b0SAdrian Chadd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 274ad7e9b0SAdrian Chadd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 284ad7e9b0SAdrian Chadd * THE POSSIBILITY OF SUCH DAMAGES. 294ad7e9b0SAdrian Chadd */ 304ad7e9b0SAdrian Chadd 314ad7e9b0SAdrian Chadd #include <sys/cdefs.h> 324ad7e9b0SAdrian Chadd __FBSDID("$FreeBSD$"); 334ad7e9b0SAdrian Chadd 344ad7e9b0SAdrian Chadd /* 354ad7e9b0SAdrian Chadd * Broadcom ChipCommon driver. 364ad7e9b0SAdrian Chadd * 374ad7e9b0SAdrian Chadd * With the exception of some very early chipsets, the ChipCommon core 384ad7e9b0SAdrian Chadd * has been included in all HND SoCs and chipsets based on the siba(4) 394ad7e9b0SAdrian Chadd * and bcma(4) interconnects, providing a common interface to chipset 404ad7e9b0SAdrian Chadd * identification, bus enumeration, UARTs, clocks, watchdog interrupts, GPIO, 414ad7e9b0SAdrian Chadd * flash, etc. 42e129bcd6SLandon J. Fuller * 43e129bcd6SLandon J. Fuller * The purpose of this driver is memory resource management for ChipCommon drivers 44e129bcd6SLandon J. Fuller * like UART, PMU, flash. ChipCommon core has several memory regions. 45e129bcd6SLandon J. Fuller * 46e129bcd6SLandon J. Fuller * ChipCommon driver has memory resource manager. Driver 47e129bcd6SLandon J. Fuller * gets information about BHND core ports/regions and map them 48e129bcd6SLandon J. Fuller * into drivers' resources. 49e129bcd6SLandon J. Fuller * 50e129bcd6SLandon J. Fuller * Here is overview of mapping: 51e129bcd6SLandon J. Fuller * 52e129bcd6SLandon J. Fuller * ------------------------------------------------------ 53e129bcd6SLandon J. Fuller * | Port.Region| Purpose | 54e129bcd6SLandon J. Fuller * ------------------------------------------------------ 55e129bcd6SLandon J. Fuller * | 0.0 | PMU, SPI(0x40), UART(0x300) | 56e129bcd6SLandon J. Fuller * | 1.0 | ? | 57e129bcd6SLandon J. Fuller * | 1.1 | MMIO flash (SPI & CFI) | 58e129bcd6SLandon J. Fuller * ------------------------------------------------------ 594ad7e9b0SAdrian Chadd */ 604ad7e9b0SAdrian Chadd 614ad7e9b0SAdrian Chadd #include <sys/param.h> 624ad7e9b0SAdrian Chadd #include <sys/kernel.h> 63f4a3eb02SAdrian Chadd #include <sys/lock.h> 644ad7e9b0SAdrian Chadd #include <sys/bus.h> 65e129bcd6SLandon J. Fuller #include <sys/rman.h> 66f4a3eb02SAdrian Chadd #include <sys/malloc.h> 674ad7e9b0SAdrian Chadd #include <sys/module.h> 68f4a3eb02SAdrian Chadd #include <sys/mutex.h> 694ad7e9b0SAdrian Chadd #include <sys/systm.h> 704ad7e9b0SAdrian Chadd 714ad7e9b0SAdrian Chadd #include <machine/bus.h> 724ad7e9b0SAdrian Chadd #include <machine/resource.h> 734ad7e9b0SAdrian Chadd 744ad7e9b0SAdrian Chadd #include <dev/bhnd/bhnd.h> 75f4a3eb02SAdrian Chadd #include <dev/bhnd/bhndvar.h> 76e83ce340SAdrian Chadd 774ad7e9b0SAdrian Chadd #include "chipcreg.h" 784ad7e9b0SAdrian Chadd #include "chipcvar.h" 79f4a3eb02SAdrian Chadd #include "chipc_private.h" 804ad7e9b0SAdrian Chadd 814ad7e9b0SAdrian Chadd devclass_t bhnd_chipc_devclass; /**< bhnd(4) chipcommon device class */ 824ad7e9b0SAdrian Chadd 8336e4410aSAdrian Chadd static struct bhnd_device_quirk chipc_quirks[]; 8436e4410aSAdrian Chadd 854ad7e9b0SAdrian Chadd /* Supported device identifiers */ 8636e4410aSAdrian Chadd static const struct bhnd_device chipc_devices[] = { 875ad9ac03SAdrian Chadd BHND_DEVICE(CC, NULL, chipc_quirks), 8836e4410aSAdrian Chadd BHND_DEVICE_END 894ad7e9b0SAdrian Chadd }; 904ad7e9b0SAdrian Chadd 9136e4410aSAdrian Chadd 924ad7e9b0SAdrian Chadd /* Device quirks table */ 934ad7e9b0SAdrian Chadd static struct bhnd_device_quirk chipc_quirks[] = { 9456a4cdd1SLandon J. Fuller /* HND OTP controller revisions */ 9556a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_EQ (12), CHIPC_QUIRK_OTP_HND), /* (?) */ 9656a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_EQ (17), CHIPC_QUIRK_OTP_HND), /* BCM4311 */ 9756a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_EQ (22), CHIPC_QUIRK_OTP_HND), /* BCM4312 */ 9856a4cdd1SLandon J. Fuller 9956a4cdd1SLandon J. Fuller /* IPX OTP controller revisions */ 10056a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_EQ (21), CHIPC_QUIRK_OTP_IPX), 10156a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_GTE(23), CHIPC_QUIRK_OTP_IPX), 10256a4cdd1SLandon J. Fuller 1035ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_GTE(32), CHIPC_QUIRK_SUPPORTS_SPROM), 1045ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_GTE(35), CHIPC_QUIRK_SUPPORTS_CAP_EXT), 10556a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_GTE(49), CHIPC_QUIRK_IPX_OTPL_SIZE), 1065ad9ac03SAdrian Chadd 1075ad9ac03SAdrian Chadd /* 4706 variant quirks */ 1085ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_EQ (38), CHIPC_QUIRK_4706_NFLASH), /* BCM5357? */ 1095ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (4706, HWREV_ANY, CHIPC_QUIRK_4706_NFLASH), 1105ad9ac03SAdrian Chadd 1115ad9ac03SAdrian Chadd /* 4331 quirks*/ 1125ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (4331, HWREV_ANY, CHIPC_QUIRK_4331_EXTPA_MUX_SPROM), 1135ad9ac03SAdrian Chadd BHND_PKG_QUIRK (4331, TN, CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM), 1145ad9ac03SAdrian Chadd BHND_PKG_QUIRK (4331, TNA0, CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM), 1155ad9ac03SAdrian Chadd BHND_PKG_QUIRK (4331, TT, CHIPC_QUIRK_4331_EXTPA2_MUX_SPROM), 1165ad9ac03SAdrian Chadd 1175ad9ac03SAdrian Chadd /* 4360 quirks */ 1185ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (4352, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 1195ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (43460, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 1205ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (43462, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 1215ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (43602, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 122f4a3eb02SAdrian Chadd 12336e4410aSAdrian Chadd BHND_DEVICE_QUIRK_END 1244ad7e9b0SAdrian Chadd }; 1254ad7e9b0SAdrian Chadd 126785df0cbSAdrian Chadd 127e129bcd6SLandon J. Fuller /* 128e129bcd6SLandon J. Fuller * Here is resource configuration hints for child devices 129e129bcd6SLandon J. Fuller * 130e129bcd6SLandon J. Fuller * [Flash] There are 2 flash resources: 131e129bcd6SLandon J. Fuller * - resource ID (rid) = 0: memory-mapped flash memory 132e129bcd6SLandon J. Fuller * - resource ID (rid) = 1: memory-mapped flash registers (i.e for SPI) 133e129bcd6SLandon J. Fuller * 134e129bcd6SLandon J. Fuller * [UART] Uses IRQ and memory resources: 135e129bcd6SLandon J. Fuller * - resource ID (rid) = 0: memory-mapped registers 136e129bcd6SLandon J. Fuller * - IRQ resource ID (rid) = 0: shared IRQ line for Tx/Rx. 137e129bcd6SLandon J. Fuller */ 138e129bcd6SLandon J. Fuller 139785df0cbSAdrian Chadd static const struct chipc_hint { 140785df0cbSAdrian Chadd const char *name; 141785df0cbSAdrian Chadd int unit; 142785df0cbSAdrian Chadd int type; 143785df0cbSAdrian Chadd int rid; 144785df0cbSAdrian Chadd rman_res_t base; /* relative to parent resource */ 145785df0cbSAdrian Chadd rman_res_t size; 146785df0cbSAdrian Chadd u_int port; /* ignored if SYS_RES_IRQ */ 147785df0cbSAdrian Chadd u_int region; 148785df0cbSAdrian Chadd } chipc_hints[] = { 149785df0cbSAdrian Chadd // FIXME: cfg/spi port1.1 mapping on siba(4) SoCs 1502b693a88SLandon J. Fuller // FIXME: IRQ shouldn't be hardcoded 151785df0cbSAdrian Chadd /* device unit type rid base size port,region */ 152785df0cbSAdrian Chadd { "bhnd_nvram", 0, SYS_RES_MEMORY, 0, CHIPC_SPROM_OTP, CHIPC_SPROM_OTP_SIZE, 0,0 }, 153785df0cbSAdrian Chadd { "uart", 0, SYS_RES_MEMORY, 0, CHIPC_UART0_BASE, CHIPC_UART_SIZE, 0,0 }, 1542b693a88SLandon J. Fuller { "uart", 0, SYS_RES_IRQ, 0, 2, 1 }, 155785df0cbSAdrian Chadd { "uart", 1, SYS_RES_MEMORY, 0, CHIPC_UART1_BASE, CHIPC_UART_SIZE, 0,0 }, 1562b693a88SLandon J. Fuller { "uart", 1, SYS_RES_IRQ, 0, 2, 1 }, 157785df0cbSAdrian Chadd { "spi", 0, SYS_RES_MEMORY, 0, 0, RM_MAX_END, 1,1 }, 158785df0cbSAdrian Chadd { "spi", 0, SYS_RES_MEMORY, 1, CHIPC_SFLASH_BASE, CHIPC_SFLASH_SIZE, 0,0 }, 159785df0cbSAdrian Chadd { "cfi", 0, SYS_RES_MEMORY, 0, 0, RM_MAX_END, 1,1}, 160785df0cbSAdrian Chadd { "cfi", 0, SYS_RES_MEMORY, 1, CHIPC_SFLASH_BASE, CHIPC_SFLASH_SIZE, 0,0 }, 161785df0cbSAdrian Chadd { NULL } 162785df0cbSAdrian Chadd }; 163785df0cbSAdrian Chadd 164785df0cbSAdrian Chadd 165f4a3eb02SAdrian Chadd static int chipc_try_activate_resource( 166f4a3eb02SAdrian Chadd struct chipc_softc *sc, device_t child, 167f4a3eb02SAdrian Chadd int type, int rid, struct resource *r, 168f4a3eb02SAdrian Chadd bool req_direct); 169f4a3eb02SAdrian Chadd 17056a4cdd1SLandon J. Fuller static bhnd_nvram_src chipc_find_nvram_src(struct chipc_softc *sc, 17156a4cdd1SLandon J. Fuller struct chipc_caps *caps); 172f4a3eb02SAdrian Chadd static int chipc_read_caps(struct chipc_softc *sc, 173f4a3eb02SAdrian Chadd struct chipc_caps *caps); 174f4a3eb02SAdrian Chadd 175f4a3eb02SAdrian Chadd static bool chipc_should_enable_sprom( 176f4a3eb02SAdrian Chadd struct chipc_softc *sc); 177f4a3eb02SAdrian Chadd 178f4a3eb02SAdrian Chadd static int chipc_init_rman(struct chipc_softc *sc); 179f4a3eb02SAdrian Chadd static void chipc_free_rman(struct chipc_softc *sc); 180f4a3eb02SAdrian Chadd static struct rman *chipc_get_rman(struct chipc_softc *sc, 181f4a3eb02SAdrian Chadd int type); 182f4a3eb02SAdrian Chadd 1834ad7e9b0SAdrian Chadd /* quirk and capability flag convenience macros */ 1844ad7e9b0SAdrian Chadd #define CHIPC_QUIRK(_sc, _name) \ 1854ad7e9b0SAdrian Chadd ((_sc)->quirks & CHIPC_QUIRK_ ## _name) 1864ad7e9b0SAdrian Chadd 1874ad7e9b0SAdrian Chadd #define CHIPC_CAP(_sc, _name) \ 188f4a3eb02SAdrian Chadd ((_sc)->caps._name) 1894ad7e9b0SAdrian Chadd 1904ad7e9b0SAdrian Chadd #define CHIPC_ASSERT_QUIRK(_sc, name) \ 1914ad7e9b0SAdrian Chadd KASSERT(CHIPC_QUIRK((_sc), name), ("quirk " __STRING(_name) " not set")) 1924ad7e9b0SAdrian Chadd 1934ad7e9b0SAdrian Chadd #define CHIPC_ASSERT_CAP(_sc, name) \ 1944ad7e9b0SAdrian Chadd KASSERT(CHIPC_CAP((_sc), name), ("capability " __STRING(_name) " not set")) 1954ad7e9b0SAdrian Chadd 1964ad7e9b0SAdrian Chadd static int 1974ad7e9b0SAdrian Chadd chipc_probe(device_t dev) 1984ad7e9b0SAdrian Chadd { 19936e4410aSAdrian Chadd const struct bhnd_device *id; 2004ad7e9b0SAdrian Chadd 20136e4410aSAdrian Chadd id = bhnd_device_lookup(dev, chipc_devices, sizeof(chipc_devices[0])); 20236e4410aSAdrian Chadd if (id == NULL) 2034ad7e9b0SAdrian Chadd return (ENXIO); 20436e4410aSAdrian Chadd 20536e4410aSAdrian Chadd bhnd_set_default_core_desc(dev); 20636e4410aSAdrian Chadd return (BUS_PROBE_DEFAULT); 2074ad7e9b0SAdrian Chadd } 2084ad7e9b0SAdrian Chadd 2094ad7e9b0SAdrian Chadd static int 2104ad7e9b0SAdrian Chadd chipc_attach(device_t dev) 2114ad7e9b0SAdrian Chadd { 2124ad7e9b0SAdrian Chadd struct chipc_softc *sc; 2134ad7e9b0SAdrian Chadd bhnd_addr_t enum_addr; 2144ad7e9b0SAdrian Chadd uint32_t ccid_reg; 2154ad7e9b0SAdrian Chadd uint8_t chip_type; 2164ad7e9b0SAdrian Chadd int error; 2174ad7e9b0SAdrian Chadd 2184ad7e9b0SAdrian Chadd sc = device_get_softc(dev); 2194ad7e9b0SAdrian Chadd sc->dev = dev; 22036e4410aSAdrian Chadd sc->quirks = bhnd_device_quirks(dev, chipc_devices, 22136e4410aSAdrian Chadd sizeof(chipc_devices[0])); 222f4a3eb02SAdrian Chadd sc->sprom_refcnt = 0; 223e83ce340SAdrian Chadd 224e83ce340SAdrian Chadd CHIPC_LOCK_INIT(sc); 225f4a3eb02SAdrian Chadd STAILQ_INIT(&sc->mem_regions); 2264ad7e9b0SAdrian Chadd 227f4a3eb02SAdrian Chadd /* Set up resource management */ 228f4a3eb02SAdrian Chadd if ((error = chipc_init_rman(sc))) { 229f4a3eb02SAdrian Chadd device_printf(sc->dev, 230f4a3eb02SAdrian Chadd "failed to initialize chipc resource state: %d\n", error); 231f4a3eb02SAdrian Chadd goto failed; 232f4a3eb02SAdrian Chadd } 2334ad7e9b0SAdrian Chadd 234f4a3eb02SAdrian Chadd /* Allocate the region containing our core registers */ 235f4a3eb02SAdrian Chadd if ((sc->core_region = chipc_find_region_by_rid(sc, 0)) == NULL) { 236f4a3eb02SAdrian Chadd error = ENXIO; 237f4a3eb02SAdrian Chadd goto failed; 238f4a3eb02SAdrian Chadd } 239f4a3eb02SAdrian Chadd 240f4a3eb02SAdrian Chadd error = chipc_retain_region(sc, sc->core_region, 241f4a3eb02SAdrian Chadd RF_ALLOCATED|RF_ACTIVE); 242f4a3eb02SAdrian Chadd if (error) { 243f4a3eb02SAdrian Chadd sc->core_region = NULL; 244f4a3eb02SAdrian Chadd goto failed; 245f4a3eb02SAdrian Chadd } else { 246f4a3eb02SAdrian Chadd sc->core = sc->core_region->cr_res; 247f4a3eb02SAdrian Chadd } 2484ad7e9b0SAdrian Chadd 2494ad7e9b0SAdrian Chadd /* Fetch our chipset identification data */ 2504ad7e9b0SAdrian Chadd ccid_reg = bhnd_bus_read_4(sc->core, CHIPC_ID); 251f4a3eb02SAdrian Chadd chip_type = CHIPC_GET_BITS(ccid_reg, CHIPC_ID_BUS); 2524ad7e9b0SAdrian Chadd 2534ad7e9b0SAdrian Chadd switch (chip_type) { 2544ad7e9b0SAdrian Chadd case BHND_CHIPTYPE_SIBA: 2554ad7e9b0SAdrian Chadd /* enumeration space starts at the ChipCommon register base. */ 2564ad7e9b0SAdrian Chadd enum_addr = rman_get_start(sc->core->res); 2574ad7e9b0SAdrian Chadd break; 2584ad7e9b0SAdrian Chadd case BHND_CHIPTYPE_BCMA: 2594ad7e9b0SAdrian Chadd case BHND_CHIPTYPE_BCMA_ALT: 2604ad7e9b0SAdrian Chadd enum_addr = bhnd_bus_read_4(sc->core, CHIPC_EROMPTR); 2614ad7e9b0SAdrian Chadd break; 2624ad7e9b0SAdrian Chadd default: 2634ad7e9b0SAdrian Chadd device_printf(dev, "unsupported chip type %hhu\n", chip_type); 2644ad7e9b0SAdrian Chadd error = ENODEV; 265f4a3eb02SAdrian Chadd goto failed; 2664ad7e9b0SAdrian Chadd } 2674ad7e9b0SAdrian Chadd 2684ad7e9b0SAdrian Chadd sc->ccid = bhnd_parse_chipid(ccid_reg, enum_addr); 2694ad7e9b0SAdrian Chadd 270f4a3eb02SAdrian Chadd /* Fetch and parse capability register(s) */ 271f4a3eb02SAdrian Chadd if ((error = chipc_read_caps(sc, &sc->caps))) 272f4a3eb02SAdrian Chadd goto failed; 2734ad7e9b0SAdrian Chadd 274f4a3eb02SAdrian Chadd if (bootverbose) 275f4a3eb02SAdrian Chadd chipc_print_caps(sc->dev, &sc->caps); 276f4a3eb02SAdrian Chadd 277785df0cbSAdrian Chadd /* Probe and attach children */ 278785df0cbSAdrian Chadd bus_generic_probe(dev); 279f4a3eb02SAdrian Chadd if ((error = bus_generic_attach(dev))) 280f4a3eb02SAdrian Chadd goto failed; 2814ad7e9b0SAdrian Chadd 2824ad7e9b0SAdrian Chadd return (0); 2834ad7e9b0SAdrian Chadd 284f4a3eb02SAdrian Chadd failed: 285f4a3eb02SAdrian Chadd if (sc->core_region != NULL) { 286f4a3eb02SAdrian Chadd chipc_release_region(sc, sc->core_region, 287f4a3eb02SAdrian Chadd RF_ALLOCATED|RF_ACTIVE); 288f4a3eb02SAdrian Chadd } 289f4a3eb02SAdrian Chadd 290f4a3eb02SAdrian Chadd chipc_free_rman(sc); 291e83ce340SAdrian Chadd CHIPC_LOCK_DESTROY(sc); 2924ad7e9b0SAdrian Chadd return (error); 2934ad7e9b0SAdrian Chadd } 2944ad7e9b0SAdrian Chadd 2954ad7e9b0SAdrian Chadd static int 2964ad7e9b0SAdrian Chadd chipc_detach(device_t dev) 2974ad7e9b0SAdrian Chadd { 2984ad7e9b0SAdrian Chadd struct chipc_softc *sc; 299f4a3eb02SAdrian Chadd int error; 3004ad7e9b0SAdrian Chadd 3014ad7e9b0SAdrian Chadd sc = device_get_softc(dev); 302f4a3eb02SAdrian Chadd 303f4a3eb02SAdrian Chadd if ((error = bus_generic_detach(dev))) 304f4a3eb02SAdrian Chadd return (error); 305f4a3eb02SAdrian Chadd 306f4a3eb02SAdrian Chadd chipc_release_region(sc, sc->core_region, RF_ALLOCATED|RF_ACTIVE); 307f4a3eb02SAdrian Chadd chipc_free_rman(sc); 308e83ce340SAdrian Chadd 309e83ce340SAdrian Chadd CHIPC_LOCK_DESTROY(sc); 3104ad7e9b0SAdrian Chadd 3114ad7e9b0SAdrian Chadd return (0); 3124ad7e9b0SAdrian Chadd } 3134ad7e9b0SAdrian Chadd 31456a4cdd1SLandon J. Fuller /** 31556a4cdd1SLandon J. Fuller * Determine the NVRAM data source for this device. 31656a4cdd1SLandon J. Fuller * 31756a4cdd1SLandon J. Fuller * The SPROM, OTP, and flash capability flags must be fully populated in 31856a4cdd1SLandon J. Fuller * @p caps. 31956a4cdd1SLandon J. Fuller * 32056a4cdd1SLandon J. Fuller * @param sc chipc driver state. 32156a4cdd1SLandon J. Fuller * @param caps capability flags to be used to derive NVRAM configuration. 32256a4cdd1SLandon J. Fuller */ 32356a4cdd1SLandon J. Fuller static bhnd_nvram_src 32456a4cdd1SLandon J. Fuller chipc_find_nvram_src(struct chipc_softc *sc, struct chipc_caps *caps) 32556a4cdd1SLandon J. Fuller { 32656a4cdd1SLandon J. Fuller uint32_t otp_st, srom_ctrl; 32756a4cdd1SLandon J. Fuller 32856a4cdd1SLandon J. Fuller /* Very early devices vend SPROM/OTP/CIS (if at all) via the 32956a4cdd1SLandon J. Fuller * host bridge interface instead of ChipCommon. */ 33056a4cdd1SLandon J. Fuller if (!CHIPC_QUIRK(sc, SUPPORTS_SPROM)) 33156a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_UNKNOWN); 33256a4cdd1SLandon J. Fuller 33356a4cdd1SLandon J. Fuller /* 33456a4cdd1SLandon J. Fuller * Later chipset revisions standardized the SPROM capability flags and 33556a4cdd1SLandon J. Fuller * register interfaces. 33656a4cdd1SLandon J. Fuller * 33756a4cdd1SLandon J. Fuller * We check for hardware presence in order of precedence. For example, 33856a4cdd1SLandon J. Fuller * SPROM is is always used in preference to internal OTP if found. 33956a4cdd1SLandon J. Fuller */ 34056a4cdd1SLandon J. Fuller if (caps->sprom) { 34156a4cdd1SLandon J. Fuller srom_ctrl = bhnd_bus_read_4(sc->core, CHIPC_SPROM_CTRL); 34256a4cdd1SLandon J. Fuller if (srom_ctrl & CHIPC_SRC_PRESENT) 34356a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_SPROM); 34456a4cdd1SLandon J. Fuller } 34556a4cdd1SLandon J. Fuller 34656a4cdd1SLandon J. Fuller /* Check for programmed OTP H/W subregion (contains SROM data) */ 34756a4cdd1SLandon J. Fuller if (CHIPC_QUIRK(sc, SUPPORTS_OTP) && caps->otp_size > 0) { 34856a4cdd1SLandon J. Fuller /* TODO: need access to HND-OTP device */ 34956a4cdd1SLandon J. Fuller if (!CHIPC_QUIRK(sc, OTP_HND)) { 35056a4cdd1SLandon J. Fuller device_printf(sc->dev, 35156a4cdd1SLandon J. Fuller "NVRAM unavailable: unsupported OTP controller.\n"); 35256a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_UNKNOWN); 35356a4cdd1SLandon J. Fuller } 35456a4cdd1SLandon J. Fuller 35556a4cdd1SLandon J. Fuller otp_st = bhnd_bus_read_4(sc->core, CHIPC_OTPST); 35656a4cdd1SLandon J. Fuller if (otp_st & CHIPC_OTPS_GUP_HW) 35756a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_OTP); 35856a4cdd1SLandon J. Fuller } 35956a4cdd1SLandon J. Fuller 36056a4cdd1SLandon J. Fuller /* Check for flash */ 36156a4cdd1SLandon J. Fuller if (caps->flash_type != CHIPC_FLASH_NONE) 36256a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_FLASH); 36356a4cdd1SLandon J. Fuller 36456a4cdd1SLandon J. Fuller /* No NVRAM hardware capability declared */ 36556a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_UNKNOWN); 36656a4cdd1SLandon J. Fuller } 36756a4cdd1SLandon J. Fuller 368f4a3eb02SAdrian Chadd /* Read and parse chipc capabilities */ 3694ad7e9b0SAdrian Chadd static int 370f4a3eb02SAdrian Chadd chipc_read_caps(struct chipc_softc *sc, struct chipc_caps *caps) 3714ad7e9b0SAdrian Chadd { 372f4a3eb02SAdrian Chadd uint32_t cap_reg; 373f4a3eb02SAdrian Chadd uint32_t cap_ext_reg; 374f4a3eb02SAdrian Chadd uint32_t regval; 375f4a3eb02SAdrian Chadd 376f4a3eb02SAdrian Chadd /* Fetch cap registers */ 377f4a3eb02SAdrian Chadd cap_reg = bhnd_bus_read_4(sc->core, CHIPC_CAPABILITIES); 378f4a3eb02SAdrian Chadd cap_ext_reg = 0; 379f4a3eb02SAdrian Chadd if (CHIPC_QUIRK(sc, SUPPORTS_CAP_EXT)) 380f4a3eb02SAdrian Chadd cap_ext_reg = bhnd_bus_read_4(sc->core, CHIPC_CAPABILITIES_EXT); 381f4a3eb02SAdrian Chadd 382f4a3eb02SAdrian Chadd /* Extract values */ 383f4a3eb02SAdrian Chadd caps->num_uarts = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_NUM_UART); 384f4a3eb02SAdrian Chadd caps->mipseb = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_MIPSEB); 385f4a3eb02SAdrian Chadd caps->uart_gpio = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_UARTGPIO); 386f4a3eb02SAdrian Chadd caps->uart_clock = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_UCLKSEL); 387f4a3eb02SAdrian Chadd 388f4a3eb02SAdrian Chadd caps->extbus_type = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_EXTBUS); 389f4a3eb02SAdrian Chadd caps->power_control = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_PWR_CTL); 390f4a3eb02SAdrian Chadd caps->jtag_master = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_JTAGP); 391f4a3eb02SAdrian Chadd 392f4a3eb02SAdrian Chadd caps->pll_type = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_PLL); 393f4a3eb02SAdrian Chadd caps->backplane_64 = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_BKPLN64); 394f4a3eb02SAdrian Chadd caps->boot_rom = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_ROM); 395f4a3eb02SAdrian Chadd caps->pmu = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_PMU); 396f4a3eb02SAdrian Chadd caps->eci = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_ECI); 397f4a3eb02SAdrian Chadd caps->sprom = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_SPROM); 398f4a3eb02SAdrian Chadd caps->otp_size = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_OTP_SIZE); 399f4a3eb02SAdrian Chadd 400f4a3eb02SAdrian Chadd caps->seci = CHIPC_GET_FLAG(cap_ext_reg, CHIPC_CAP2_SECI); 401f4a3eb02SAdrian Chadd caps->gsio = CHIPC_GET_FLAG(cap_ext_reg, CHIPC_CAP2_GSIO); 402f4a3eb02SAdrian Chadd caps->aob = CHIPC_GET_FLAG(cap_ext_reg, CHIPC_CAP2_AOB); 403f4a3eb02SAdrian Chadd 404f4a3eb02SAdrian Chadd /* Fetch OTP size for later IPX controller revisions */ 40556a4cdd1SLandon J. Fuller if (CHIPC_QUIRK(sc, IPX_OTPL_SIZE)) { 406f4a3eb02SAdrian Chadd regval = bhnd_bus_read_4(sc->core, CHIPC_OTPLAYOUT); 407f4a3eb02SAdrian Chadd caps->otp_size = CHIPC_GET_BITS(regval, CHIPC_OTPL_SIZE); 4084ad7e9b0SAdrian Chadd } 4094ad7e9b0SAdrian Chadd 4105ad9ac03SAdrian Chadd /* Determine flash type and parameters */ 411f4a3eb02SAdrian Chadd caps->cfi_width = 0; 412f4a3eb02SAdrian Chadd 413f4a3eb02SAdrian Chadd switch (CHIPC_GET_BITS(cap_reg, CHIPC_CAP_FLASH)) { 414f4a3eb02SAdrian Chadd case CHIPC_CAP_SFLASH_ST: 415f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_SFLASH_ST; 416f4a3eb02SAdrian Chadd break; 417f4a3eb02SAdrian Chadd case CHIPC_CAP_SFLASH_AT: 418f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_SFLASH_AT; 419f4a3eb02SAdrian Chadd break; 420f4a3eb02SAdrian Chadd case CHIPC_CAP_NFLASH: 421f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_NFLASH; 422f4a3eb02SAdrian Chadd break; 423f4a3eb02SAdrian Chadd case CHIPC_CAP_PFLASH: 424f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_PFLASH_CFI; 425f4a3eb02SAdrian Chadd 426f4a3eb02SAdrian Chadd /* determine cfi width */ 427f4a3eb02SAdrian Chadd regval = bhnd_bus_read_4(sc->core, CHIPC_FLASH_CFG); 428f4a3eb02SAdrian Chadd if (CHIPC_GET_FLAG(regval, CHIPC_FLASH_CFG_DS)) 429f4a3eb02SAdrian Chadd caps->cfi_width = 2; 430f4a3eb02SAdrian Chadd else 431f4a3eb02SAdrian Chadd caps->cfi_width = 1; 432f4a3eb02SAdrian Chadd 433f4a3eb02SAdrian Chadd break; 434f4a3eb02SAdrian Chadd case CHIPC_CAP_FLASH_NONE: 435f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_FLASH_NONE; 436f4a3eb02SAdrian Chadd break; 437f4a3eb02SAdrian Chadd 438f4a3eb02SAdrian Chadd } 439f4a3eb02SAdrian Chadd 440f4a3eb02SAdrian Chadd /* Handle 4706_NFLASH fallback */ 441f4a3eb02SAdrian Chadd if (CHIPC_QUIRK(sc, 4706_NFLASH) && 442f4a3eb02SAdrian Chadd CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_4706_NFLASH)) 4434ad7e9b0SAdrian Chadd { 444f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_NFLASH_4706; 445f4a3eb02SAdrian Chadd } 446f4a3eb02SAdrian Chadd 44756a4cdd1SLandon J. Fuller 44856a4cdd1SLandon J. Fuller /* Determine NVRAM source. Must occur after the SPROM/OTP/flash 44956a4cdd1SLandon J. Fuller * capability flags have been populated. */ 45056a4cdd1SLandon J. Fuller caps->nvram_src = chipc_find_nvram_src(sc, caps); 45156a4cdd1SLandon J. Fuller 45256a4cdd1SLandon J. Fuller /* Determine the SPROM offset within OTP (if any). SPROM-formatted 45356a4cdd1SLandon J. Fuller * data is placed within the OTP general use region. */ 45456a4cdd1SLandon J. Fuller caps->sprom_offset = 0; 45556a4cdd1SLandon J. Fuller if (caps->nvram_src == BHND_NVRAM_SRC_OTP) { 45656a4cdd1SLandon J. Fuller CHIPC_ASSERT_QUIRK(sc, OTP_IPX); 45756a4cdd1SLandon J. Fuller 45856a4cdd1SLandon J. Fuller /* Bit offset to GUP HW subregion containing SPROM data */ 45956a4cdd1SLandon J. Fuller regval = bhnd_bus_read_4(sc->core, CHIPC_OTPLAYOUT); 46056a4cdd1SLandon J. Fuller caps->sprom_offset = CHIPC_GET_BITS(regval, CHIPC_OTPL_GUP); 46156a4cdd1SLandon J. Fuller 46256a4cdd1SLandon J. Fuller /* Convert to bytes */ 46356a4cdd1SLandon J. Fuller caps->sprom_offset /= 8; 46456a4cdd1SLandon J. Fuller } 46556a4cdd1SLandon J. Fuller 4664ad7e9b0SAdrian Chadd return (0); 4674ad7e9b0SAdrian Chadd } 4684ad7e9b0SAdrian Chadd 469f4a3eb02SAdrian Chadd static int 470f4a3eb02SAdrian Chadd chipc_suspend(device_t dev) 471f4a3eb02SAdrian Chadd { 472f4a3eb02SAdrian Chadd return (bus_generic_suspend(dev)); 473f4a3eb02SAdrian Chadd } 474f4a3eb02SAdrian Chadd 475f4a3eb02SAdrian Chadd static int 476f4a3eb02SAdrian Chadd chipc_resume(device_t dev) 477f4a3eb02SAdrian Chadd { 478f4a3eb02SAdrian Chadd return (bus_generic_resume(dev)); 479f4a3eb02SAdrian Chadd } 480f4a3eb02SAdrian Chadd 481f4a3eb02SAdrian Chadd static void 482f4a3eb02SAdrian Chadd chipc_probe_nomatch(device_t dev, device_t child) 483f4a3eb02SAdrian Chadd { 484f4a3eb02SAdrian Chadd struct resource_list *rl; 485f4a3eb02SAdrian Chadd const char *name; 486f4a3eb02SAdrian Chadd 487f4a3eb02SAdrian Chadd name = device_get_name(child); 488f4a3eb02SAdrian Chadd if (name == NULL) 489f4a3eb02SAdrian Chadd name = "unknown device"; 490f4a3eb02SAdrian Chadd 491f4a3eb02SAdrian Chadd device_printf(dev, "<%s> at", name); 492f4a3eb02SAdrian Chadd 493f4a3eb02SAdrian Chadd rl = BUS_GET_RESOURCE_LIST(dev, child); 494f4a3eb02SAdrian Chadd if (rl != NULL) { 495f4a3eb02SAdrian Chadd resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); 496f4a3eb02SAdrian Chadd resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); 497f4a3eb02SAdrian Chadd } 498f4a3eb02SAdrian Chadd 499f4a3eb02SAdrian Chadd printf(" (no driver attached)\n"); 500f4a3eb02SAdrian Chadd } 501f4a3eb02SAdrian Chadd 502f4a3eb02SAdrian Chadd static int 503f4a3eb02SAdrian Chadd chipc_print_child(device_t dev, device_t child) 504f4a3eb02SAdrian Chadd { 505f4a3eb02SAdrian Chadd struct resource_list *rl; 506f4a3eb02SAdrian Chadd int retval = 0; 507f4a3eb02SAdrian Chadd 508f4a3eb02SAdrian Chadd retval += bus_print_child_header(dev, child); 509f4a3eb02SAdrian Chadd 510f4a3eb02SAdrian Chadd rl = BUS_GET_RESOURCE_LIST(dev, child); 511f4a3eb02SAdrian Chadd if (rl != NULL) { 512f4a3eb02SAdrian Chadd retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, 513f4a3eb02SAdrian Chadd "%#jx"); 514f4a3eb02SAdrian Chadd retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, 515f4a3eb02SAdrian Chadd "%jd"); 516f4a3eb02SAdrian Chadd } 517f4a3eb02SAdrian Chadd 518f4a3eb02SAdrian Chadd retval += bus_print_child_domain(dev, child); 519f4a3eb02SAdrian Chadd retval += bus_print_child_footer(dev, child); 520f4a3eb02SAdrian Chadd 521f4a3eb02SAdrian Chadd return (retval); 522f4a3eb02SAdrian Chadd } 523f4a3eb02SAdrian Chadd 524f4a3eb02SAdrian Chadd static int 525f4a3eb02SAdrian Chadd chipc_child_pnpinfo_str(device_t dev, device_t child, char *buf, 526f4a3eb02SAdrian Chadd size_t buflen) 527f4a3eb02SAdrian Chadd { 528f4a3eb02SAdrian Chadd if (buflen == 0) 529f4a3eb02SAdrian Chadd return (EOVERFLOW); 530f4a3eb02SAdrian Chadd 531f4a3eb02SAdrian Chadd *buf = '\0'; 532f4a3eb02SAdrian Chadd return (0); 533f4a3eb02SAdrian Chadd } 534f4a3eb02SAdrian Chadd 535f4a3eb02SAdrian Chadd static int 536f4a3eb02SAdrian Chadd chipc_child_location_str(device_t dev, device_t child, char *buf, 537f4a3eb02SAdrian Chadd size_t buflen) 538f4a3eb02SAdrian Chadd { 539f4a3eb02SAdrian Chadd if (buflen == 0) 540f4a3eb02SAdrian Chadd return (EOVERFLOW); 541f4a3eb02SAdrian Chadd 542f4a3eb02SAdrian Chadd *buf = '\0'; 543f4a3eb02SAdrian Chadd return (ENXIO); 544f4a3eb02SAdrian Chadd } 545f4a3eb02SAdrian Chadd 546f4a3eb02SAdrian Chadd static device_t 547f4a3eb02SAdrian Chadd chipc_add_child(device_t dev, u_int order, const char *name, int unit) 548f4a3eb02SAdrian Chadd { 549f4a3eb02SAdrian Chadd struct chipc_devinfo *dinfo; 550785df0cbSAdrian Chadd const struct chipc_hint *hint; 551f4a3eb02SAdrian Chadd device_t child; 5522b693a88SLandon J. Fuller devclass_t child_dc; 553785df0cbSAdrian Chadd int error; 5542b693a88SLandon J. Fuller int busrel_unit; 555f4a3eb02SAdrian Chadd 556f4a3eb02SAdrian Chadd child = device_add_child_ordered(dev, order, name, unit); 557f4a3eb02SAdrian Chadd if (child == NULL) 558f4a3eb02SAdrian Chadd return (NULL); 559f4a3eb02SAdrian Chadd 5602b693a88SLandon J. Fuller /* system-wide device unit */ 5612b693a88SLandon J. Fuller unit = device_get_unit(child); 5622b693a88SLandon J. Fuller child_dc = device_get_devclass(child); 5632b693a88SLandon J. Fuller 5642b693a88SLandon J. Fuller busrel_unit = 0; 5652b693a88SLandon J. Fuller for (int i = 0; i < unit; i++) { 5662b693a88SLandon J. Fuller device_t tmp; 5672b693a88SLandon J. Fuller 5682b693a88SLandon J. Fuller tmp = devclass_get_device(child_dc, i); 5692b693a88SLandon J. Fuller if (tmp != NULL && (device_get_parent(tmp) == dev)) 5702b693a88SLandon J. Fuller busrel_unit++; 5712b693a88SLandon J. Fuller } 5722b693a88SLandon J. Fuller 5732b693a88SLandon J. Fuller /* bus-wide device unit (override unit for further hint matching) */ 5742b693a88SLandon J. Fuller unit = busrel_unit; 5752b693a88SLandon J. Fuller 576f4a3eb02SAdrian Chadd dinfo = malloc(sizeof(struct chipc_devinfo), M_BHND, M_NOWAIT); 577f4a3eb02SAdrian Chadd if (dinfo == NULL) { 578f4a3eb02SAdrian Chadd device_delete_child(dev, child); 579f4a3eb02SAdrian Chadd return (NULL); 580f4a3eb02SAdrian Chadd } 581f4a3eb02SAdrian Chadd 582f4a3eb02SAdrian Chadd resource_list_init(&dinfo->resources); 583f4a3eb02SAdrian Chadd device_set_ivars(child, dinfo); 584f4a3eb02SAdrian Chadd 585785df0cbSAdrian Chadd /* Hint matching requires a device name */ 586785df0cbSAdrian Chadd if (name == NULL) 587f4a3eb02SAdrian Chadd return (child); 588785df0cbSAdrian Chadd 589785df0cbSAdrian Chadd /* Use hint table to set child resources */ 590785df0cbSAdrian Chadd for (hint = chipc_hints; hint->name != NULL; hint++) { 591785df0cbSAdrian Chadd bhnd_addr_t region_addr; 592785df0cbSAdrian Chadd bhnd_size_t region_size; 593785df0cbSAdrian Chadd 5942b693a88SLandon J. Fuller /* Check device name */ 595785df0cbSAdrian Chadd if (strcmp(hint->name, name) != 0) 596785df0cbSAdrian Chadd continue; 597785df0cbSAdrian Chadd 5982b693a88SLandon J. Fuller /* Check device unit */ 5992b693a88SLandon J. Fuller if (hint->unit >= 0 && unit != hint->unit) 6002b693a88SLandon J. Fuller continue; 6012b693a88SLandon J. Fuller 602785df0cbSAdrian Chadd switch (hint->type) { 603785df0cbSAdrian Chadd case SYS_RES_IRQ: 604785df0cbSAdrian Chadd /* Add child resource */ 605785df0cbSAdrian Chadd error = bus_set_resource(child, hint->type, hint->rid, 606785df0cbSAdrian Chadd hint->base, hint->size); 607785df0cbSAdrian Chadd if (error) { 608785df0cbSAdrian Chadd device_printf(dev, 609785df0cbSAdrian Chadd "bus_set_resource() failed for %s: %d\n", 610785df0cbSAdrian Chadd device_get_nameunit(child), error); 611785df0cbSAdrian Chadd goto failed; 612785df0cbSAdrian Chadd } 613785df0cbSAdrian Chadd break; 614785df0cbSAdrian Chadd 615785df0cbSAdrian Chadd case SYS_RES_MEMORY: 616785df0cbSAdrian Chadd /* Fetch region address and size */ 617785df0cbSAdrian Chadd error = bhnd_get_region_addr(dev, BHND_PORT_DEVICE, 618785df0cbSAdrian Chadd hint->port, hint->region, ®ion_addr, 619785df0cbSAdrian Chadd ®ion_size); 620785df0cbSAdrian Chadd if (error) { 621785df0cbSAdrian Chadd device_printf(dev, 622785df0cbSAdrian Chadd "lookup of %s%u.%u failed: %d\n", 623785df0cbSAdrian Chadd bhnd_port_type_name(BHND_PORT_DEVICE), 624785df0cbSAdrian Chadd hint->port, hint->region, error); 625785df0cbSAdrian Chadd goto failed; 626785df0cbSAdrian Chadd } 627785df0cbSAdrian Chadd 628785df0cbSAdrian Chadd /* Verify requested range is mappable */ 629785df0cbSAdrian Chadd if (hint->base > region_size || 6302b693a88SLandon J. Fuller (hint->size != RM_MAX_END && 6312b693a88SLandon J. Fuller (hint->size > region_size || 6322b693a88SLandon J. Fuller region_size - hint->base < hint->size ))) 633785df0cbSAdrian Chadd { 634785df0cbSAdrian Chadd device_printf(dev, 635785df0cbSAdrian Chadd "%s%u.%u region cannot map requested range " 636785df0cbSAdrian Chadd "%#jx+%#jx\n", 637785df0cbSAdrian Chadd bhnd_port_type_name(BHND_PORT_DEVICE), 638785df0cbSAdrian Chadd hint->port, hint->region, hint->base, 639785df0cbSAdrian Chadd hint->size); 640785df0cbSAdrian Chadd } 641785df0cbSAdrian Chadd 6422b693a88SLandon J. Fuller /* 6432b693a88SLandon J. Fuller * Add child resource. If hint doesn't define the end 6442b693a88SLandon J. Fuller * of resource window (RX_MAX_END), use end of region. 6452b693a88SLandon J. Fuller */ 6462b693a88SLandon J. Fuller 6472b693a88SLandon J. Fuller error = bus_set_resource(child, 6482b693a88SLandon J. Fuller hint->type, 6492b693a88SLandon J. Fuller hint->rid, region_addr + hint->base, 6502b693a88SLandon J. Fuller (hint->size == RM_MAX_END) ? 6512b693a88SLandon J. Fuller region_size - hint->base : 6522b693a88SLandon J. Fuller hint->size); 653785df0cbSAdrian Chadd if (error) { 654785df0cbSAdrian Chadd device_printf(dev, 655785df0cbSAdrian Chadd "bus_set_resource() failed for %s: %d\n", 656785df0cbSAdrian Chadd device_get_nameunit(child), error); 657785df0cbSAdrian Chadd goto failed; 658785df0cbSAdrian Chadd } 659785df0cbSAdrian Chadd break; 660785df0cbSAdrian Chadd default: 661785df0cbSAdrian Chadd device_printf(child, "unknown hint resource type: %d\n", 662785df0cbSAdrian Chadd hint->type); 663785df0cbSAdrian Chadd break; 664785df0cbSAdrian Chadd } 665785df0cbSAdrian Chadd } 666785df0cbSAdrian Chadd 667785df0cbSAdrian Chadd return (child); 668785df0cbSAdrian Chadd 669785df0cbSAdrian Chadd failed: 670785df0cbSAdrian Chadd device_delete_child(dev, child); 671785df0cbSAdrian Chadd return (NULL); 672f4a3eb02SAdrian Chadd } 673f4a3eb02SAdrian Chadd 674f4a3eb02SAdrian Chadd static void 675f4a3eb02SAdrian Chadd chipc_child_deleted(device_t dev, device_t child) 676f4a3eb02SAdrian Chadd { 677f4a3eb02SAdrian Chadd struct chipc_devinfo *dinfo = device_get_ivars(child); 678f4a3eb02SAdrian Chadd 679f4a3eb02SAdrian Chadd if (dinfo != NULL) { 680f4a3eb02SAdrian Chadd resource_list_free(&dinfo->resources); 681f4a3eb02SAdrian Chadd free(dinfo, M_BHND); 682f4a3eb02SAdrian Chadd } 683f4a3eb02SAdrian Chadd 684f4a3eb02SAdrian Chadd device_set_ivars(child, NULL); 685f4a3eb02SAdrian Chadd } 686f4a3eb02SAdrian Chadd 687f4a3eb02SAdrian Chadd static struct resource_list * 688f4a3eb02SAdrian Chadd chipc_get_resource_list(device_t dev, device_t child) 689f4a3eb02SAdrian Chadd { 690f4a3eb02SAdrian Chadd struct chipc_devinfo *dinfo = device_get_ivars(child); 691f4a3eb02SAdrian Chadd return (&dinfo->resources); 692f4a3eb02SAdrian Chadd } 693f4a3eb02SAdrian Chadd 694f4a3eb02SAdrian Chadd 695f4a3eb02SAdrian Chadd /* Allocate region records for the given port, and add the port's memory 696f4a3eb02SAdrian Chadd * range to the mem_rman */ 697f4a3eb02SAdrian Chadd static int 698f4a3eb02SAdrian Chadd chipc_rman_init_regions (struct chipc_softc *sc, bhnd_port_type type, 699f4a3eb02SAdrian Chadd u_int port) 700f4a3eb02SAdrian Chadd { 701f4a3eb02SAdrian Chadd struct chipc_region *cr; 702f4a3eb02SAdrian Chadd rman_res_t start, end; 703f4a3eb02SAdrian Chadd u_int num_regions; 704f4a3eb02SAdrian Chadd int error; 705f4a3eb02SAdrian Chadd 706f4a3eb02SAdrian Chadd num_regions = bhnd_get_region_count(sc->dev, port, port); 707f4a3eb02SAdrian Chadd for (u_int region = 0; region < num_regions; region++) { 708f4a3eb02SAdrian Chadd /* Allocate new region record */ 709f4a3eb02SAdrian Chadd cr = chipc_alloc_region(sc, type, port, region); 710f4a3eb02SAdrian Chadd if (cr == NULL) 711f4a3eb02SAdrian Chadd return (ENODEV); 712f4a3eb02SAdrian Chadd 713f4a3eb02SAdrian Chadd /* Can't manage regions that cannot be allocated */ 714f4a3eb02SAdrian Chadd if (cr->cr_rid < 0) { 715f4a3eb02SAdrian Chadd BHND_DEBUG_DEV(sc->dev, "no rid for chipc region " 716f4a3eb02SAdrian Chadd "%s%u.%u", bhnd_port_type_name(type), port, region); 717f4a3eb02SAdrian Chadd chipc_free_region(sc, cr); 718f4a3eb02SAdrian Chadd continue; 719f4a3eb02SAdrian Chadd } 720f4a3eb02SAdrian Chadd 721f4a3eb02SAdrian Chadd /* Add to rman's managed range */ 722f4a3eb02SAdrian Chadd start = cr->cr_addr; 723f4a3eb02SAdrian Chadd end = cr->cr_end; 724f4a3eb02SAdrian Chadd if ((error = rman_manage_region(&sc->mem_rman, start, end))) { 725f4a3eb02SAdrian Chadd chipc_free_region(sc, cr); 726f4a3eb02SAdrian Chadd return (error); 727f4a3eb02SAdrian Chadd } 728f4a3eb02SAdrian Chadd 729f4a3eb02SAdrian Chadd /* Add to region list */ 730f4a3eb02SAdrian Chadd STAILQ_INSERT_TAIL(&sc->mem_regions, cr, cr_link); 731f4a3eb02SAdrian Chadd } 732f4a3eb02SAdrian Chadd 733f4a3eb02SAdrian Chadd return (0); 734f4a3eb02SAdrian Chadd } 735f4a3eb02SAdrian Chadd 736f4a3eb02SAdrian Chadd /* Initialize memory state for all chipc port regions */ 737f4a3eb02SAdrian Chadd static int 738f4a3eb02SAdrian Chadd chipc_init_rman(struct chipc_softc *sc) 739f4a3eb02SAdrian Chadd { 740f4a3eb02SAdrian Chadd u_int num_ports; 741f4a3eb02SAdrian Chadd int error; 742f4a3eb02SAdrian Chadd 743f4a3eb02SAdrian Chadd /* Port types for which we'll register chipc_region mappings */ 744f4a3eb02SAdrian Chadd bhnd_port_type types[] = { 745f4a3eb02SAdrian Chadd BHND_PORT_DEVICE 746f4a3eb02SAdrian Chadd }; 747f4a3eb02SAdrian Chadd 748f4a3eb02SAdrian Chadd /* Initialize resource manager */ 749f4a3eb02SAdrian Chadd sc->mem_rman.rm_start = 0; 750f4a3eb02SAdrian Chadd sc->mem_rman.rm_end = BUS_SPACE_MAXADDR; 751f4a3eb02SAdrian Chadd sc->mem_rman.rm_type = RMAN_ARRAY; 752f4a3eb02SAdrian Chadd sc->mem_rman.rm_descr = "ChipCommon Device Memory"; 753f4a3eb02SAdrian Chadd if ((error = rman_init(&sc->mem_rman))) { 754f4a3eb02SAdrian Chadd device_printf(sc->dev, "could not initialize mem_rman: %d\n", 755f4a3eb02SAdrian Chadd error); 756f4a3eb02SAdrian Chadd return (error); 757f4a3eb02SAdrian Chadd } 758f4a3eb02SAdrian Chadd 759f4a3eb02SAdrian Chadd /* Populate per-port-region state */ 760f4a3eb02SAdrian Chadd for (u_int i = 0; i < nitems(types); i++) { 761f4a3eb02SAdrian Chadd num_ports = bhnd_get_port_count(sc->dev, types[i]); 762f4a3eb02SAdrian Chadd for (u_int port = 0; port < num_ports; port++) { 763f4a3eb02SAdrian Chadd error = chipc_rman_init_regions(sc, types[i], port); 764f4a3eb02SAdrian Chadd if (error) { 765f4a3eb02SAdrian Chadd device_printf(sc->dev, 766f4a3eb02SAdrian Chadd "region init failed for %s%u: %d\n", 767f4a3eb02SAdrian Chadd bhnd_port_type_name(types[i]), port, 768f4a3eb02SAdrian Chadd error); 769f4a3eb02SAdrian Chadd 770f4a3eb02SAdrian Chadd goto failed; 771f4a3eb02SAdrian Chadd } 772f4a3eb02SAdrian Chadd } 773f4a3eb02SAdrian Chadd } 774f4a3eb02SAdrian Chadd 775f4a3eb02SAdrian Chadd return (0); 776f4a3eb02SAdrian Chadd 777f4a3eb02SAdrian Chadd failed: 778f4a3eb02SAdrian Chadd chipc_free_rman(sc); 779f4a3eb02SAdrian Chadd return (error); 780f4a3eb02SAdrian Chadd } 781f4a3eb02SAdrian Chadd 782f4a3eb02SAdrian Chadd /* Free memory management state */ 783f4a3eb02SAdrian Chadd static void 784f4a3eb02SAdrian Chadd chipc_free_rman(struct chipc_softc *sc) 785f4a3eb02SAdrian Chadd { 786f4a3eb02SAdrian Chadd struct chipc_region *cr, *cr_next; 787f4a3eb02SAdrian Chadd 788f4a3eb02SAdrian Chadd STAILQ_FOREACH_SAFE(cr, &sc->mem_regions, cr_link, cr_next) 789f4a3eb02SAdrian Chadd chipc_free_region(sc, cr); 790f4a3eb02SAdrian Chadd 791f4a3eb02SAdrian Chadd rman_fini(&sc->mem_rman); 792f4a3eb02SAdrian Chadd } 793f4a3eb02SAdrian Chadd 794f4a3eb02SAdrian Chadd /** 795f4a3eb02SAdrian Chadd * Return the rman instance for a given resource @p type, if any. 796f4a3eb02SAdrian Chadd * 797f4a3eb02SAdrian Chadd * @param sc The chipc device state. 798f4a3eb02SAdrian Chadd * @param type The resource type (e.g. SYS_RES_MEMORY, SYS_RES_IRQ, ...) 799f4a3eb02SAdrian Chadd */ 800f4a3eb02SAdrian Chadd static struct rman * 801f4a3eb02SAdrian Chadd chipc_get_rman(struct chipc_softc *sc, int type) 802f4a3eb02SAdrian Chadd { 803f4a3eb02SAdrian Chadd switch (type) { 804f4a3eb02SAdrian Chadd case SYS_RES_MEMORY: 805f4a3eb02SAdrian Chadd return (&sc->mem_rman); 806f4a3eb02SAdrian Chadd 807f4a3eb02SAdrian Chadd case SYS_RES_IRQ: 808f4a3eb02SAdrian Chadd /* IRQs can be used with RF_SHAREABLE, so we don't perform 809f4a3eb02SAdrian Chadd * any local proxying of resource requests. */ 810f4a3eb02SAdrian Chadd return (NULL); 811f4a3eb02SAdrian Chadd 812f4a3eb02SAdrian Chadd default: 813f4a3eb02SAdrian Chadd return (NULL); 814f4a3eb02SAdrian Chadd }; 815f4a3eb02SAdrian Chadd } 816f4a3eb02SAdrian Chadd 817f4a3eb02SAdrian Chadd static struct resource * 818f4a3eb02SAdrian Chadd chipc_alloc_resource(device_t dev, device_t child, int type, 819f4a3eb02SAdrian Chadd int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 820f4a3eb02SAdrian Chadd { 821f4a3eb02SAdrian Chadd struct chipc_softc *sc; 822f4a3eb02SAdrian Chadd struct chipc_region *cr; 823f4a3eb02SAdrian Chadd struct resource_list_entry *rle; 824f4a3eb02SAdrian Chadd struct resource *rv; 825f4a3eb02SAdrian Chadd struct rman *rm; 826f4a3eb02SAdrian Chadd int error; 827f4a3eb02SAdrian Chadd bool passthrough, isdefault; 828f4a3eb02SAdrian Chadd 829f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 830f4a3eb02SAdrian Chadd passthrough = (device_get_parent(child) != dev); 831f4a3eb02SAdrian Chadd isdefault = RMAN_IS_DEFAULT_RANGE(start, end); 832f4a3eb02SAdrian Chadd rle = NULL; 833f4a3eb02SAdrian Chadd 834f4a3eb02SAdrian Chadd /* Fetch the resource manager, delegate request if necessary */ 835f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 836f4a3eb02SAdrian Chadd if (rm == NULL) { 837f4a3eb02SAdrian Chadd /* Requested resource type is delegated to our parent */ 838f4a3eb02SAdrian Chadd rv = bus_generic_rl_alloc_resource(dev, child, type, rid, 839f4a3eb02SAdrian Chadd start, end, count, flags); 840f4a3eb02SAdrian Chadd return (rv); 841f4a3eb02SAdrian Chadd } 842f4a3eb02SAdrian Chadd 843f4a3eb02SAdrian Chadd /* Populate defaults */ 844f4a3eb02SAdrian Chadd if (!passthrough && isdefault) { 845f4a3eb02SAdrian Chadd /* Fetch the resource list entry. */ 846f4a3eb02SAdrian Chadd rle = resource_list_find(BUS_GET_RESOURCE_LIST(dev, child), 847f4a3eb02SAdrian Chadd type, *rid); 848f4a3eb02SAdrian Chadd if (rle == NULL) { 849f4a3eb02SAdrian Chadd device_printf(dev, 850f4a3eb02SAdrian Chadd "default resource %#x type %d for child %s " 851f4a3eb02SAdrian Chadd "not found\n", *rid, type, 852f4a3eb02SAdrian Chadd device_get_nameunit(child)); 853f4a3eb02SAdrian Chadd return (NULL); 854f4a3eb02SAdrian Chadd } 855f4a3eb02SAdrian Chadd 856f4a3eb02SAdrian Chadd if (rle->res != NULL) { 857f4a3eb02SAdrian Chadd device_printf(dev, 8582b693a88SLandon J. Fuller "resource entry %#x type %d for child %s is busy " 8592b693a88SLandon J. Fuller "[%d]\n", 8602b693a88SLandon J. Fuller *rid, type, device_get_nameunit(child), 8612b693a88SLandon J. Fuller rman_get_flags(rle->res)); 862f4a3eb02SAdrian Chadd 863f4a3eb02SAdrian Chadd return (NULL); 864f4a3eb02SAdrian Chadd } 865f4a3eb02SAdrian Chadd 866f4a3eb02SAdrian Chadd start = rle->start; 867f4a3eb02SAdrian Chadd end = rle->end; 868f4a3eb02SAdrian Chadd count = ulmax(count, rle->count); 869f4a3eb02SAdrian Chadd } 870f4a3eb02SAdrian Chadd 871f4a3eb02SAdrian Chadd /* Locate a mapping region */ 872f4a3eb02SAdrian Chadd if ((cr = chipc_find_region(sc, start, end)) == NULL) { 873f4a3eb02SAdrian Chadd /* Resource requests outside our shared port regions can be 874f4a3eb02SAdrian Chadd * delegated to our parent. */ 875f4a3eb02SAdrian Chadd rv = bus_generic_rl_alloc_resource(dev, child, type, rid, 876f4a3eb02SAdrian Chadd start, end, count, flags); 877f4a3eb02SAdrian Chadd return (rv); 878f4a3eb02SAdrian Chadd } 879f4a3eb02SAdrian Chadd 880f4a3eb02SAdrian Chadd /* Try to retain a region reference */ 881f4a3eb02SAdrian Chadd if ((error = chipc_retain_region(sc, cr, RF_ALLOCATED))) { 882f4a3eb02SAdrian Chadd CHIPC_UNLOCK(sc); 883f4a3eb02SAdrian Chadd return (NULL); 884f4a3eb02SAdrian Chadd } 885f4a3eb02SAdrian Chadd 886f4a3eb02SAdrian Chadd /* Make our rman reservation */ 887f4a3eb02SAdrian Chadd rv = rman_reserve_resource(rm, start, end, count, flags & ~RF_ACTIVE, 888f4a3eb02SAdrian Chadd child); 889f4a3eb02SAdrian Chadd if (rv == NULL) { 890f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ALLOCATED); 891f4a3eb02SAdrian Chadd return (NULL); 892f4a3eb02SAdrian Chadd } 893f4a3eb02SAdrian Chadd 894f4a3eb02SAdrian Chadd rman_set_rid(rv, *rid); 895f4a3eb02SAdrian Chadd 896f4a3eb02SAdrian Chadd /* Activate */ 897f4a3eb02SAdrian Chadd if (flags & RF_ACTIVE) { 898f4a3eb02SAdrian Chadd error = bus_activate_resource(child, type, *rid, rv); 899f4a3eb02SAdrian Chadd if (error) { 900f4a3eb02SAdrian Chadd device_printf(dev, 901f4a3eb02SAdrian Chadd "failed to activate entry %#x type %d for " 902f4a3eb02SAdrian Chadd "child %s: %d\n", 903f4a3eb02SAdrian Chadd *rid, type, device_get_nameunit(child), error); 904f4a3eb02SAdrian Chadd 905f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ALLOCATED); 906f4a3eb02SAdrian Chadd rman_release_resource(rv); 907f4a3eb02SAdrian Chadd 908f4a3eb02SAdrian Chadd return (NULL); 909f4a3eb02SAdrian Chadd } 910f4a3eb02SAdrian Chadd } 911f4a3eb02SAdrian Chadd 912f4a3eb02SAdrian Chadd /* Update child's resource list entry */ 913f4a3eb02SAdrian Chadd if (rle != NULL) { 914f4a3eb02SAdrian Chadd rle->res = rv; 915f4a3eb02SAdrian Chadd rle->start = rman_get_start(rv); 916f4a3eb02SAdrian Chadd rle->end = rman_get_end(rv); 917f4a3eb02SAdrian Chadd rle->count = rman_get_size(rv); 918f4a3eb02SAdrian Chadd } 919f4a3eb02SAdrian Chadd 920f4a3eb02SAdrian Chadd return (rv); 921f4a3eb02SAdrian Chadd } 922f4a3eb02SAdrian Chadd 923f4a3eb02SAdrian Chadd static int 924f4a3eb02SAdrian Chadd chipc_release_resource(device_t dev, device_t child, int type, int rid, 925f4a3eb02SAdrian Chadd struct resource *r) 926f4a3eb02SAdrian Chadd { 927f4a3eb02SAdrian Chadd struct chipc_softc *sc; 928f4a3eb02SAdrian Chadd struct chipc_region *cr; 929f4a3eb02SAdrian Chadd struct rman *rm; 9302b693a88SLandon J. Fuller struct resource_list_entry *rle; 931f4a3eb02SAdrian Chadd int error; 932f4a3eb02SAdrian Chadd 933f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 934f4a3eb02SAdrian Chadd 935f4a3eb02SAdrian Chadd /* Handled by parent bus? */ 936f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 937f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 938f4a3eb02SAdrian Chadd return (bus_generic_rl_release_resource(dev, child, type, rid, 939f4a3eb02SAdrian Chadd r)); 940f4a3eb02SAdrian Chadd } 941f4a3eb02SAdrian Chadd 942f4a3eb02SAdrian Chadd /* Locate the mapping region */ 943f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, rman_get_start(r), rman_get_end(r)); 944f4a3eb02SAdrian Chadd if (cr == NULL) 945f4a3eb02SAdrian Chadd return (EINVAL); 946f4a3eb02SAdrian Chadd 947f4a3eb02SAdrian Chadd /* Deactivate resources */ 948f4a3eb02SAdrian Chadd if (rman_get_flags(r) & RF_ACTIVE) { 949f4a3eb02SAdrian Chadd error = BUS_DEACTIVATE_RESOURCE(dev, child, type, rid, r); 950f4a3eb02SAdrian Chadd if (error) 951f4a3eb02SAdrian Chadd return (error); 952f4a3eb02SAdrian Chadd } 953f4a3eb02SAdrian Chadd 954f4a3eb02SAdrian Chadd if ((error = rman_release_resource(r))) 955f4a3eb02SAdrian Chadd return (error); 956f4a3eb02SAdrian Chadd 957f4a3eb02SAdrian Chadd /* Drop allocation reference */ 958f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ALLOCATED); 959f4a3eb02SAdrian Chadd 9602b693a88SLandon J. Fuller /* Clear reference from the resource list entry if exists */ 9612b693a88SLandon J. Fuller rle = resource_list_find(BUS_GET_RESOURCE_LIST(dev, child), type, rid); 9622b693a88SLandon J. Fuller if (rle != NULL) 9632b693a88SLandon J. Fuller rle->res = NULL; 9642b693a88SLandon J. Fuller 965f4a3eb02SAdrian Chadd return (0); 966f4a3eb02SAdrian Chadd } 967f4a3eb02SAdrian Chadd 968f4a3eb02SAdrian Chadd static int 969f4a3eb02SAdrian Chadd chipc_adjust_resource(device_t dev, device_t child, int type, 970f4a3eb02SAdrian Chadd struct resource *r, rman_res_t start, rman_res_t end) 971f4a3eb02SAdrian Chadd { 972f4a3eb02SAdrian Chadd struct chipc_softc *sc; 973f4a3eb02SAdrian Chadd struct chipc_region *cr; 974f4a3eb02SAdrian Chadd struct rman *rm; 975f4a3eb02SAdrian Chadd 976f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 977f4a3eb02SAdrian Chadd 978f4a3eb02SAdrian Chadd /* Handled by parent bus? */ 979f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 980f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 981f4a3eb02SAdrian Chadd return (bus_generic_adjust_resource(dev, child, type, r, start, 982f4a3eb02SAdrian Chadd end)); 983f4a3eb02SAdrian Chadd } 984f4a3eb02SAdrian Chadd 985f4a3eb02SAdrian Chadd /* The range is limited to the existing region mapping */ 986f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, rman_get_start(r), rman_get_end(r)); 987f4a3eb02SAdrian Chadd if (cr == NULL) 988f4a3eb02SAdrian Chadd return (EINVAL); 989f4a3eb02SAdrian Chadd 990f4a3eb02SAdrian Chadd if (end <= start) 991f4a3eb02SAdrian Chadd return (EINVAL); 992f4a3eb02SAdrian Chadd 993f4a3eb02SAdrian Chadd if (start < cr->cr_addr || end > cr->cr_end) 994f4a3eb02SAdrian Chadd return (EINVAL); 995f4a3eb02SAdrian Chadd 996f4a3eb02SAdrian Chadd /* Range falls within the existing region */ 997f4a3eb02SAdrian Chadd return (rman_adjust_resource(r, start, end)); 998f4a3eb02SAdrian Chadd } 999f4a3eb02SAdrian Chadd 1000f4a3eb02SAdrian Chadd /** 1001f4a3eb02SAdrian Chadd * Retain an RF_ACTIVE reference to the region mapping @p r, and 1002f4a3eb02SAdrian Chadd * configure @p r with its subregion values. 1003f4a3eb02SAdrian Chadd * 1004f4a3eb02SAdrian Chadd * @param sc Driver instance state. 1005f4a3eb02SAdrian Chadd * @param child Requesting child device. 1006f4a3eb02SAdrian Chadd * @param type resource type of @p r. 1007f4a3eb02SAdrian Chadd * @param rid resource id of @p r 1008f4a3eb02SAdrian Chadd * @param r resource to be activated. 1009f4a3eb02SAdrian Chadd * @param req_direct If true, failure to allocate a direct bhnd resource 1010f4a3eb02SAdrian Chadd * will be treated as an error. If false, the resource will not be marked 1011f4a3eb02SAdrian Chadd * as RF_ACTIVE if bhnd direct resource allocation fails. 1012f4a3eb02SAdrian Chadd */ 1013f4a3eb02SAdrian Chadd static int 1014f4a3eb02SAdrian Chadd chipc_try_activate_resource(struct chipc_softc *sc, device_t child, int type, 1015f4a3eb02SAdrian Chadd int rid, struct resource *r, bool req_direct) 1016f4a3eb02SAdrian Chadd { 1017f4a3eb02SAdrian Chadd struct rman *rm; 1018f4a3eb02SAdrian Chadd struct chipc_region *cr; 1019f4a3eb02SAdrian Chadd bhnd_size_t cr_offset; 1020f4a3eb02SAdrian Chadd rman_res_t r_start, r_end, r_size; 1021f4a3eb02SAdrian Chadd int error; 1022f4a3eb02SAdrian Chadd 1023f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1024f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) 1025f4a3eb02SAdrian Chadd return (EINVAL); 1026f4a3eb02SAdrian Chadd 1027f4a3eb02SAdrian Chadd r_start = rman_get_start(r); 1028f4a3eb02SAdrian Chadd r_end = rman_get_end(r); 1029f4a3eb02SAdrian Chadd r_size = rman_get_size(r); 1030f4a3eb02SAdrian Chadd 1031f4a3eb02SAdrian Chadd /* Find the corresponding chipc region */ 1032f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, r_start, r_end); 1033f4a3eb02SAdrian Chadd if (cr == NULL) 1034f4a3eb02SAdrian Chadd return (EINVAL); 1035f4a3eb02SAdrian Chadd 1036f4a3eb02SAdrian Chadd /* Calculate subregion offset within the chipc region */ 1037f4a3eb02SAdrian Chadd cr_offset = r_start - cr->cr_addr; 1038f4a3eb02SAdrian Chadd 1039f4a3eb02SAdrian Chadd /* Retain (and activate, if necessary) the chipc region */ 1040f4a3eb02SAdrian Chadd if ((error = chipc_retain_region(sc, cr, RF_ACTIVE))) 1041f4a3eb02SAdrian Chadd return (error); 1042f4a3eb02SAdrian Chadd 1043f4a3eb02SAdrian Chadd /* Configure child resource with its subregion values. */ 1044f4a3eb02SAdrian Chadd if (cr->cr_res->direct) { 1045f4a3eb02SAdrian Chadd error = chipc_init_child_resource(r, cr->cr_res->res, 1046f4a3eb02SAdrian Chadd cr_offset, r_size); 1047f4a3eb02SAdrian Chadd if (error) 1048f4a3eb02SAdrian Chadd goto cleanup; 1049f4a3eb02SAdrian Chadd 1050f4a3eb02SAdrian Chadd /* Mark active */ 1051f4a3eb02SAdrian Chadd if ((error = rman_activate_resource(r))) 1052f4a3eb02SAdrian Chadd goto cleanup; 1053f4a3eb02SAdrian Chadd } else if (req_direct) { 1054f4a3eb02SAdrian Chadd error = ENOMEM; 1055f4a3eb02SAdrian Chadd goto cleanup; 1056f4a3eb02SAdrian Chadd } 1057f4a3eb02SAdrian Chadd 1058f4a3eb02SAdrian Chadd return (0); 1059f4a3eb02SAdrian Chadd 1060f4a3eb02SAdrian Chadd cleanup: 1061f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ACTIVE); 1062f4a3eb02SAdrian Chadd return (error); 1063f4a3eb02SAdrian Chadd } 1064f4a3eb02SAdrian Chadd 1065f4a3eb02SAdrian Chadd static int 1066f4a3eb02SAdrian Chadd chipc_activate_bhnd_resource(device_t dev, device_t child, int type, 1067f4a3eb02SAdrian Chadd int rid, struct bhnd_resource *r) 1068f4a3eb02SAdrian Chadd { 1069f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1070f4a3eb02SAdrian Chadd struct rman *rm; 1071f4a3eb02SAdrian Chadd int error; 1072f4a3eb02SAdrian Chadd 1073f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1074f4a3eb02SAdrian Chadd 1075f4a3eb02SAdrian Chadd /* Delegate non-locally managed resources to parent */ 1076f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1077f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r->res, rm)) { 1078f4a3eb02SAdrian Chadd return (bhnd_bus_generic_activate_resource(dev, child, type, 1079f4a3eb02SAdrian Chadd rid, r)); 1080f4a3eb02SAdrian Chadd } 1081f4a3eb02SAdrian Chadd 1082f4a3eb02SAdrian Chadd /* Try activating the chipc region resource */ 1083f4a3eb02SAdrian Chadd error = chipc_try_activate_resource(sc, child, type, rid, r->res, 1084f4a3eb02SAdrian Chadd false); 1085f4a3eb02SAdrian Chadd if (error) 1086f4a3eb02SAdrian Chadd return (error); 1087f4a3eb02SAdrian Chadd 1088f4a3eb02SAdrian Chadd /* Mark the child resource as direct according to the returned resource 1089f4a3eb02SAdrian Chadd * state */ 1090f4a3eb02SAdrian Chadd if (rman_get_flags(r->res) & RF_ACTIVE) 1091f4a3eb02SAdrian Chadd r->direct = true; 1092f4a3eb02SAdrian Chadd 1093f4a3eb02SAdrian Chadd return (0); 1094f4a3eb02SAdrian Chadd } 1095f4a3eb02SAdrian Chadd 1096f4a3eb02SAdrian Chadd static int 1097f4a3eb02SAdrian Chadd chipc_activate_resource(device_t dev, device_t child, int type, int rid, 1098f4a3eb02SAdrian Chadd struct resource *r) 1099f4a3eb02SAdrian Chadd { 1100f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1101f4a3eb02SAdrian Chadd struct rman *rm; 1102f4a3eb02SAdrian Chadd 1103f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1104f4a3eb02SAdrian Chadd 1105f4a3eb02SAdrian Chadd /* Delegate non-locally managed resources to parent */ 1106f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1107f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 1108f4a3eb02SAdrian Chadd return (bus_generic_activate_resource(dev, child, type, rid, 1109f4a3eb02SAdrian Chadd r)); 1110f4a3eb02SAdrian Chadd } 1111f4a3eb02SAdrian Chadd 1112f4a3eb02SAdrian Chadd /* Try activating the chipc region-based resource */ 1113f4a3eb02SAdrian Chadd return (chipc_try_activate_resource(sc, child, type, rid, r, true)); 1114f4a3eb02SAdrian Chadd } 1115f4a3eb02SAdrian Chadd 1116f4a3eb02SAdrian Chadd /** 1117f4a3eb02SAdrian Chadd * Default bhndb(4) implementation of BUS_DEACTIVATE_RESOURCE(). 1118f4a3eb02SAdrian Chadd */ 1119f4a3eb02SAdrian Chadd static int 1120f4a3eb02SAdrian Chadd chipc_deactivate_resource(device_t dev, device_t child, int type, 1121f4a3eb02SAdrian Chadd int rid, struct resource *r) 1122f4a3eb02SAdrian Chadd { 1123f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1124f4a3eb02SAdrian Chadd struct chipc_region *cr; 1125f4a3eb02SAdrian Chadd struct rman *rm; 1126f4a3eb02SAdrian Chadd int error; 1127f4a3eb02SAdrian Chadd 1128f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1129f4a3eb02SAdrian Chadd 1130f4a3eb02SAdrian Chadd /* Handled by parent bus? */ 1131f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1132f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 1133f4a3eb02SAdrian Chadd return (bus_generic_deactivate_resource(dev, child, type, rid, 1134f4a3eb02SAdrian Chadd r)); 1135f4a3eb02SAdrian Chadd } 1136f4a3eb02SAdrian Chadd 1137f4a3eb02SAdrian Chadd /* Find the corresponding chipc region */ 1138f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, rman_get_start(r), rman_get_end(r)); 1139f4a3eb02SAdrian Chadd if (cr == NULL) 1140f4a3eb02SAdrian Chadd return (EINVAL); 1141f4a3eb02SAdrian Chadd 1142f4a3eb02SAdrian Chadd /* Mark inactive */ 1143f4a3eb02SAdrian Chadd if ((error = rman_deactivate_resource(r))) 1144f4a3eb02SAdrian Chadd return (error); 1145f4a3eb02SAdrian Chadd 1146f4a3eb02SAdrian Chadd /* Drop associated RF_ACTIVE reference */ 1147f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ACTIVE); 1148f4a3eb02SAdrian Chadd 1149f4a3eb02SAdrian Chadd return (0); 1150f4a3eb02SAdrian Chadd } 1151f4a3eb02SAdrian Chadd 1152f4a3eb02SAdrian Chadd /** 1153f4a3eb02SAdrian Chadd * Examine bus state and make a best effort determination of whether it's 1154f4a3eb02SAdrian Chadd * likely safe to enable the muxed SPROM pins. 1155f4a3eb02SAdrian Chadd * 1156f4a3eb02SAdrian Chadd * On devices that do not use SPROM pin muxing, always returns true. 1157f4a3eb02SAdrian Chadd * 1158f4a3eb02SAdrian Chadd * @param sc chipc driver state. 1159f4a3eb02SAdrian Chadd */ 1160f4a3eb02SAdrian Chadd static bool 1161f4a3eb02SAdrian Chadd chipc_should_enable_sprom(struct chipc_softc *sc) 1162f4a3eb02SAdrian Chadd { 1163f4a3eb02SAdrian Chadd device_t *devs; 1164f4a3eb02SAdrian Chadd device_t hostb; 1165f4a3eb02SAdrian Chadd device_t parent; 1166f4a3eb02SAdrian Chadd int devcount; 1167f4a3eb02SAdrian Chadd int error; 1168f4a3eb02SAdrian Chadd bool result; 1169f4a3eb02SAdrian Chadd 1170f4a3eb02SAdrian Chadd mtx_assert(&Giant, MA_OWNED); /* for newbus */ 1171f4a3eb02SAdrian Chadd 1172f4a3eb02SAdrian Chadd /* Nothing to do? */ 1173f4a3eb02SAdrian Chadd if (!CHIPC_QUIRK(sc, MUX_SPROM)) 1174f4a3eb02SAdrian Chadd return (true); 1175f4a3eb02SAdrian Chadd 1176f4a3eb02SAdrian Chadd parent = device_get_parent(sc->dev); 1177f4a3eb02SAdrian Chadd hostb = bhnd_find_hostb_device(parent); 1178f4a3eb02SAdrian Chadd 1179f4a3eb02SAdrian Chadd if ((error = device_get_children(parent, &devs, &devcount))) 1180f4a3eb02SAdrian Chadd return (false); 1181f4a3eb02SAdrian Chadd 1182f4a3eb02SAdrian Chadd /* Reject any active devices other than ChipCommon, or the 1183f4a3eb02SAdrian Chadd * host bridge (if any). */ 1184f4a3eb02SAdrian Chadd result = true; 1185f4a3eb02SAdrian Chadd for (int i = 0; i < devcount; i++) { 1186f4a3eb02SAdrian Chadd if (devs[i] == hostb || devs[i] == sc->dev) 1187f4a3eb02SAdrian Chadd continue; 1188f4a3eb02SAdrian Chadd 1189f4a3eb02SAdrian Chadd if (!device_is_attached(devs[i])) 1190f4a3eb02SAdrian Chadd continue; 1191f4a3eb02SAdrian Chadd 1192f4a3eb02SAdrian Chadd if (device_is_suspended(devs[i])) 1193f4a3eb02SAdrian Chadd continue; 1194f4a3eb02SAdrian Chadd 1195f4a3eb02SAdrian Chadd /* Active device; assume SPROM is busy */ 1196f4a3eb02SAdrian Chadd result = false; 1197f4a3eb02SAdrian Chadd break; 1198f4a3eb02SAdrian Chadd } 1199f4a3eb02SAdrian Chadd 1200f4a3eb02SAdrian Chadd free(devs, M_TEMP); 1201f4a3eb02SAdrian Chadd return (result); 1202f4a3eb02SAdrian Chadd } 1203e83ce340SAdrian Chadd 1204e83ce340SAdrian Chadd /** 1205e83ce340SAdrian Chadd * If required by this device, enable access to the SPROM. 1206e83ce340SAdrian Chadd * 1207e83ce340SAdrian Chadd * @param sc chipc driver state. 1208e83ce340SAdrian Chadd */ 1209e83ce340SAdrian Chadd static int 1210f4a3eb02SAdrian Chadd chipc_enable_sprom_pins(device_t dev) 1211e83ce340SAdrian Chadd { 1212f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1213e83ce340SAdrian Chadd uint32_t cctrl; 1214f4a3eb02SAdrian Chadd int error; 1215e83ce340SAdrian Chadd 1216f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1217e83ce340SAdrian Chadd 1218e83ce340SAdrian Chadd /* Nothing to do? */ 1219e83ce340SAdrian Chadd if (!CHIPC_QUIRK(sc, MUX_SPROM)) 1220e83ce340SAdrian Chadd return (0); 1221e83ce340SAdrian Chadd 1222f4a3eb02SAdrian Chadd /* Make sure we're holding Giant for newbus */ 1223f4a3eb02SAdrian Chadd mtx_lock(&Giant); 1224f4a3eb02SAdrian Chadd CHIPC_LOCK(sc); 1225f4a3eb02SAdrian Chadd 1226f4a3eb02SAdrian Chadd /* Already enabled? */ 1227f4a3eb02SAdrian Chadd if (sc->sprom_refcnt >= 1) { 1228f4a3eb02SAdrian Chadd error = 0; 1229f4a3eb02SAdrian Chadd goto finished; 1230f4a3eb02SAdrian Chadd } 1231f4a3eb02SAdrian Chadd 1232f4a3eb02SAdrian Chadd /* Check whether bus is busy */ 1233f4a3eb02SAdrian Chadd if (!chipc_should_enable_sprom(sc)) { 1234f4a3eb02SAdrian Chadd error = EBUSY; 1235f4a3eb02SAdrian Chadd goto finished; 1236f4a3eb02SAdrian Chadd } 1237f4a3eb02SAdrian Chadd 1238e83ce340SAdrian Chadd cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); 1239e83ce340SAdrian Chadd 1240e83ce340SAdrian Chadd /* 4331 devices */ 1241e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA_MUX_SPROM)) { 1242e83ce340SAdrian Chadd cctrl &= ~CHIPC_CCTRL4331_EXTPA_EN; 1243e83ce340SAdrian Chadd 1244e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_GPIO2_5_MUX_SPROM)) 1245e83ce340SAdrian Chadd cctrl &= ~CHIPC_CCTRL4331_EXTPA_ON_GPIO2_5; 1246e83ce340SAdrian Chadd 1247e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA2_MUX_SPROM)) 1248e83ce340SAdrian Chadd cctrl &= ~CHIPC_CCTRL4331_EXTPA_EN2; 1249e83ce340SAdrian Chadd 1250e83ce340SAdrian Chadd bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); 1251f4a3eb02SAdrian Chadd error = 0; 1252f4a3eb02SAdrian Chadd goto finished; 1253e83ce340SAdrian Chadd } 1254e83ce340SAdrian Chadd 1255e83ce340SAdrian Chadd /* 4360 devices */ 1256e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4360_FEM_MUX_SPROM)) { 1257e83ce340SAdrian Chadd /* Unimplemented */ 1258e83ce340SAdrian Chadd } 1259e83ce340SAdrian Chadd 1260e83ce340SAdrian Chadd /* Refuse to proceed on unsupported devices with muxed SPROM pins */ 1261e83ce340SAdrian Chadd device_printf(sc->dev, "muxed sprom lines on unrecognized device\n"); 1262f4a3eb02SAdrian Chadd error = ENXIO; 1263f4a3eb02SAdrian Chadd 1264f4a3eb02SAdrian Chadd finished: 1265f4a3eb02SAdrian Chadd /* Bump the reference count */ 1266f4a3eb02SAdrian Chadd if (error == 0) 1267f4a3eb02SAdrian Chadd sc->sprom_refcnt++; 1268f4a3eb02SAdrian Chadd 1269f4a3eb02SAdrian Chadd CHIPC_UNLOCK(sc); 1270f4a3eb02SAdrian Chadd mtx_unlock(&Giant); 1271f4a3eb02SAdrian Chadd 1272f4a3eb02SAdrian Chadd return (error); 1273e83ce340SAdrian Chadd } 1274e83ce340SAdrian Chadd 1275e83ce340SAdrian Chadd /** 1276e83ce340SAdrian Chadd * If required by this device, revert any GPIO/pin configuration applied 1277e83ce340SAdrian Chadd * to allow SPROM access. 1278e83ce340SAdrian Chadd * 1279e83ce340SAdrian Chadd * @param sc chipc driver state. 1280e83ce340SAdrian Chadd */ 1281f4a3eb02SAdrian Chadd static void 1282f4a3eb02SAdrian Chadd chipc_disable_sprom_pins(device_t dev) 1283e83ce340SAdrian Chadd { 1284f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1285e83ce340SAdrian Chadd uint32_t cctrl; 1286e83ce340SAdrian Chadd 1287f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1288e83ce340SAdrian Chadd 1289e83ce340SAdrian Chadd /* Nothing to do? */ 1290e83ce340SAdrian Chadd if (!CHIPC_QUIRK(sc, MUX_SPROM)) 1291f4a3eb02SAdrian Chadd return; 1292f4a3eb02SAdrian Chadd 1293f4a3eb02SAdrian Chadd CHIPC_LOCK(sc); 1294f4a3eb02SAdrian Chadd 1295f4a3eb02SAdrian Chadd /* Check reference count, skip disable if in-use. */ 1296f4a3eb02SAdrian Chadd KASSERT(sc->sprom_refcnt > 0, ("sprom refcnt overrelease")); 1297f4a3eb02SAdrian Chadd sc->sprom_refcnt--; 1298f4a3eb02SAdrian Chadd if (sc->sprom_refcnt > 0) 1299f4a3eb02SAdrian Chadd goto finished; 1300e83ce340SAdrian Chadd 1301e83ce340SAdrian Chadd cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); 1302e83ce340SAdrian Chadd 1303e83ce340SAdrian Chadd /* 4331 devices */ 1304e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA_MUX_SPROM)) { 1305e83ce340SAdrian Chadd cctrl |= CHIPC_CCTRL4331_EXTPA_EN; 1306e83ce340SAdrian Chadd 1307e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_GPIO2_5_MUX_SPROM)) 1308e83ce340SAdrian Chadd cctrl |= CHIPC_CCTRL4331_EXTPA_ON_GPIO2_5; 1309e83ce340SAdrian Chadd 1310e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA2_MUX_SPROM)) 1311e83ce340SAdrian Chadd cctrl |= CHIPC_CCTRL4331_EXTPA_EN2; 1312e83ce340SAdrian Chadd 1313e83ce340SAdrian Chadd bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); 1314f4a3eb02SAdrian Chadd goto finished; 1315e83ce340SAdrian Chadd } 1316e83ce340SAdrian Chadd 1317e83ce340SAdrian Chadd /* 4360 devices */ 1318e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4360_FEM_MUX_SPROM)) { 1319e83ce340SAdrian Chadd /* Unimplemented */ 1320e83ce340SAdrian Chadd } 1321e83ce340SAdrian Chadd 1322f4a3eb02SAdrian Chadd finished: 1323f4a3eb02SAdrian Chadd CHIPC_UNLOCK(sc); 1324e83ce340SAdrian Chadd } 1325e83ce340SAdrian Chadd 13268ef24a0dSAdrian Chadd static void 13278ef24a0dSAdrian Chadd chipc_write_chipctrl(device_t dev, uint32_t value, uint32_t mask) 13288ef24a0dSAdrian Chadd { 13298ef24a0dSAdrian Chadd struct chipc_softc *sc; 13308ef24a0dSAdrian Chadd uint32_t cctrl; 13318ef24a0dSAdrian Chadd 13328ef24a0dSAdrian Chadd sc = device_get_softc(dev); 13338ef24a0dSAdrian Chadd 13348ef24a0dSAdrian Chadd CHIPC_LOCK(sc); 13358ef24a0dSAdrian Chadd 13368ef24a0dSAdrian Chadd cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); 13378ef24a0dSAdrian Chadd cctrl = (cctrl & ~mask) | (value | mask); 13388ef24a0dSAdrian Chadd bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); 13398ef24a0dSAdrian Chadd 13408ef24a0dSAdrian Chadd CHIPC_UNLOCK(sc); 13418ef24a0dSAdrian Chadd } 13428ef24a0dSAdrian Chadd 13432b693a88SLandon J. Fuller static struct chipc_caps * 13442b693a88SLandon J. Fuller chipc_get_caps(device_t dev) 13452b693a88SLandon J. Fuller { 13462b693a88SLandon J. Fuller struct chipc_softc *sc; 13472b693a88SLandon J. Fuller 13482b693a88SLandon J. Fuller sc = device_get_softc(dev); 13492b693a88SLandon J. Fuller return (&sc->caps); 13502b693a88SLandon J. Fuller } 13512b693a88SLandon J. Fuller 1352e129bcd6SLandon J. Fuller static uint32_t 1353e129bcd6SLandon J. Fuller chipc_get_flash_cfg(device_t dev) 1354e129bcd6SLandon J. Fuller { 1355e129bcd6SLandon J. Fuller struct chipc_softc *sc; 1356e129bcd6SLandon J. Fuller 1357e129bcd6SLandon J. Fuller sc = device_get_softc(dev); 1358e129bcd6SLandon J. Fuller return (bhnd_bus_read_4(sc->core, CHIPC_FLASH_CFG)); 1359e129bcd6SLandon J. Fuller } 1360e129bcd6SLandon J. Fuller 13614ad7e9b0SAdrian Chadd static device_method_t chipc_methods[] = { 13624ad7e9b0SAdrian Chadd /* Device interface */ 13634ad7e9b0SAdrian Chadd DEVMETHOD(device_probe, chipc_probe), 13644ad7e9b0SAdrian Chadd DEVMETHOD(device_attach, chipc_attach), 13654ad7e9b0SAdrian Chadd DEVMETHOD(device_detach, chipc_detach), 13664ad7e9b0SAdrian Chadd DEVMETHOD(device_suspend, chipc_suspend), 13674ad7e9b0SAdrian Chadd DEVMETHOD(device_resume, chipc_resume), 13684ad7e9b0SAdrian Chadd 1369f4a3eb02SAdrian Chadd /* Bus interface */ 1370f4a3eb02SAdrian Chadd DEVMETHOD(bus_probe_nomatch, chipc_probe_nomatch), 1371f4a3eb02SAdrian Chadd DEVMETHOD(bus_print_child, chipc_print_child), 1372f4a3eb02SAdrian Chadd DEVMETHOD(bus_child_pnpinfo_str, chipc_child_pnpinfo_str), 1373f4a3eb02SAdrian Chadd DEVMETHOD(bus_child_location_str, chipc_child_location_str), 1374f4a3eb02SAdrian Chadd 1375f4a3eb02SAdrian Chadd DEVMETHOD(bus_add_child, chipc_add_child), 1376f4a3eb02SAdrian Chadd DEVMETHOD(bus_child_deleted, chipc_child_deleted), 1377f4a3eb02SAdrian Chadd 1378f4a3eb02SAdrian Chadd DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 1379f4a3eb02SAdrian Chadd DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 1380f4a3eb02SAdrian Chadd DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource), 1381f4a3eb02SAdrian Chadd DEVMETHOD(bus_alloc_resource, chipc_alloc_resource), 1382f4a3eb02SAdrian Chadd DEVMETHOD(bus_release_resource, chipc_release_resource), 1383f4a3eb02SAdrian Chadd DEVMETHOD(bus_adjust_resource, chipc_adjust_resource), 1384f4a3eb02SAdrian Chadd DEVMETHOD(bus_activate_resource, chipc_activate_resource), 1385f4a3eb02SAdrian Chadd DEVMETHOD(bus_deactivate_resource, chipc_deactivate_resource), 1386f4a3eb02SAdrian Chadd DEVMETHOD(bus_get_resource_list, chipc_get_resource_list), 1387f4a3eb02SAdrian Chadd 1388f4a3eb02SAdrian Chadd DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 1389f4a3eb02SAdrian Chadd DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 1390f4a3eb02SAdrian Chadd DEVMETHOD(bus_config_intr, bus_generic_config_intr), 1391f4a3eb02SAdrian Chadd DEVMETHOD(bus_bind_intr, bus_generic_bind_intr), 1392f4a3eb02SAdrian Chadd DEVMETHOD(bus_describe_intr, bus_generic_describe_intr), 1393f4a3eb02SAdrian Chadd 1394f4a3eb02SAdrian Chadd /* BHND bus inteface */ 1395f4a3eb02SAdrian Chadd DEVMETHOD(bhnd_bus_activate_resource, chipc_activate_bhnd_resource), 1396f4a3eb02SAdrian Chadd 13974ad7e9b0SAdrian Chadd /* ChipCommon interface */ 13988ef24a0dSAdrian Chadd DEVMETHOD(bhnd_chipc_write_chipctrl, chipc_write_chipctrl), 1399f4a3eb02SAdrian Chadd DEVMETHOD(bhnd_chipc_enable_sprom, chipc_enable_sprom_pins), 1400f4a3eb02SAdrian Chadd DEVMETHOD(bhnd_chipc_disable_sprom, chipc_disable_sprom_pins), 14012b693a88SLandon J. Fuller DEVMETHOD(bhnd_chipc_get_caps, chipc_get_caps), 1402e129bcd6SLandon J. Fuller DEVMETHOD(bhnd_chipc_get_flash_cfg, chipc_get_flash_cfg), 1403e83ce340SAdrian Chadd 14044ad7e9b0SAdrian Chadd DEVMETHOD_END 14054ad7e9b0SAdrian Chadd }; 14064ad7e9b0SAdrian Chadd 14074ad7e9b0SAdrian Chadd DEFINE_CLASS_0(bhnd_chipc, chipc_driver, chipc_methods, sizeof(struct chipc_softc)); 1408e129bcd6SLandon J. Fuller EARLY_DRIVER_MODULE(bhnd_chipc, bhnd, chipc_driver, bhnd_chipc_devclass, 0, 0, 1409e129bcd6SLandon J. Fuller BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); 141096546b75SAdrian Chadd MODULE_DEPEND(bhnd_chipc, bhnd, 1, 1, 1); 14114ad7e9b0SAdrian Chadd MODULE_VERSION(bhnd_chipc, 1); 1412