14ad7e9b0SAdrian Chadd /*- 2f4a3eb02SAdrian Chadd * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org> 3f4a3eb02SAdrian Chadd * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com> 48e35bf83SLandon J. Fuller * Copyright (c) 2017 The FreeBSD Foundation 54ad7e9b0SAdrian Chadd * All rights reserved. 64ad7e9b0SAdrian Chadd * 78e35bf83SLandon J. Fuller * This software was developed by Landon Fuller under sponsorship from 88e35bf83SLandon J. Fuller * the FreeBSD Foundation. 98e35bf83SLandon J. Fuller * 104ad7e9b0SAdrian Chadd * Redistribution and use in source and binary forms, with or without 114ad7e9b0SAdrian Chadd * modification, are permitted provided that the following conditions 124ad7e9b0SAdrian Chadd * are met: 134ad7e9b0SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 144ad7e9b0SAdrian Chadd * notice, this list of conditions and the following disclaimer, 154ad7e9b0SAdrian Chadd * without modification. 164ad7e9b0SAdrian Chadd * 2. Redistributions in binary form must reproduce at minimum a disclaimer 174ad7e9b0SAdrian Chadd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 184ad7e9b0SAdrian Chadd * redistribution must be conditioned upon including a substantially 194ad7e9b0SAdrian Chadd * similar Disclaimer requirement for further binary redistribution. 204ad7e9b0SAdrian Chadd * 214ad7e9b0SAdrian Chadd * NO WARRANTY 224ad7e9b0SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 234ad7e9b0SAdrian Chadd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 244ad7e9b0SAdrian Chadd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 254ad7e9b0SAdrian Chadd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 264ad7e9b0SAdrian Chadd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 274ad7e9b0SAdrian Chadd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 284ad7e9b0SAdrian Chadd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 294ad7e9b0SAdrian Chadd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 304ad7e9b0SAdrian Chadd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 314ad7e9b0SAdrian Chadd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 324ad7e9b0SAdrian Chadd * THE POSSIBILITY OF SUCH DAMAGES. 334ad7e9b0SAdrian Chadd */ 344ad7e9b0SAdrian Chadd 354ad7e9b0SAdrian Chadd #include <sys/cdefs.h> 364ad7e9b0SAdrian Chadd __FBSDID("$FreeBSD$"); 374ad7e9b0SAdrian Chadd 384ad7e9b0SAdrian Chadd /* 394ad7e9b0SAdrian Chadd * Broadcom ChipCommon driver. 404ad7e9b0SAdrian Chadd * 414ad7e9b0SAdrian Chadd * With the exception of some very early chipsets, the ChipCommon core 424ad7e9b0SAdrian Chadd * has been included in all HND SoCs and chipsets based on the siba(4) 434ad7e9b0SAdrian Chadd * and bcma(4) interconnects, providing a common interface to chipset 440c91e892SLandon J. Fuller * identification, bus enumeration, UARTs, clocks, watchdog interrupts, 450c91e892SLandon J. Fuller * GPIO, flash, etc. 464ad7e9b0SAdrian Chadd */ 474ad7e9b0SAdrian Chadd 484ad7e9b0SAdrian Chadd #include <sys/param.h> 494ad7e9b0SAdrian Chadd #include <sys/kernel.h> 50f4a3eb02SAdrian Chadd #include <sys/lock.h> 514ad7e9b0SAdrian Chadd #include <sys/bus.h> 52e129bcd6SLandon J. Fuller #include <sys/rman.h> 53f4a3eb02SAdrian Chadd #include <sys/malloc.h> 544ad7e9b0SAdrian Chadd #include <sys/module.h> 55f4a3eb02SAdrian Chadd #include <sys/mutex.h> 564ad7e9b0SAdrian Chadd #include <sys/systm.h> 574ad7e9b0SAdrian Chadd 584ad7e9b0SAdrian Chadd #include <machine/bus.h> 594ad7e9b0SAdrian Chadd #include <machine/resource.h> 604ad7e9b0SAdrian Chadd 614ad7e9b0SAdrian Chadd #include <dev/bhnd/bhnd.h> 62f4a3eb02SAdrian Chadd #include <dev/bhnd/bhndvar.h> 63e83ce340SAdrian Chadd 644ad7e9b0SAdrian Chadd #include "chipcreg.h" 654ad7e9b0SAdrian Chadd #include "chipcvar.h" 660c91e892SLandon J. Fuller 67f4a3eb02SAdrian Chadd #include "chipc_private.h" 684ad7e9b0SAdrian Chadd 694ad7e9b0SAdrian Chadd devclass_t bhnd_chipc_devclass; /**< bhnd(4) chipcommon device class */ 704ad7e9b0SAdrian Chadd 7136e4410aSAdrian Chadd static struct bhnd_device_quirk chipc_quirks[]; 7236e4410aSAdrian Chadd 734ad7e9b0SAdrian Chadd /* Supported device identifiers */ 7436e4410aSAdrian Chadd static const struct bhnd_device chipc_devices[] = { 75b0b9c854SLandon J. Fuller BHND_DEVICE(BCM, CC, NULL, chipc_quirks), 764cb7084eSLandon J. Fuller BHND_DEVICE(BCM, 4706_CC, NULL, chipc_quirks), 7736e4410aSAdrian Chadd BHND_DEVICE_END 784ad7e9b0SAdrian Chadd }; 794ad7e9b0SAdrian Chadd 8036e4410aSAdrian Chadd 814ad7e9b0SAdrian Chadd /* Device quirks table */ 824ad7e9b0SAdrian Chadd static struct bhnd_device_quirk chipc_quirks[] = { 8356a4cdd1SLandon J. Fuller /* HND OTP controller revisions */ 8456a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_EQ (12), CHIPC_QUIRK_OTP_HND), /* (?) */ 8556a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_EQ (17), CHIPC_QUIRK_OTP_HND), /* BCM4311 */ 8656a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_EQ (22), CHIPC_QUIRK_OTP_HND), /* BCM4312 */ 8756a4cdd1SLandon J. Fuller 8856a4cdd1SLandon J. Fuller /* IPX OTP controller revisions */ 8956a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_EQ (21), CHIPC_QUIRK_OTP_IPX), 9056a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_GTE(23), CHIPC_QUIRK_OTP_IPX), 9156a4cdd1SLandon J. Fuller 925ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_GTE(32), CHIPC_QUIRK_SUPPORTS_SPROM), 935ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_GTE(35), CHIPC_QUIRK_SUPPORTS_CAP_EXT), 9456a4cdd1SLandon J. Fuller BHND_CORE_QUIRK (HWREV_GTE(49), CHIPC_QUIRK_IPX_OTPL_SIZE), 955ad9ac03SAdrian Chadd 965ad9ac03SAdrian Chadd /* 4706 variant quirks */ 975ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_EQ (38), CHIPC_QUIRK_4706_NFLASH), /* BCM5357? */ 985ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (4706, HWREV_ANY, CHIPC_QUIRK_4706_NFLASH), 995ad9ac03SAdrian Chadd 1005ad9ac03SAdrian Chadd /* 4331 quirks*/ 1015ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (4331, HWREV_ANY, CHIPC_QUIRK_4331_EXTPA_MUX_SPROM), 1025ad9ac03SAdrian Chadd BHND_PKG_QUIRK (4331, TN, CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM), 1035ad9ac03SAdrian Chadd BHND_PKG_QUIRK (4331, TNA0, CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM), 1045ad9ac03SAdrian Chadd BHND_PKG_QUIRK (4331, TT, CHIPC_QUIRK_4331_EXTPA2_MUX_SPROM), 1055ad9ac03SAdrian Chadd 1065ad9ac03SAdrian Chadd /* 4360 quirks */ 1075ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (4352, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 1085ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (43460, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 1095ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (43462, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 1105ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (43602, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 111f4a3eb02SAdrian Chadd 11236e4410aSAdrian Chadd BHND_DEVICE_QUIRK_END 1134ad7e9b0SAdrian Chadd }; 1144ad7e9b0SAdrian Chadd 1150c91e892SLandon J. Fuller static int chipc_add_children(struct chipc_softc *sc); 116f4a3eb02SAdrian Chadd 11756a4cdd1SLandon J. Fuller static bhnd_nvram_src chipc_find_nvram_src(struct chipc_softc *sc, 11856a4cdd1SLandon J. Fuller struct chipc_caps *caps); 119f4a3eb02SAdrian Chadd static int chipc_read_caps(struct chipc_softc *sc, 120f4a3eb02SAdrian Chadd struct chipc_caps *caps); 121f4a3eb02SAdrian Chadd 122f90f4b65SLandon J. Fuller static bool chipc_should_enable_muxed_sprom( 123f4a3eb02SAdrian Chadd struct chipc_softc *sc); 124f90f4b65SLandon J. Fuller static int chipc_enable_otp_power(struct chipc_softc *sc); 125f90f4b65SLandon J. Fuller static void chipc_disable_otp_power(struct chipc_softc *sc); 126f90f4b65SLandon J. Fuller static int chipc_enable_sprom_pins(struct chipc_softc *sc); 127f90f4b65SLandon J. Fuller static void chipc_disable_sprom_pins(struct chipc_softc *sc); 128f4a3eb02SAdrian Chadd 129f90f4b65SLandon J. Fuller static int chipc_try_activate_resource(struct chipc_softc *sc, 130f90f4b65SLandon J. Fuller device_t child, int type, int rid, 131f90f4b65SLandon J. Fuller struct resource *r, bool req_direct); 1320c91e892SLandon J. Fuller 133f4a3eb02SAdrian Chadd static int chipc_init_rman(struct chipc_softc *sc); 134f4a3eb02SAdrian Chadd static void chipc_free_rman(struct chipc_softc *sc); 135f90f4b65SLandon J. Fuller static struct rman *chipc_get_rman(struct chipc_softc *sc, int type); 136f4a3eb02SAdrian Chadd 1374ad7e9b0SAdrian Chadd /* quirk and capability flag convenience macros */ 1384ad7e9b0SAdrian Chadd #define CHIPC_QUIRK(_sc, _name) \ 1394ad7e9b0SAdrian Chadd ((_sc)->quirks & CHIPC_QUIRK_ ## _name) 1404ad7e9b0SAdrian Chadd 1414ad7e9b0SAdrian Chadd #define CHIPC_CAP(_sc, _name) \ 142f4a3eb02SAdrian Chadd ((_sc)->caps._name) 1434ad7e9b0SAdrian Chadd 1444ad7e9b0SAdrian Chadd #define CHIPC_ASSERT_QUIRK(_sc, name) \ 1454ad7e9b0SAdrian Chadd KASSERT(CHIPC_QUIRK((_sc), name), ("quirk " __STRING(_name) " not set")) 1464ad7e9b0SAdrian Chadd 1474ad7e9b0SAdrian Chadd #define CHIPC_ASSERT_CAP(_sc, name) \ 1484ad7e9b0SAdrian Chadd KASSERT(CHIPC_CAP((_sc), name), ("capability " __STRING(_name) " not set")) 1494ad7e9b0SAdrian Chadd 1504ad7e9b0SAdrian Chadd static int 1514ad7e9b0SAdrian Chadd chipc_probe(device_t dev) 1524ad7e9b0SAdrian Chadd { 15336e4410aSAdrian Chadd const struct bhnd_device *id; 1544ad7e9b0SAdrian Chadd 15536e4410aSAdrian Chadd id = bhnd_device_lookup(dev, chipc_devices, sizeof(chipc_devices[0])); 15636e4410aSAdrian Chadd if (id == NULL) 1574ad7e9b0SAdrian Chadd return (ENXIO); 15836e4410aSAdrian Chadd 15936e4410aSAdrian Chadd bhnd_set_default_core_desc(dev); 16036e4410aSAdrian Chadd return (BUS_PROBE_DEFAULT); 1614ad7e9b0SAdrian Chadd } 1624ad7e9b0SAdrian Chadd 1634ad7e9b0SAdrian Chadd static int 1644ad7e9b0SAdrian Chadd chipc_attach(device_t dev) 1654ad7e9b0SAdrian Chadd { 1664ad7e9b0SAdrian Chadd struct chipc_softc *sc; 1674ad7e9b0SAdrian Chadd int error; 1684ad7e9b0SAdrian Chadd 1694ad7e9b0SAdrian Chadd sc = device_get_softc(dev); 1704ad7e9b0SAdrian Chadd sc->dev = dev; 17136e4410aSAdrian Chadd sc->quirks = bhnd_device_quirks(dev, chipc_devices, 17236e4410aSAdrian Chadd sizeof(chipc_devices[0])); 173f4a3eb02SAdrian Chadd sc->sprom_refcnt = 0; 174e83ce340SAdrian Chadd 175e83ce340SAdrian Chadd CHIPC_LOCK_INIT(sc); 176f4a3eb02SAdrian Chadd STAILQ_INIT(&sc->mem_regions); 1774ad7e9b0SAdrian Chadd 178f4a3eb02SAdrian Chadd /* Set up resource management */ 179f4a3eb02SAdrian Chadd if ((error = chipc_init_rman(sc))) { 180f4a3eb02SAdrian Chadd device_printf(sc->dev, 181f4a3eb02SAdrian Chadd "failed to initialize chipc resource state: %d\n", error); 182f4a3eb02SAdrian Chadd goto failed; 183f4a3eb02SAdrian Chadd } 1844ad7e9b0SAdrian Chadd 1850c91e892SLandon J. Fuller /* Allocate the region containing the chipc register block */ 186f4a3eb02SAdrian Chadd if ((sc->core_region = chipc_find_region_by_rid(sc, 0)) == NULL) { 187f4a3eb02SAdrian Chadd error = ENXIO; 188f4a3eb02SAdrian Chadd goto failed; 189f4a3eb02SAdrian Chadd } 190f4a3eb02SAdrian Chadd 191f4a3eb02SAdrian Chadd error = chipc_retain_region(sc, sc->core_region, 192f4a3eb02SAdrian Chadd RF_ALLOCATED|RF_ACTIVE); 193f4a3eb02SAdrian Chadd if (error) { 194f4a3eb02SAdrian Chadd sc->core_region = NULL; 195f4a3eb02SAdrian Chadd goto failed; 1960c91e892SLandon J. Fuller } 1970c91e892SLandon J. Fuller 1980c91e892SLandon J. Fuller /* Save a direct reference to our chipc registers */ 199f4a3eb02SAdrian Chadd sc->core = sc->core_region->cr_res; 2004ad7e9b0SAdrian Chadd 201f4a3eb02SAdrian Chadd /* Fetch and parse capability register(s) */ 202f4a3eb02SAdrian Chadd if ((error = chipc_read_caps(sc, &sc->caps))) 203f4a3eb02SAdrian Chadd goto failed; 2044ad7e9b0SAdrian Chadd 205f4a3eb02SAdrian Chadd if (bootverbose) 206f4a3eb02SAdrian Chadd chipc_print_caps(sc->dev, &sc->caps); 207f4a3eb02SAdrian Chadd 2080c91e892SLandon J. Fuller /* Attach all supported child devices */ 2090c91e892SLandon J. Fuller if ((error = chipc_add_children(sc))) 2100c91e892SLandon J. Fuller goto failed; 2110c91e892SLandon J. Fuller 212f4a3eb02SAdrian Chadd if ((error = bus_generic_attach(dev))) 213f4a3eb02SAdrian Chadd goto failed; 2144ad7e9b0SAdrian Chadd 2158e35bf83SLandon J. Fuller /* Register ourselves with the bus */ 2168e35bf83SLandon J. Fuller if ((error = bhnd_register_provider(dev, BHND_SERVICE_CHIPC))) 2178e35bf83SLandon J. Fuller goto failed; 2188e35bf83SLandon J. Fuller 2194ad7e9b0SAdrian Chadd return (0); 2204ad7e9b0SAdrian Chadd 221f4a3eb02SAdrian Chadd failed: 2227d1fb1aaSLandon J. Fuller device_delete_children(sc->dev); 2237d1fb1aaSLandon J. Fuller 224f4a3eb02SAdrian Chadd if (sc->core_region != NULL) { 225f4a3eb02SAdrian Chadd chipc_release_region(sc, sc->core_region, 226f4a3eb02SAdrian Chadd RF_ALLOCATED|RF_ACTIVE); 227f4a3eb02SAdrian Chadd } 228f4a3eb02SAdrian Chadd 229f4a3eb02SAdrian Chadd chipc_free_rman(sc); 230e83ce340SAdrian Chadd CHIPC_LOCK_DESTROY(sc); 2314ad7e9b0SAdrian Chadd return (error); 2324ad7e9b0SAdrian Chadd } 2334ad7e9b0SAdrian Chadd 2344ad7e9b0SAdrian Chadd static int 2354ad7e9b0SAdrian Chadd chipc_detach(device_t dev) 2364ad7e9b0SAdrian Chadd { 2374ad7e9b0SAdrian Chadd struct chipc_softc *sc; 238f4a3eb02SAdrian Chadd int error; 2394ad7e9b0SAdrian Chadd 2404ad7e9b0SAdrian Chadd sc = device_get_softc(dev); 241f4a3eb02SAdrian Chadd 2428e35bf83SLandon J. Fuller if ((error = bhnd_deregister_provider(dev, BHND_SERVICE_ANY))) 2438e35bf83SLandon J. Fuller return (error); 2448e35bf83SLandon J. Fuller 245f4a3eb02SAdrian Chadd if ((error = bus_generic_detach(dev))) 246f4a3eb02SAdrian Chadd return (error); 247f4a3eb02SAdrian Chadd 248f4a3eb02SAdrian Chadd chipc_release_region(sc, sc->core_region, RF_ALLOCATED|RF_ACTIVE); 249f4a3eb02SAdrian Chadd chipc_free_rman(sc); 250e83ce340SAdrian Chadd 251e83ce340SAdrian Chadd CHIPC_LOCK_DESTROY(sc); 2524ad7e9b0SAdrian Chadd 2534ad7e9b0SAdrian Chadd return (0); 2544ad7e9b0SAdrian Chadd } 2554ad7e9b0SAdrian Chadd 2560c91e892SLandon J. Fuller static int 2570c91e892SLandon J. Fuller chipc_add_children(struct chipc_softc *sc) 2580c91e892SLandon J. Fuller { 2590c91e892SLandon J. Fuller device_t child; 2600c91e892SLandon J. Fuller const char *flash_bus; 2610c91e892SLandon J. Fuller int error; 2620c91e892SLandon J. Fuller 2630c91e892SLandon J. Fuller /* SPROM/OTP */ 2640c91e892SLandon J. Fuller if (sc->caps.nvram_src == BHND_NVRAM_SRC_SPROM || 2650c91e892SLandon J. Fuller sc->caps.nvram_src == BHND_NVRAM_SRC_OTP) 2660c91e892SLandon J. Fuller { 2670c91e892SLandon J. Fuller child = BUS_ADD_CHILD(sc->dev, 0, "bhnd_nvram", -1); 2680c91e892SLandon J. Fuller if (child == NULL) { 2690c91e892SLandon J. Fuller device_printf(sc->dev, "failed to add nvram device\n"); 2700c91e892SLandon J. Fuller return (ENXIO); 2710c91e892SLandon J. Fuller } 2720c91e892SLandon J. Fuller 2730c91e892SLandon J. Fuller /* Both OTP and external SPROM are mapped at CHIPC_SPROM_OTP */ 274caeff9a3SLandon J. Fuller error = chipc_set_mem_resource(sc, child, 0, CHIPC_SPROM_OTP, 275caeff9a3SLandon J. Fuller CHIPC_SPROM_OTP_SIZE, 0, 0); 276caeff9a3SLandon J. Fuller if (error) { 277caeff9a3SLandon J. Fuller device_printf(sc->dev, "failed to set OTP memory " 278caeff9a3SLandon J. Fuller "resource: %d\n", error); 2790c91e892SLandon J. Fuller return (error); 2800c91e892SLandon J. Fuller } 281caeff9a3SLandon J. Fuller } 2820c91e892SLandon J. Fuller 2830c91e892SLandon J. Fuller /* 284f90f4b65SLandon J. Fuller * PMU/PWR_CTRL 2850c91e892SLandon J. Fuller * 286f90f4b65SLandon J. Fuller * On AOB ("Always on Bus") devices, the PMU core (if it exists) is 287f90f4b65SLandon J. Fuller * attached directly to the bhnd(4) bus -- not chipc. 2880c91e892SLandon J. Fuller */ 289f90f4b65SLandon J. Fuller if (sc->caps.pwr_ctrl || (sc->caps.pmu && !sc->caps.aob)) { 2900c91e892SLandon J. Fuller child = BUS_ADD_CHILD(sc->dev, 0, "bhnd_pmu", -1); 2910c91e892SLandon J. Fuller if (child == NULL) { 2920c91e892SLandon J. Fuller device_printf(sc->dev, "failed to add pmu\n"); 2930c91e892SLandon J. Fuller return (ENXIO); 2940c91e892SLandon J. Fuller } 2950c91e892SLandon J. Fuller } 2960c91e892SLandon J. Fuller 2970c91e892SLandon J. Fuller /* All remaining devices are SoC-only */ 2980c91e892SLandon J. Fuller if (bhnd_get_attach_type(sc->dev) != BHND_ATTACH_NATIVE) 2990c91e892SLandon J. Fuller return (0); 3000c91e892SLandon J. Fuller 3010c91e892SLandon J. Fuller /* UARTs */ 3020c91e892SLandon J. Fuller for (u_int i = 0; i < min(sc->caps.num_uarts, CHIPC_UART_MAX); i++) { 303caeff9a3SLandon J. Fuller int irq_rid, mem_rid; 304caeff9a3SLandon J. Fuller 305caeff9a3SLandon J. Fuller irq_rid = 0; 306caeff9a3SLandon J. Fuller mem_rid = 0; 307caeff9a3SLandon J. Fuller 3080c91e892SLandon J. Fuller child = BUS_ADD_CHILD(sc->dev, 0, "uart", -1); 3090c91e892SLandon J. Fuller if (child == NULL) { 3100c91e892SLandon J. Fuller device_printf(sc->dev, "failed to add uart%u\n", i); 3110c91e892SLandon J. Fuller return (ENXIO); 3120c91e892SLandon J. Fuller } 3130c91e892SLandon J. Fuller 3140c91e892SLandon J. Fuller /* Shared IRQ */ 315caeff9a3SLandon J. Fuller error = chipc_set_irq_resource(sc, child, irq_rid, 0); 3160c91e892SLandon J. Fuller if (error) { 3170c91e892SLandon J. Fuller device_printf(sc->dev, "failed to set uart%u irq %u\n", 318caeff9a3SLandon J. Fuller i, 0); 3190c91e892SLandon J. Fuller return (error); 3200c91e892SLandon J. Fuller } 3210c91e892SLandon J. Fuller 3220c91e892SLandon J. Fuller /* UART registers are mapped sequentially */ 323caeff9a3SLandon J. Fuller error = chipc_set_mem_resource(sc, child, mem_rid, 3240c91e892SLandon J. Fuller CHIPC_UART(i), CHIPC_UART_SIZE, 0, 0); 325caeff9a3SLandon J. Fuller if (error) { 326caeff9a3SLandon J. Fuller device_printf(sc->dev, "failed to set uart%u memory " 327caeff9a3SLandon J. Fuller "resource: %d\n", i, error); 3280c91e892SLandon J. Fuller return (error); 3290c91e892SLandon J. Fuller } 330caeff9a3SLandon J. Fuller } 3310c91e892SLandon J. Fuller 3320c91e892SLandon J. Fuller /* Flash */ 3330c91e892SLandon J. Fuller flash_bus = chipc_flash_bus_name(sc->caps.flash_type); 3340c91e892SLandon J. Fuller if (flash_bus != NULL) { 335caeff9a3SLandon J. Fuller int rid; 336caeff9a3SLandon J. Fuller 3370c91e892SLandon J. Fuller child = BUS_ADD_CHILD(sc->dev, 0, flash_bus, -1); 3380c91e892SLandon J. Fuller if (child == NULL) { 3390c91e892SLandon J. Fuller device_printf(sc->dev, "failed to add %s device\n", 3400c91e892SLandon J. Fuller flash_bus); 3410c91e892SLandon J. Fuller return (ENXIO); 3420c91e892SLandon J. Fuller } 3430c91e892SLandon J. Fuller 3440c91e892SLandon J. Fuller /* flash memory mapping */ 345caeff9a3SLandon J. Fuller rid = 0; 346caeff9a3SLandon J. Fuller error = chipc_set_mem_resource(sc, child, rid, 0, RM_MAX_END, 1, 347caeff9a3SLandon J. Fuller 1); 348caeff9a3SLandon J. Fuller if (error) { 349caeff9a3SLandon J. Fuller device_printf(sc->dev, "failed to set flash memory " 350caeff9a3SLandon J. Fuller "resource %d: %d\n", rid, error); 3510c91e892SLandon J. Fuller return (error); 352caeff9a3SLandon J. Fuller } 3530c91e892SLandon J. Fuller 3540c91e892SLandon J. Fuller /* flashctrl registers */ 355caeff9a3SLandon J. Fuller rid++; 356caeff9a3SLandon J. Fuller error = chipc_set_mem_resource(sc, child, rid, 3570c91e892SLandon J. Fuller CHIPC_SFLASH_BASE, CHIPC_SFLASH_SIZE, 0, 0); 358caeff9a3SLandon J. Fuller if (error) { 359caeff9a3SLandon J. Fuller device_printf(sc->dev, "failed to set flash memory " 360caeff9a3SLandon J. Fuller "resource %d: %d\n", rid, error); 3610c91e892SLandon J. Fuller return (error); 3620c91e892SLandon J. Fuller } 363caeff9a3SLandon J. Fuller } 3640c91e892SLandon J. Fuller 3650c91e892SLandon J. Fuller return (0); 3660c91e892SLandon J. Fuller } 3670c91e892SLandon J. Fuller 36856a4cdd1SLandon J. Fuller /** 36956a4cdd1SLandon J. Fuller * Determine the NVRAM data source for this device. 37056a4cdd1SLandon J. Fuller * 37156a4cdd1SLandon J. Fuller * The SPROM, OTP, and flash capability flags must be fully populated in 37256a4cdd1SLandon J. Fuller * @p caps. 37356a4cdd1SLandon J. Fuller * 37456a4cdd1SLandon J. Fuller * @param sc chipc driver state. 37556a4cdd1SLandon J. Fuller * @param caps capability flags to be used to derive NVRAM configuration. 37656a4cdd1SLandon J. Fuller */ 37756a4cdd1SLandon J. Fuller static bhnd_nvram_src 37856a4cdd1SLandon J. Fuller chipc_find_nvram_src(struct chipc_softc *sc, struct chipc_caps *caps) 37956a4cdd1SLandon J. Fuller { 38056a4cdd1SLandon J. Fuller uint32_t otp_st, srom_ctrl; 38156a4cdd1SLandon J. Fuller 38256a4cdd1SLandon J. Fuller /* 38356a4cdd1SLandon J. Fuller * We check for hardware presence in order of precedence. For example, 38456a4cdd1SLandon J. Fuller * SPROM is is always used in preference to internal OTP if found. 38556a4cdd1SLandon J. Fuller */ 3861728aef2SLandon J. Fuller if (CHIPC_QUIRK(sc, SUPPORTS_SPROM) && caps->sprom) { 38756a4cdd1SLandon J. Fuller srom_ctrl = bhnd_bus_read_4(sc->core, CHIPC_SPROM_CTRL); 38856a4cdd1SLandon J. Fuller if (srom_ctrl & CHIPC_SRC_PRESENT) 38956a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_SPROM); 39056a4cdd1SLandon J. Fuller } 39156a4cdd1SLandon J. Fuller 39256a4cdd1SLandon J. Fuller /* Check for programmed OTP H/W subregion (contains SROM data) */ 39356a4cdd1SLandon J. Fuller if (CHIPC_QUIRK(sc, SUPPORTS_OTP) && caps->otp_size > 0) { 39456a4cdd1SLandon J. Fuller /* TODO: need access to HND-OTP device */ 39556a4cdd1SLandon J. Fuller if (!CHIPC_QUIRK(sc, OTP_HND)) { 39656a4cdd1SLandon J. Fuller device_printf(sc->dev, 39756a4cdd1SLandon J. Fuller "NVRAM unavailable: unsupported OTP controller.\n"); 39856a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_UNKNOWN); 39956a4cdd1SLandon J. Fuller } 40056a4cdd1SLandon J. Fuller 40156a4cdd1SLandon J. Fuller otp_st = bhnd_bus_read_4(sc->core, CHIPC_OTPST); 40256a4cdd1SLandon J. Fuller if (otp_st & CHIPC_OTPS_GUP_HW) 40356a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_OTP); 40456a4cdd1SLandon J. Fuller } 40556a4cdd1SLandon J. Fuller 40656a4cdd1SLandon J. Fuller /* Check for flash */ 40756a4cdd1SLandon J. Fuller if (caps->flash_type != CHIPC_FLASH_NONE) 40856a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_FLASH); 40956a4cdd1SLandon J. Fuller 41056a4cdd1SLandon J. Fuller /* No NVRAM hardware capability declared */ 41156a4cdd1SLandon J. Fuller return (BHND_NVRAM_SRC_UNKNOWN); 41256a4cdd1SLandon J. Fuller } 41356a4cdd1SLandon J. Fuller 414f4a3eb02SAdrian Chadd /* Read and parse chipc capabilities */ 4154ad7e9b0SAdrian Chadd static int 416f4a3eb02SAdrian Chadd chipc_read_caps(struct chipc_softc *sc, struct chipc_caps *caps) 4174ad7e9b0SAdrian Chadd { 418f4a3eb02SAdrian Chadd uint32_t cap_reg; 419f4a3eb02SAdrian Chadd uint32_t cap_ext_reg; 420f4a3eb02SAdrian Chadd uint32_t regval; 421f4a3eb02SAdrian Chadd 422f4a3eb02SAdrian Chadd /* Fetch cap registers */ 423f4a3eb02SAdrian Chadd cap_reg = bhnd_bus_read_4(sc->core, CHIPC_CAPABILITIES); 424f4a3eb02SAdrian Chadd cap_ext_reg = 0; 425f4a3eb02SAdrian Chadd if (CHIPC_QUIRK(sc, SUPPORTS_CAP_EXT)) 426f4a3eb02SAdrian Chadd cap_ext_reg = bhnd_bus_read_4(sc->core, CHIPC_CAPABILITIES_EXT); 427f4a3eb02SAdrian Chadd 428f4a3eb02SAdrian Chadd /* Extract values */ 429f4a3eb02SAdrian Chadd caps->num_uarts = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_NUM_UART); 430f4a3eb02SAdrian Chadd caps->mipseb = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_MIPSEB); 431f4a3eb02SAdrian Chadd caps->uart_gpio = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_UARTGPIO); 432f4a3eb02SAdrian Chadd caps->uart_clock = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_UCLKSEL); 433f4a3eb02SAdrian Chadd 434f4a3eb02SAdrian Chadd caps->extbus_type = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_EXTBUS); 435f90f4b65SLandon J. Fuller caps->pwr_ctrl = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_PWR_CTL); 436f4a3eb02SAdrian Chadd caps->jtag_master = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_JTAGP); 437f4a3eb02SAdrian Chadd 438f4a3eb02SAdrian Chadd caps->pll_type = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_PLL); 439f4a3eb02SAdrian Chadd caps->backplane_64 = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_BKPLN64); 440f4a3eb02SAdrian Chadd caps->boot_rom = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_ROM); 441f4a3eb02SAdrian Chadd caps->pmu = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_PMU); 442f4a3eb02SAdrian Chadd caps->eci = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_ECI); 443f4a3eb02SAdrian Chadd caps->sprom = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_SPROM); 444f4a3eb02SAdrian Chadd caps->otp_size = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_OTP_SIZE); 445f4a3eb02SAdrian Chadd 446f4a3eb02SAdrian Chadd caps->seci = CHIPC_GET_FLAG(cap_ext_reg, CHIPC_CAP2_SECI); 447f4a3eb02SAdrian Chadd caps->gsio = CHIPC_GET_FLAG(cap_ext_reg, CHIPC_CAP2_GSIO); 448f4a3eb02SAdrian Chadd caps->aob = CHIPC_GET_FLAG(cap_ext_reg, CHIPC_CAP2_AOB); 449f4a3eb02SAdrian Chadd 450f4a3eb02SAdrian Chadd /* Fetch OTP size for later IPX controller revisions */ 45156a4cdd1SLandon J. Fuller if (CHIPC_QUIRK(sc, IPX_OTPL_SIZE)) { 452f4a3eb02SAdrian Chadd regval = bhnd_bus_read_4(sc->core, CHIPC_OTPLAYOUT); 453f4a3eb02SAdrian Chadd caps->otp_size = CHIPC_GET_BITS(regval, CHIPC_OTPL_SIZE); 4544ad7e9b0SAdrian Chadd } 4554ad7e9b0SAdrian Chadd 4565ad9ac03SAdrian Chadd /* Determine flash type and parameters */ 457f4a3eb02SAdrian Chadd caps->cfi_width = 0; 458f4a3eb02SAdrian Chadd switch (CHIPC_GET_BITS(cap_reg, CHIPC_CAP_FLASH)) { 459f4a3eb02SAdrian Chadd case CHIPC_CAP_SFLASH_ST: 460f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_SFLASH_ST; 461f4a3eb02SAdrian Chadd break; 462f4a3eb02SAdrian Chadd case CHIPC_CAP_SFLASH_AT: 463f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_SFLASH_AT; 464f4a3eb02SAdrian Chadd break; 465f4a3eb02SAdrian Chadd case CHIPC_CAP_NFLASH: 4660c91e892SLandon J. Fuller /* unimplemented */ 467f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_NFLASH; 468f4a3eb02SAdrian Chadd break; 469f4a3eb02SAdrian Chadd case CHIPC_CAP_PFLASH: 470f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_PFLASH_CFI; 471f4a3eb02SAdrian Chadd 472f4a3eb02SAdrian Chadd /* determine cfi width */ 473f4a3eb02SAdrian Chadd regval = bhnd_bus_read_4(sc->core, CHIPC_FLASH_CFG); 474f4a3eb02SAdrian Chadd if (CHIPC_GET_FLAG(regval, CHIPC_FLASH_CFG_DS)) 475f4a3eb02SAdrian Chadd caps->cfi_width = 2; 476f4a3eb02SAdrian Chadd else 477f4a3eb02SAdrian Chadd caps->cfi_width = 1; 478f4a3eb02SAdrian Chadd 479f4a3eb02SAdrian Chadd break; 480f4a3eb02SAdrian Chadd case CHIPC_CAP_FLASH_NONE: 481f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_FLASH_NONE; 482f4a3eb02SAdrian Chadd break; 483f4a3eb02SAdrian Chadd 484f4a3eb02SAdrian Chadd } 485f4a3eb02SAdrian Chadd 486f4a3eb02SAdrian Chadd /* Handle 4706_NFLASH fallback */ 487f4a3eb02SAdrian Chadd if (CHIPC_QUIRK(sc, 4706_NFLASH) && 488f4a3eb02SAdrian Chadd CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_4706_NFLASH)) 4894ad7e9b0SAdrian Chadd { 490f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_NFLASH_4706; 491f4a3eb02SAdrian Chadd } 492f4a3eb02SAdrian Chadd 49356a4cdd1SLandon J. Fuller 49456a4cdd1SLandon J. Fuller /* Determine NVRAM source. Must occur after the SPROM/OTP/flash 49556a4cdd1SLandon J. Fuller * capability flags have been populated. */ 49656a4cdd1SLandon J. Fuller caps->nvram_src = chipc_find_nvram_src(sc, caps); 49756a4cdd1SLandon J. Fuller 49856a4cdd1SLandon J. Fuller /* Determine the SPROM offset within OTP (if any). SPROM-formatted 49956a4cdd1SLandon J. Fuller * data is placed within the OTP general use region. */ 50056a4cdd1SLandon J. Fuller caps->sprom_offset = 0; 50156a4cdd1SLandon J. Fuller if (caps->nvram_src == BHND_NVRAM_SRC_OTP) { 50256a4cdd1SLandon J. Fuller CHIPC_ASSERT_QUIRK(sc, OTP_IPX); 50356a4cdd1SLandon J. Fuller 50456a4cdd1SLandon J. Fuller /* Bit offset to GUP HW subregion containing SPROM data */ 50556a4cdd1SLandon J. Fuller regval = bhnd_bus_read_4(sc->core, CHIPC_OTPLAYOUT); 50656a4cdd1SLandon J. Fuller caps->sprom_offset = CHIPC_GET_BITS(regval, CHIPC_OTPL_GUP); 50756a4cdd1SLandon J. Fuller 50856a4cdd1SLandon J. Fuller /* Convert to bytes */ 50956a4cdd1SLandon J. Fuller caps->sprom_offset /= 8; 51056a4cdd1SLandon J. Fuller } 51156a4cdd1SLandon J. Fuller 5124ad7e9b0SAdrian Chadd return (0); 5134ad7e9b0SAdrian Chadd } 5144ad7e9b0SAdrian Chadd 515f4a3eb02SAdrian Chadd static int 516f4a3eb02SAdrian Chadd chipc_suspend(device_t dev) 517f4a3eb02SAdrian Chadd { 518f4a3eb02SAdrian Chadd return (bus_generic_suspend(dev)); 519f4a3eb02SAdrian Chadd } 520f4a3eb02SAdrian Chadd 521f4a3eb02SAdrian Chadd static int 522f4a3eb02SAdrian Chadd chipc_resume(device_t dev) 523f4a3eb02SAdrian Chadd { 524f4a3eb02SAdrian Chadd return (bus_generic_resume(dev)); 525f4a3eb02SAdrian Chadd } 526f4a3eb02SAdrian Chadd 527f4a3eb02SAdrian Chadd static void 528f4a3eb02SAdrian Chadd chipc_probe_nomatch(device_t dev, device_t child) 529f4a3eb02SAdrian Chadd { 530f4a3eb02SAdrian Chadd struct resource_list *rl; 531f4a3eb02SAdrian Chadd const char *name; 532f4a3eb02SAdrian Chadd 533f4a3eb02SAdrian Chadd name = device_get_name(child); 534f4a3eb02SAdrian Chadd if (name == NULL) 535f4a3eb02SAdrian Chadd name = "unknown device"; 536f4a3eb02SAdrian Chadd 537f4a3eb02SAdrian Chadd device_printf(dev, "<%s> at", name); 538f4a3eb02SAdrian Chadd 539f4a3eb02SAdrian Chadd rl = BUS_GET_RESOURCE_LIST(dev, child); 540f4a3eb02SAdrian Chadd if (rl != NULL) { 541f4a3eb02SAdrian Chadd resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); 542f4a3eb02SAdrian Chadd resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); 543f4a3eb02SAdrian Chadd } 544f4a3eb02SAdrian Chadd 545f4a3eb02SAdrian Chadd printf(" (no driver attached)\n"); 546f4a3eb02SAdrian Chadd } 547f4a3eb02SAdrian Chadd 548f4a3eb02SAdrian Chadd static int 549f4a3eb02SAdrian Chadd chipc_print_child(device_t dev, device_t child) 550f4a3eb02SAdrian Chadd { 551f4a3eb02SAdrian Chadd struct resource_list *rl; 552f4a3eb02SAdrian Chadd int retval = 0; 553f4a3eb02SAdrian Chadd 554f4a3eb02SAdrian Chadd retval += bus_print_child_header(dev, child); 555f4a3eb02SAdrian Chadd 556f4a3eb02SAdrian Chadd rl = BUS_GET_RESOURCE_LIST(dev, child); 557f4a3eb02SAdrian Chadd if (rl != NULL) { 558f4a3eb02SAdrian Chadd retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, 559f4a3eb02SAdrian Chadd "%#jx"); 560f4a3eb02SAdrian Chadd retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, 561f4a3eb02SAdrian Chadd "%jd"); 562f4a3eb02SAdrian Chadd } 563f4a3eb02SAdrian Chadd 564f4a3eb02SAdrian Chadd retval += bus_print_child_domain(dev, child); 565f4a3eb02SAdrian Chadd retval += bus_print_child_footer(dev, child); 566f4a3eb02SAdrian Chadd 567f4a3eb02SAdrian Chadd return (retval); 568f4a3eb02SAdrian Chadd } 569f4a3eb02SAdrian Chadd 570f4a3eb02SAdrian Chadd static int 571f4a3eb02SAdrian Chadd chipc_child_pnpinfo_str(device_t dev, device_t child, char *buf, 572f4a3eb02SAdrian Chadd size_t buflen) 573f4a3eb02SAdrian Chadd { 574f4a3eb02SAdrian Chadd if (buflen == 0) 575f4a3eb02SAdrian Chadd return (EOVERFLOW); 576f4a3eb02SAdrian Chadd 577f4a3eb02SAdrian Chadd *buf = '\0'; 578f4a3eb02SAdrian Chadd return (0); 579f4a3eb02SAdrian Chadd } 580f4a3eb02SAdrian Chadd 581f4a3eb02SAdrian Chadd static int 582f4a3eb02SAdrian Chadd chipc_child_location_str(device_t dev, device_t child, char *buf, 583f4a3eb02SAdrian Chadd size_t buflen) 584f4a3eb02SAdrian Chadd { 585f4a3eb02SAdrian Chadd if (buflen == 0) 586f4a3eb02SAdrian Chadd return (EOVERFLOW); 587f4a3eb02SAdrian Chadd 588f4a3eb02SAdrian Chadd *buf = '\0'; 589f4a3eb02SAdrian Chadd return (ENXIO); 590f4a3eb02SAdrian Chadd } 591f4a3eb02SAdrian Chadd 592f4a3eb02SAdrian Chadd static device_t 593f4a3eb02SAdrian Chadd chipc_add_child(device_t dev, u_int order, const char *name, int unit) 594f4a3eb02SAdrian Chadd { 5950c91e892SLandon J. Fuller struct chipc_softc *sc; 596f4a3eb02SAdrian Chadd struct chipc_devinfo *dinfo; 597f4a3eb02SAdrian Chadd device_t child; 5980c91e892SLandon J. Fuller 5990c91e892SLandon J. Fuller sc = device_get_softc(dev); 600f4a3eb02SAdrian Chadd 601f4a3eb02SAdrian Chadd child = device_add_child_ordered(dev, order, name, unit); 602f4a3eb02SAdrian Chadd if (child == NULL) 603f4a3eb02SAdrian Chadd return (NULL); 604f4a3eb02SAdrian Chadd 605f4a3eb02SAdrian Chadd dinfo = malloc(sizeof(struct chipc_devinfo), M_BHND, M_NOWAIT); 606f4a3eb02SAdrian Chadd if (dinfo == NULL) { 607f4a3eb02SAdrian Chadd device_delete_child(dev, child); 608f4a3eb02SAdrian Chadd return (NULL); 609f4a3eb02SAdrian Chadd } 610f4a3eb02SAdrian Chadd 611f4a3eb02SAdrian Chadd resource_list_init(&dinfo->resources); 612caeff9a3SLandon J. Fuller dinfo->irq_mapped = false; 613f4a3eb02SAdrian Chadd device_set_ivars(child, dinfo); 614f4a3eb02SAdrian Chadd 615f4a3eb02SAdrian Chadd return (child); 616f4a3eb02SAdrian Chadd } 617f4a3eb02SAdrian Chadd 618f4a3eb02SAdrian Chadd static void 619f4a3eb02SAdrian Chadd chipc_child_deleted(device_t dev, device_t child) 620f4a3eb02SAdrian Chadd { 621f4a3eb02SAdrian Chadd struct chipc_devinfo *dinfo = device_get_ivars(child); 622f4a3eb02SAdrian Chadd 623f4a3eb02SAdrian Chadd if (dinfo != NULL) { 624caeff9a3SLandon J. Fuller /* Free the child's resource list */ 625f4a3eb02SAdrian Chadd resource_list_free(&dinfo->resources); 626caeff9a3SLandon J. Fuller 627caeff9a3SLandon J. Fuller /* Unmap the child's IRQ */ 628caeff9a3SLandon J. Fuller if (dinfo->irq_mapped) { 629caeff9a3SLandon J. Fuller bhnd_unmap_intr(dev, dinfo->irq); 630caeff9a3SLandon J. Fuller dinfo->irq_mapped = false; 631caeff9a3SLandon J. Fuller } 632caeff9a3SLandon J. Fuller 633f4a3eb02SAdrian Chadd free(dinfo, M_BHND); 634f4a3eb02SAdrian Chadd } 635f4a3eb02SAdrian Chadd 636f4a3eb02SAdrian Chadd device_set_ivars(child, NULL); 637f4a3eb02SAdrian Chadd } 638f4a3eb02SAdrian Chadd 639f4a3eb02SAdrian Chadd static struct resource_list * 640f4a3eb02SAdrian Chadd chipc_get_resource_list(device_t dev, device_t child) 641f4a3eb02SAdrian Chadd { 642f4a3eb02SAdrian Chadd struct chipc_devinfo *dinfo = device_get_ivars(child); 643f4a3eb02SAdrian Chadd return (&dinfo->resources); 644f4a3eb02SAdrian Chadd } 645f4a3eb02SAdrian Chadd 646f4a3eb02SAdrian Chadd 647f4a3eb02SAdrian Chadd /* Allocate region records for the given port, and add the port's memory 648f4a3eb02SAdrian Chadd * range to the mem_rman */ 649f4a3eb02SAdrian Chadd static int 650f4a3eb02SAdrian Chadd chipc_rman_init_regions (struct chipc_softc *sc, bhnd_port_type type, 651f4a3eb02SAdrian Chadd u_int port) 652f4a3eb02SAdrian Chadd { 653f4a3eb02SAdrian Chadd struct chipc_region *cr; 654f4a3eb02SAdrian Chadd rman_res_t start, end; 655f4a3eb02SAdrian Chadd u_int num_regions; 656f4a3eb02SAdrian Chadd int error; 657f4a3eb02SAdrian Chadd 6580c91e892SLandon J. Fuller num_regions = bhnd_get_region_count(sc->dev, type, port); 659f4a3eb02SAdrian Chadd for (u_int region = 0; region < num_regions; region++) { 660f4a3eb02SAdrian Chadd /* Allocate new region record */ 661f4a3eb02SAdrian Chadd cr = chipc_alloc_region(sc, type, port, region); 662f4a3eb02SAdrian Chadd if (cr == NULL) 663f4a3eb02SAdrian Chadd return (ENODEV); 664f4a3eb02SAdrian Chadd 665f4a3eb02SAdrian Chadd /* Can't manage regions that cannot be allocated */ 666f4a3eb02SAdrian Chadd if (cr->cr_rid < 0) { 667f4a3eb02SAdrian Chadd BHND_DEBUG_DEV(sc->dev, "no rid for chipc region " 668f4a3eb02SAdrian Chadd "%s%u.%u", bhnd_port_type_name(type), port, region); 669f4a3eb02SAdrian Chadd chipc_free_region(sc, cr); 670f4a3eb02SAdrian Chadd continue; 671f4a3eb02SAdrian Chadd } 672f4a3eb02SAdrian Chadd 673f4a3eb02SAdrian Chadd /* Add to rman's managed range */ 674f4a3eb02SAdrian Chadd start = cr->cr_addr; 675f4a3eb02SAdrian Chadd end = cr->cr_end; 676f4a3eb02SAdrian Chadd if ((error = rman_manage_region(&sc->mem_rman, start, end))) { 677f4a3eb02SAdrian Chadd chipc_free_region(sc, cr); 678f4a3eb02SAdrian Chadd return (error); 679f4a3eb02SAdrian Chadd } 680f4a3eb02SAdrian Chadd 681f4a3eb02SAdrian Chadd /* Add to region list */ 682f4a3eb02SAdrian Chadd STAILQ_INSERT_TAIL(&sc->mem_regions, cr, cr_link); 683f4a3eb02SAdrian Chadd } 684f4a3eb02SAdrian Chadd 685f4a3eb02SAdrian Chadd return (0); 686f4a3eb02SAdrian Chadd } 687f4a3eb02SAdrian Chadd 688f4a3eb02SAdrian Chadd /* Initialize memory state for all chipc port regions */ 689f4a3eb02SAdrian Chadd static int 690f4a3eb02SAdrian Chadd chipc_init_rman(struct chipc_softc *sc) 691f4a3eb02SAdrian Chadd { 692f4a3eb02SAdrian Chadd u_int num_ports; 693f4a3eb02SAdrian Chadd int error; 694f4a3eb02SAdrian Chadd 695f4a3eb02SAdrian Chadd /* Port types for which we'll register chipc_region mappings */ 696f4a3eb02SAdrian Chadd bhnd_port_type types[] = { 697f4a3eb02SAdrian Chadd BHND_PORT_DEVICE 698f4a3eb02SAdrian Chadd }; 699f4a3eb02SAdrian Chadd 700f4a3eb02SAdrian Chadd /* Initialize resource manager */ 701f4a3eb02SAdrian Chadd sc->mem_rman.rm_start = 0; 702f4a3eb02SAdrian Chadd sc->mem_rman.rm_end = BUS_SPACE_MAXADDR; 703f4a3eb02SAdrian Chadd sc->mem_rman.rm_type = RMAN_ARRAY; 704f4a3eb02SAdrian Chadd sc->mem_rman.rm_descr = "ChipCommon Device Memory"; 705f4a3eb02SAdrian Chadd if ((error = rman_init(&sc->mem_rman))) { 706f4a3eb02SAdrian Chadd device_printf(sc->dev, "could not initialize mem_rman: %d\n", 707f4a3eb02SAdrian Chadd error); 708f4a3eb02SAdrian Chadd return (error); 709f4a3eb02SAdrian Chadd } 710f4a3eb02SAdrian Chadd 711f4a3eb02SAdrian Chadd /* Populate per-port-region state */ 712f4a3eb02SAdrian Chadd for (u_int i = 0; i < nitems(types); i++) { 713f4a3eb02SAdrian Chadd num_ports = bhnd_get_port_count(sc->dev, types[i]); 714f4a3eb02SAdrian Chadd for (u_int port = 0; port < num_ports; port++) { 715f4a3eb02SAdrian Chadd error = chipc_rman_init_regions(sc, types[i], port); 716f4a3eb02SAdrian Chadd if (error) { 717f4a3eb02SAdrian Chadd device_printf(sc->dev, 718f4a3eb02SAdrian Chadd "region init failed for %s%u: %d\n", 719f4a3eb02SAdrian Chadd bhnd_port_type_name(types[i]), port, 720f4a3eb02SAdrian Chadd error); 721f4a3eb02SAdrian Chadd 722f4a3eb02SAdrian Chadd goto failed; 723f4a3eb02SAdrian Chadd } 724f4a3eb02SAdrian Chadd } 725f4a3eb02SAdrian Chadd } 726f4a3eb02SAdrian Chadd 727f4a3eb02SAdrian Chadd return (0); 728f4a3eb02SAdrian Chadd 729f4a3eb02SAdrian Chadd failed: 730f4a3eb02SAdrian Chadd chipc_free_rman(sc); 731f4a3eb02SAdrian Chadd return (error); 732f4a3eb02SAdrian Chadd } 733f4a3eb02SAdrian Chadd 734f4a3eb02SAdrian Chadd /* Free memory management state */ 735f4a3eb02SAdrian Chadd static void 736f4a3eb02SAdrian Chadd chipc_free_rman(struct chipc_softc *sc) 737f4a3eb02SAdrian Chadd { 738f4a3eb02SAdrian Chadd struct chipc_region *cr, *cr_next; 739f4a3eb02SAdrian Chadd 740f4a3eb02SAdrian Chadd STAILQ_FOREACH_SAFE(cr, &sc->mem_regions, cr_link, cr_next) 741f4a3eb02SAdrian Chadd chipc_free_region(sc, cr); 742f4a3eb02SAdrian Chadd 743f4a3eb02SAdrian Chadd rman_fini(&sc->mem_rman); 744f4a3eb02SAdrian Chadd } 745f4a3eb02SAdrian Chadd 746f4a3eb02SAdrian Chadd /** 747f4a3eb02SAdrian Chadd * Return the rman instance for a given resource @p type, if any. 748f4a3eb02SAdrian Chadd * 749f4a3eb02SAdrian Chadd * @param sc The chipc device state. 750f4a3eb02SAdrian Chadd * @param type The resource type (e.g. SYS_RES_MEMORY, SYS_RES_IRQ, ...) 751f4a3eb02SAdrian Chadd */ 752f4a3eb02SAdrian Chadd static struct rman * 753f4a3eb02SAdrian Chadd chipc_get_rman(struct chipc_softc *sc, int type) 754f4a3eb02SAdrian Chadd { 755f4a3eb02SAdrian Chadd switch (type) { 756f4a3eb02SAdrian Chadd case SYS_RES_MEMORY: 757f4a3eb02SAdrian Chadd return (&sc->mem_rman); 758f4a3eb02SAdrian Chadd 759f4a3eb02SAdrian Chadd case SYS_RES_IRQ: 760caeff9a3SLandon J. Fuller /* We delegate IRQ resource management to the parent bus */ 761f4a3eb02SAdrian Chadd return (NULL); 762f4a3eb02SAdrian Chadd 763f4a3eb02SAdrian Chadd default: 764f4a3eb02SAdrian Chadd return (NULL); 765f4a3eb02SAdrian Chadd }; 766f4a3eb02SAdrian Chadd } 767f4a3eb02SAdrian Chadd 768f4a3eb02SAdrian Chadd static struct resource * 769f4a3eb02SAdrian Chadd chipc_alloc_resource(device_t dev, device_t child, int type, 770f4a3eb02SAdrian Chadd int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 771f4a3eb02SAdrian Chadd { 772f4a3eb02SAdrian Chadd struct chipc_softc *sc; 773f4a3eb02SAdrian Chadd struct chipc_region *cr; 774f4a3eb02SAdrian Chadd struct resource_list_entry *rle; 775f4a3eb02SAdrian Chadd struct resource *rv; 776f4a3eb02SAdrian Chadd struct rman *rm; 777f4a3eb02SAdrian Chadd int error; 778f4a3eb02SAdrian Chadd bool passthrough, isdefault; 779f4a3eb02SAdrian Chadd 780f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 781f4a3eb02SAdrian Chadd passthrough = (device_get_parent(child) != dev); 782f4a3eb02SAdrian Chadd isdefault = RMAN_IS_DEFAULT_RANGE(start, end); 783f4a3eb02SAdrian Chadd rle = NULL; 784f4a3eb02SAdrian Chadd 785f4a3eb02SAdrian Chadd /* Fetch the resource manager, delegate request if necessary */ 786f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 787f4a3eb02SAdrian Chadd if (rm == NULL) { 788f4a3eb02SAdrian Chadd /* Requested resource type is delegated to our parent */ 789f4a3eb02SAdrian Chadd rv = bus_generic_rl_alloc_resource(dev, child, type, rid, 790f4a3eb02SAdrian Chadd start, end, count, flags); 791f4a3eb02SAdrian Chadd return (rv); 792f4a3eb02SAdrian Chadd } 793f4a3eb02SAdrian Chadd 794f4a3eb02SAdrian Chadd /* Populate defaults */ 795f4a3eb02SAdrian Chadd if (!passthrough && isdefault) { 796f4a3eb02SAdrian Chadd /* Fetch the resource list entry. */ 797f4a3eb02SAdrian Chadd rle = resource_list_find(BUS_GET_RESOURCE_LIST(dev, child), 798f4a3eb02SAdrian Chadd type, *rid); 799f4a3eb02SAdrian Chadd if (rle == NULL) { 800f4a3eb02SAdrian Chadd device_printf(dev, 801f4a3eb02SAdrian Chadd "default resource %#x type %d for child %s " 802f4a3eb02SAdrian Chadd "not found\n", *rid, type, 803f4a3eb02SAdrian Chadd device_get_nameunit(child)); 804f4a3eb02SAdrian Chadd return (NULL); 805f4a3eb02SAdrian Chadd } 806f4a3eb02SAdrian Chadd 807f4a3eb02SAdrian Chadd if (rle->res != NULL) { 808f4a3eb02SAdrian Chadd device_printf(dev, 8092b693a88SLandon J. Fuller "resource entry %#x type %d for child %s is busy " 8102b693a88SLandon J. Fuller "[%d]\n", 8112b693a88SLandon J. Fuller *rid, type, device_get_nameunit(child), 8122b693a88SLandon J. Fuller rman_get_flags(rle->res)); 813f4a3eb02SAdrian Chadd 814f4a3eb02SAdrian Chadd return (NULL); 815f4a3eb02SAdrian Chadd } 816f4a3eb02SAdrian Chadd 817f4a3eb02SAdrian Chadd start = rle->start; 818f4a3eb02SAdrian Chadd end = rle->end; 819f4a3eb02SAdrian Chadd count = ulmax(count, rle->count); 820f4a3eb02SAdrian Chadd } 821f4a3eb02SAdrian Chadd 822f4a3eb02SAdrian Chadd /* Locate a mapping region */ 823f4a3eb02SAdrian Chadd if ((cr = chipc_find_region(sc, start, end)) == NULL) { 824f4a3eb02SAdrian Chadd /* Resource requests outside our shared port regions can be 825f4a3eb02SAdrian Chadd * delegated to our parent. */ 826f4a3eb02SAdrian Chadd rv = bus_generic_rl_alloc_resource(dev, child, type, rid, 827f4a3eb02SAdrian Chadd start, end, count, flags); 828f4a3eb02SAdrian Chadd return (rv); 829f4a3eb02SAdrian Chadd } 830f4a3eb02SAdrian Chadd 831f4a3eb02SAdrian Chadd /* Try to retain a region reference */ 8327d1fb1aaSLandon J. Fuller if ((error = chipc_retain_region(sc, cr, RF_ALLOCATED))) 833f4a3eb02SAdrian Chadd return (NULL); 834f4a3eb02SAdrian Chadd 835f4a3eb02SAdrian Chadd /* Make our rman reservation */ 836f4a3eb02SAdrian Chadd rv = rman_reserve_resource(rm, start, end, count, flags & ~RF_ACTIVE, 837f4a3eb02SAdrian Chadd child); 838f4a3eb02SAdrian Chadd if (rv == NULL) { 839f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ALLOCATED); 840f4a3eb02SAdrian Chadd return (NULL); 841f4a3eb02SAdrian Chadd } 842f4a3eb02SAdrian Chadd 843f4a3eb02SAdrian Chadd rman_set_rid(rv, *rid); 844f4a3eb02SAdrian Chadd 845f4a3eb02SAdrian Chadd /* Activate */ 846f4a3eb02SAdrian Chadd if (flags & RF_ACTIVE) { 847f4a3eb02SAdrian Chadd error = bus_activate_resource(child, type, *rid, rv); 848f4a3eb02SAdrian Chadd if (error) { 849f4a3eb02SAdrian Chadd device_printf(dev, 850f4a3eb02SAdrian Chadd "failed to activate entry %#x type %d for " 851f4a3eb02SAdrian Chadd "child %s: %d\n", 852f4a3eb02SAdrian Chadd *rid, type, device_get_nameunit(child), error); 853f4a3eb02SAdrian Chadd 854f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ALLOCATED); 855f4a3eb02SAdrian Chadd rman_release_resource(rv); 856f4a3eb02SAdrian Chadd 857f4a3eb02SAdrian Chadd return (NULL); 858f4a3eb02SAdrian Chadd } 859f4a3eb02SAdrian Chadd } 860f4a3eb02SAdrian Chadd 861f4a3eb02SAdrian Chadd /* Update child's resource list entry */ 862f4a3eb02SAdrian Chadd if (rle != NULL) { 863f4a3eb02SAdrian Chadd rle->res = rv; 864f4a3eb02SAdrian Chadd rle->start = rman_get_start(rv); 865f4a3eb02SAdrian Chadd rle->end = rman_get_end(rv); 866f4a3eb02SAdrian Chadd rle->count = rman_get_size(rv); 867f4a3eb02SAdrian Chadd } 868f4a3eb02SAdrian Chadd 869f4a3eb02SAdrian Chadd return (rv); 870f4a3eb02SAdrian Chadd } 871f4a3eb02SAdrian Chadd 872f4a3eb02SAdrian Chadd static int 873f4a3eb02SAdrian Chadd chipc_release_resource(device_t dev, device_t child, int type, int rid, 874f4a3eb02SAdrian Chadd struct resource *r) 875f4a3eb02SAdrian Chadd { 876f4a3eb02SAdrian Chadd struct chipc_softc *sc; 877f4a3eb02SAdrian Chadd struct chipc_region *cr; 878f4a3eb02SAdrian Chadd struct rman *rm; 8792b693a88SLandon J. Fuller struct resource_list_entry *rle; 880f4a3eb02SAdrian Chadd int error; 881f4a3eb02SAdrian Chadd 882f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 883f4a3eb02SAdrian Chadd 884f4a3eb02SAdrian Chadd /* Handled by parent bus? */ 885f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 886f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 887f4a3eb02SAdrian Chadd return (bus_generic_rl_release_resource(dev, child, type, rid, 888f4a3eb02SAdrian Chadd r)); 889f4a3eb02SAdrian Chadd } 890f4a3eb02SAdrian Chadd 891f4a3eb02SAdrian Chadd /* Locate the mapping region */ 892f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, rman_get_start(r), rman_get_end(r)); 893f4a3eb02SAdrian Chadd if (cr == NULL) 894f4a3eb02SAdrian Chadd return (EINVAL); 895f4a3eb02SAdrian Chadd 896f4a3eb02SAdrian Chadd /* Deactivate resources */ 897f4a3eb02SAdrian Chadd if (rman_get_flags(r) & RF_ACTIVE) { 898f4a3eb02SAdrian Chadd error = BUS_DEACTIVATE_RESOURCE(dev, child, type, rid, r); 899f4a3eb02SAdrian Chadd if (error) 900f4a3eb02SAdrian Chadd return (error); 901f4a3eb02SAdrian Chadd } 902f4a3eb02SAdrian Chadd 903f4a3eb02SAdrian Chadd if ((error = rman_release_resource(r))) 904f4a3eb02SAdrian Chadd return (error); 905f4a3eb02SAdrian Chadd 906f4a3eb02SAdrian Chadd /* Drop allocation reference */ 907f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ALLOCATED); 908f4a3eb02SAdrian Chadd 9092b693a88SLandon J. Fuller /* Clear reference from the resource list entry if exists */ 9102b693a88SLandon J. Fuller rle = resource_list_find(BUS_GET_RESOURCE_LIST(dev, child), type, rid); 9112b693a88SLandon J. Fuller if (rle != NULL) 9122b693a88SLandon J. Fuller rle->res = NULL; 9132b693a88SLandon J. Fuller 914f4a3eb02SAdrian Chadd return (0); 915f4a3eb02SAdrian Chadd } 916f4a3eb02SAdrian Chadd 917f4a3eb02SAdrian Chadd static int 918f4a3eb02SAdrian Chadd chipc_adjust_resource(device_t dev, device_t child, int type, 919f4a3eb02SAdrian Chadd struct resource *r, rman_res_t start, rman_res_t end) 920f4a3eb02SAdrian Chadd { 921f4a3eb02SAdrian Chadd struct chipc_softc *sc; 922f4a3eb02SAdrian Chadd struct chipc_region *cr; 923f4a3eb02SAdrian Chadd struct rman *rm; 924f4a3eb02SAdrian Chadd 925f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 926f4a3eb02SAdrian Chadd 927f4a3eb02SAdrian Chadd /* Handled by parent bus? */ 928f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 929f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 930f4a3eb02SAdrian Chadd return (bus_generic_adjust_resource(dev, child, type, r, start, 931f4a3eb02SAdrian Chadd end)); 932f4a3eb02SAdrian Chadd } 933f4a3eb02SAdrian Chadd 934f4a3eb02SAdrian Chadd /* The range is limited to the existing region mapping */ 935f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, rman_get_start(r), rman_get_end(r)); 936f4a3eb02SAdrian Chadd if (cr == NULL) 937f4a3eb02SAdrian Chadd return (EINVAL); 938f4a3eb02SAdrian Chadd 939f4a3eb02SAdrian Chadd if (end <= start) 940f4a3eb02SAdrian Chadd return (EINVAL); 941f4a3eb02SAdrian Chadd 942f4a3eb02SAdrian Chadd if (start < cr->cr_addr || end > cr->cr_end) 943f4a3eb02SAdrian Chadd return (EINVAL); 944f4a3eb02SAdrian Chadd 945f4a3eb02SAdrian Chadd /* Range falls within the existing region */ 946f4a3eb02SAdrian Chadd return (rman_adjust_resource(r, start, end)); 947f4a3eb02SAdrian Chadd } 948f4a3eb02SAdrian Chadd 949f4a3eb02SAdrian Chadd /** 950f4a3eb02SAdrian Chadd * Retain an RF_ACTIVE reference to the region mapping @p r, and 951f4a3eb02SAdrian Chadd * configure @p r with its subregion values. 952f4a3eb02SAdrian Chadd * 953f4a3eb02SAdrian Chadd * @param sc Driver instance state. 954f4a3eb02SAdrian Chadd * @param child Requesting child device. 955f4a3eb02SAdrian Chadd * @param type resource type of @p r. 956f4a3eb02SAdrian Chadd * @param rid resource id of @p r 957f4a3eb02SAdrian Chadd * @param r resource to be activated. 958f4a3eb02SAdrian Chadd * @param req_direct If true, failure to allocate a direct bhnd resource 959f4a3eb02SAdrian Chadd * will be treated as an error. If false, the resource will not be marked 960f4a3eb02SAdrian Chadd * as RF_ACTIVE if bhnd direct resource allocation fails. 961f4a3eb02SAdrian Chadd */ 962f4a3eb02SAdrian Chadd static int 963f4a3eb02SAdrian Chadd chipc_try_activate_resource(struct chipc_softc *sc, device_t child, int type, 964f4a3eb02SAdrian Chadd int rid, struct resource *r, bool req_direct) 965f4a3eb02SAdrian Chadd { 966f4a3eb02SAdrian Chadd struct rman *rm; 967f4a3eb02SAdrian Chadd struct chipc_region *cr; 968f4a3eb02SAdrian Chadd bhnd_size_t cr_offset; 969f4a3eb02SAdrian Chadd rman_res_t r_start, r_end, r_size; 970f4a3eb02SAdrian Chadd int error; 971f4a3eb02SAdrian Chadd 972f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 973f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) 974f4a3eb02SAdrian Chadd return (EINVAL); 975f4a3eb02SAdrian Chadd 976f4a3eb02SAdrian Chadd r_start = rman_get_start(r); 977f4a3eb02SAdrian Chadd r_end = rman_get_end(r); 978f4a3eb02SAdrian Chadd r_size = rman_get_size(r); 979f4a3eb02SAdrian Chadd 980f4a3eb02SAdrian Chadd /* Find the corresponding chipc region */ 981f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, r_start, r_end); 982f4a3eb02SAdrian Chadd if (cr == NULL) 983f4a3eb02SAdrian Chadd return (EINVAL); 984f4a3eb02SAdrian Chadd 985f4a3eb02SAdrian Chadd /* Calculate subregion offset within the chipc region */ 986f4a3eb02SAdrian Chadd cr_offset = r_start - cr->cr_addr; 987f4a3eb02SAdrian Chadd 988f4a3eb02SAdrian Chadd /* Retain (and activate, if necessary) the chipc region */ 989f4a3eb02SAdrian Chadd if ((error = chipc_retain_region(sc, cr, RF_ACTIVE))) 990f4a3eb02SAdrian Chadd return (error); 991f4a3eb02SAdrian Chadd 992f4a3eb02SAdrian Chadd /* Configure child resource with its subregion values. */ 993f4a3eb02SAdrian Chadd if (cr->cr_res->direct) { 994f4a3eb02SAdrian Chadd error = chipc_init_child_resource(r, cr->cr_res->res, 995f4a3eb02SAdrian Chadd cr_offset, r_size); 996f4a3eb02SAdrian Chadd if (error) 997f4a3eb02SAdrian Chadd goto cleanup; 998f4a3eb02SAdrian Chadd 999f4a3eb02SAdrian Chadd /* Mark active */ 1000f4a3eb02SAdrian Chadd if ((error = rman_activate_resource(r))) 1001f4a3eb02SAdrian Chadd goto cleanup; 1002f4a3eb02SAdrian Chadd } else if (req_direct) { 1003f4a3eb02SAdrian Chadd error = ENOMEM; 1004f4a3eb02SAdrian Chadd goto cleanup; 1005f4a3eb02SAdrian Chadd } 1006f4a3eb02SAdrian Chadd 1007f4a3eb02SAdrian Chadd return (0); 1008f4a3eb02SAdrian Chadd 1009f4a3eb02SAdrian Chadd cleanup: 1010f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ACTIVE); 1011f4a3eb02SAdrian Chadd return (error); 1012f4a3eb02SAdrian Chadd } 1013f4a3eb02SAdrian Chadd 1014f4a3eb02SAdrian Chadd static int 1015f4a3eb02SAdrian Chadd chipc_activate_bhnd_resource(device_t dev, device_t child, int type, 1016f4a3eb02SAdrian Chadd int rid, struct bhnd_resource *r) 1017f4a3eb02SAdrian Chadd { 1018f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1019f4a3eb02SAdrian Chadd struct rman *rm; 1020f4a3eb02SAdrian Chadd int error; 1021f4a3eb02SAdrian Chadd 1022f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1023f4a3eb02SAdrian Chadd 1024f4a3eb02SAdrian Chadd /* Delegate non-locally managed resources to parent */ 1025f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1026f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r->res, rm)) { 1027f4a3eb02SAdrian Chadd return (bhnd_bus_generic_activate_resource(dev, child, type, 1028f4a3eb02SAdrian Chadd rid, r)); 1029f4a3eb02SAdrian Chadd } 1030f4a3eb02SAdrian Chadd 1031f4a3eb02SAdrian Chadd /* Try activating the chipc region resource */ 1032f4a3eb02SAdrian Chadd error = chipc_try_activate_resource(sc, child, type, rid, r->res, 1033f4a3eb02SAdrian Chadd false); 1034f4a3eb02SAdrian Chadd if (error) 1035f4a3eb02SAdrian Chadd return (error); 1036f4a3eb02SAdrian Chadd 1037f4a3eb02SAdrian Chadd /* Mark the child resource as direct according to the returned resource 1038f4a3eb02SAdrian Chadd * state */ 1039f4a3eb02SAdrian Chadd if (rman_get_flags(r->res) & RF_ACTIVE) 1040f4a3eb02SAdrian Chadd r->direct = true; 1041f4a3eb02SAdrian Chadd 1042f4a3eb02SAdrian Chadd return (0); 1043f4a3eb02SAdrian Chadd } 1044f4a3eb02SAdrian Chadd 1045f4a3eb02SAdrian Chadd static int 1046f4a3eb02SAdrian Chadd chipc_activate_resource(device_t dev, device_t child, int type, int rid, 1047f4a3eb02SAdrian Chadd struct resource *r) 1048f4a3eb02SAdrian Chadd { 1049f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1050f4a3eb02SAdrian Chadd struct rman *rm; 1051f4a3eb02SAdrian Chadd 1052f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1053f4a3eb02SAdrian Chadd 1054f4a3eb02SAdrian Chadd /* Delegate non-locally managed resources to parent */ 1055f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1056f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 1057f4a3eb02SAdrian Chadd return (bus_generic_activate_resource(dev, child, type, rid, 1058f4a3eb02SAdrian Chadd r)); 1059f4a3eb02SAdrian Chadd } 1060f4a3eb02SAdrian Chadd 1061f4a3eb02SAdrian Chadd /* Try activating the chipc region-based resource */ 1062f4a3eb02SAdrian Chadd return (chipc_try_activate_resource(sc, child, type, rid, r, true)); 1063f4a3eb02SAdrian Chadd } 1064f4a3eb02SAdrian Chadd 1065f4a3eb02SAdrian Chadd /** 1066f4a3eb02SAdrian Chadd * Default bhndb(4) implementation of BUS_DEACTIVATE_RESOURCE(). 1067f4a3eb02SAdrian Chadd */ 1068f4a3eb02SAdrian Chadd static int 1069f4a3eb02SAdrian Chadd chipc_deactivate_resource(device_t dev, device_t child, int type, 1070f4a3eb02SAdrian Chadd int rid, struct resource *r) 1071f4a3eb02SAdrian Chadd { 1072f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1073f4a3eb02SAdrian Chadd struct chipc_region *cr; 1074f4a3eb02SAdrian Chadd struct rman *rm; 1075f4a3eb02SAdrian Chadd int error; 1076f4a3eb02SAdrian Chadd 1077f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1078f4a3eb02SAdrian Chadd 1079f4a3eb02SAdrian Chadd /* Handled by parent bus? */ 1080f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1081f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 1082f4a3eb02SAdrian Chadd return (bus_generic_deactivate_resource(dev, child, type, rid, 1083f4a3eb02SAdrian Chadd r)); 1084f4a3eb02SAdrian Chadd } 1085f4a3eb02SAdrian Chadd 1086f4a3eb02SAdrian Chadd /* Find the corresponding chipc region */ 1087f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, rman_get_start(r), rman_get_end(r)); 1088f4a3eb02SAdrian Chadd if (cr == NULL) 1089f4a3eb02SAdrian Chadd return (EINVAL); 1090f4a3eb02SAdrian Chadd 1091f4a3eb02SAdrian Chadd /* Mark inactive */ 1092f4a3eb02SAdrian Chadd if ((error = rman_deactivate_resource(r))) 1093f4a3eb02SAdrian Chadd return (error); 1094f4a3eb02SAdrian Chadd 1095f4a3eb02SAdrian Chadd /* Drop associated RF_ACTIVE reference */ 1096f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ACTIVE); 1097f4a3eb02SAdrian Chadd 1098f4a3eb02SAdrian Chadd return (0); 1099f4a3eb02SAdrian Chadd } 1100f4a3eb02SAdrian Chadd 1101f4a3eb02SAdrian Chadd /** 1102f4a3eb02SAdrian Chadd * Examine bus state and make a best effort determination of whether it's 1103f4a3eb02SAdrian Chadd * likely safe to enable the muxed SPROM pins. 1104f4a3eb02SAdrian Chadd * 1105f4a3eb02SAdrian Chadd * On devices that do not use SPROM pin muxing, always returns true. 1106f4a3eb02SAdrian Chadd * 1107f4a3eb02SAdrian Chadd * @param sc chipc driver state. 1108f4a3eb02SAdrian Chadd */ 1109f4a3eb02SAdrian Chadd static bool 1110f90f4b65SLandon J. Fuller chipc_should_enable_muxed_sprom(struct chipc_softc *sc) 1111f4a3eb02SAdrian Chadd { 1112f4a3eb02SAdrian Chadd device_t *devs; 1113f4a3eb02SAdrian Chadd device_t hostb; 1114f4a3eb02SAdrian Chadd device_t parent; 1115f4a3eb02SAdrian Chadd int devcount; 1116f4a3eb02SAdrian Chadd int error; 1117f4a3eb02SAdrian Chadd bool result; 1118f4a3eb02SAdrian Chadd 1119f4a3eb02SAdrian Chadd /* Nothing to do? */ 1120f4a3eb02SAdrian Chadd if (!CHIPC_QUIRK(sc, MUX_SPROM)) 1121f4a3eb02SAdrian Chadd return (true); 1122f4a3eb02SAdrian Chadd 1123f90f4b65SLandon J. Fuller mtx_lock(&Giant); /* for newbus */ 1124f90f4b65SLandon J. Fuller 1125f4a3eb02SAdrian Chadd parent = device_get_parent(sc->dev); 11268e35bf83SLandon J. Fuller hostb = bhnd_bus_find_hostb_device(parent); 1127f4a3eb02SAdrian Chadd 1128f90f4b65SLandon J. Fuller if ((error = device_get_children(parent, &devs, &devcount))) { 1129f90f4b65SLandon J. Fuller mtx_unlock(&Giant); 1130f4a3eb02SAdrian Chadd return (false); 1131f90f4b65SLandon J. Fuller } 1132f4a3eb02SAdrian Chadd 1133f4a3eb02SAdrian Chadd /* Reject any active devices other than ChipCommon, or the 1134f4a3eb02SAdrian Chadd * host bridge (if any). */ 1135f4a3eb02SAdrian Chadd result = true; 1136f4a3eb02SAdrian Chadd for (int i = 0; i < devcount; i++) { 1137f4a3eb02SAdrian Chadd if (devs[i] == hostb || devs[i] == sc->dev) 1138f4a3eb02SAdrian Chadd continue; 1139f4a3eb02SAdrian Chadd 1140f4a3eb02SAdrian Chadd if (!device_is_attached(devs[i])) 1141f4a3eb02SAdrian Chadd continue; 1142f4a3eb02SAdrian Chadd 1143f4a3eb02SAdrian Chadd if (device_is_suspended(devs[i])) 1144f4a3eb02SAdrian Chadd continue; 1145f4a3eb02SAdrian Chadd 1146f4a3eb02SAdrian Chadd /* Active device; assume SPROM is busy */ 1147f4a3eb02SAdrian Chadd result = false; 1148f4a3eb02SAdrian Chadd break; 1149f4a3eb02SAdrian Chadd } 1150f4a3eb02SAdrian Chadd 1151f4a3eb02SAdrian Chadd free(devs, M_TEMP); 1152f90f4b65SLandon J. Fuller mtx_unlock(&Giant); 1153f4a3eb02SAdrian Chadd return (result); 1154f4a3eb02SAdrian Chadd } 1155e83ce340SAdrian Chadd 1156f90f4b65SLandon J. Fuller static int 1157f90f4b65SLandon J. Fuller chipc_enable_sprom(device_t dev) 1158f90f4b65SLandon J. Fuller { 1159f90f4b65SLandon J. Fuller struct chipc_softc *sc; 1160f90f4b65SLandon J. Fuller int error; 1161f90f4b65SLandon J. Fuller 1162f90f4b65SLandon J. Fuller sc = device_get_softc(dev); 1163f90f4b65SLandon J. Fuller CHIPC_LOCK(sc); 1164f90f4b65SLandon J. Fuller 1165f90f4b65SLandon J. Fuller /* Already enabled? */ 1166f90f4b65SLandon J. Fuller if (sc->sprom_refcnt >= 1) { 1167f90f4b65SLandon J. Fuller sc->sprom_refcnt++; 1168f90f4b65SLandon J. Fuller CHIPC_UNLOCK(sc); 1169f90f4b65SLandon J. Fuller 1170f90f4b65SLandon J. Fuller return (0); 1171f90f4b65SLandon J. Fuller } 1172f90f4b65SLandon J. Fuller 1173f90f4b65SLandon J. Fuller switch (sc->caps.nvram_src) { 1174f90f4b65SLandon J. Fuller case BHND_NVRAM_SRC_SPROM: 1175f90f4b65SLandon J. Fuller error = chipc_enable_sprom_pins(sc); 1176f90f4b65SLandon J. Fuller break; 1177f90f4b65SLandon J. Fuller case BHND_NVRAM_SRC_OTP: 1178f90f4b65SLandon J. Fuller error = chipc_enable_otp_power(sc); 1179f90f4b65SLandon J. Fuller break; 1180f90f4b65SLandon J. Fuller default: 1181f90f4b65SLandon J. Fuller error = 0; 1182f90f4b65SLandon J. Fuller break; 1183f90f4b65SLandon J. Fuller } 1184f90f4b65SLandon J. Fuller 1185f90f4b65SLandon J. Fuller /* Bump the reference count */ 1186f90f4b65SLandon J. Fuller if (error == 0) 1187f90f4b65SLandon J. Fuller sc->sprom_refcnt++; 1188f90f4b65SLandon J. Fuller 1189f90f4b65SLandon J. Fuller CHIPC_UNLOCK(sc); 1190f90f4b65SLandon J. Fuller return (error); 1191f90f4b65SLandon J. Fuller } 1192f90f4b65SLandon J. Fuller 1193f90f4b65SLandon J. Fuller static void 1194f90f4b65SLandon J. Fuller chipc_disable_sprom(device_t dev) 1195f90f4b65SLandon J. Fuller { 1196f90f4b65SLandon J. Fuller struct chipc_softc *sc; 1197f90f4b65SLandon J. Fuller 1198f90f4b65SLandon J. Fuller sc = device_get_softc(dev); 1199f90f4b65SLandon J. Fuller CHIPC_LOCK(sc); 1200f90f4b65SLandon J. Fuller 1201f90f4b65SLandon J. Fuller /* Check reference count, skip disable if in-use. */ 1202f90f4b65SLandon J. Fuller KASSERT(sc->sprom_refcnt > 0, ("sprom refcnt overrelease")); 1203f90f4b65SLandon J. Fuller sc->sprom_refcnt--; 1204f90f4b65SLandon J. Fuller if (sc->sprom_refcnt > 0) { 1205f90f4b65SLandon J. Fuller CHIPC_UNLOCK(sc); 1206f90f4b65SLandon J. Fuller return; 1207f90f4b65SLandon J. Fuller } 1208f90f4b65SLandon J. Fuller 1209f90f4b65SLandon J. Fuller switch (sc->caps.nvram_src) { 1210f90f4b65SLandon J. Fuller case BHND_NVRAM_SRC_SPROM: 1211f90f4b65SLandon J. Fuller chipc_disable_sprom_pins(sc); 1212f90f4b65SLandon J. Fuller break; 1213f90f4b65SLandon J. Fuller case BHND_NVRAM_SRC_OTP: 1214f90f4b65SLandon J. Fuller chipc_disable_otp_power(sc); 1215f90f4b65SLandon J. Fuller break; 1216f90f4b65SLandon J. Fuller default: 1217f90f4b65SLandon J. Fuller break; 1218f90f4b65SLandon J. Fuller } 1219f90f4b65SLandon J. Fuller 1220f90f4b65SLandon J. Fuller 1221f90f4b65SLandon J. Fuller CHIPC_UNLOCK(sc); 1222f90f4b65SLandon J. Fuller } 1223f90f4b65SLandon J. Fuller 1224f90f4b65SLandon J. Fuller static int 1225f90f4b65SLandon J. Fuller chipc_enable_otp_power(struct chipc_softc *sc) 1226f90f4b65SLandon J. Fuller { 1227f90f4b65SLandon J. Fuller // TODO: Enable OTP resource via PMU, and wait up to 100 usec for 1228f90f4b65SLandon J. Fuller // OTPS_READY to be set in `optstatus`. 1229f90f4b65SLandon J. Fuller return (0); 1230f90f4b65SLandon J. Fuller } 1231f90f4b65SLandon J. Fuller 1232f90f4b65SLandon J. Fuller static void 1233f90f4b65SLandon J. Fuller chipc_disable_otp_power(struct chipc_softc *sc) 1234f90f4b65SLandon J. Fuller { 1235f90f4b65SLandon J. Fuller // TODO: Disable OTP resource via PMU 1236f90f4b65SLandon J. Fuller } 1237f90f4b65SLandon J. Fuller 1238e83ce340SAdrian Chadd /** 1239e83ce340SAdrian Chadd * If required by this device, enable access to the SPROM. 1240e83ce340SAdrian Chadd * 1241e83ce340SAdrian Chadd * @param sc chipc driver state. 1242e83ce340SAdrian Chadd */ 1243e83ce340SAdrian Chadd static int 1244f90f4b65SLandon J. Fuller chipc_enable_sprom_pins(struct chipc_softc *sc) 1245e83ce340SAdrian Chadd { 1246e83ce340SAdrian Chadd uint32_t cctrl; 1247e83ce340SAdrian Chadd 1248f90f4b65SLandon J. Fuller CHIPC_LOCK_ASSERT(sc, MA_OWNED); 1249f90f4b65SLandon J. Fuller KASSERT(sc->sprom_refcnt == 0, ("sprom pins already enabled")); 1250e83ce340SAdrian Chadd 1251e83ce340SAdrian Chadd /* Nothing to do? */ 1252e83ce340SAdrian Chadd if (!CHIPC_QUIRK(sc, MUX_SPROM)) 1253e83ce340SAdrian Chadd return (0); 1254e83ce340SAdrian Chadd 1255f4a3eb02SAdrian Chadd /* Check whether bus is busy */ 1256f90f4b65SLandon J. Fuller if (!chipc_should_enable_muxed_sprom(sc)) 1257f90f4b65SLandon J. Fuller return (EBUSY); 1258f4a3eb02SAdrian Chadd 1259e83ce340SAdrian Chadd cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); 1260e83ce340SAdrian Chadd 1261e83ce340SAdrian Chadd /* 4331 devices */ 1262e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA_MUX_SPROM)) { 1263e83ce340SAdrian Chadd cctrl &= ~CHIPC_CCTRL4331_EXTPA_EN; 1264e83ce340SAdrian Chadd 1265e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_GPIO2_5_MUX_SPROM)) 1266e83ce340SAdrian Chadd cctrl &= ~CHIPC_CCTRL4331_EXTPA_ON_GPIO2_5; 1267e83ce340SAdrian Chadd 1268e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA2_MUX_SPROM)) 1269e83ce340SAdrian Chadd cctrl &= ~CHIPC_CCTRL4331_EXTPA_EN2; 1270e83ce340SAdrian Chadd 1271e83ce340SAdrian Chadd bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); 1272f90f4b65SLandon J. Fuller return (0); 1273e83ce340SAdrian Chadd } 1274e83ce340SAdrian Chadd 1275e83ce340SAdrian Chadd /* 4360 devices */ 1276e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4360_FEM_MUX_SPROM)) { 1277e83ce340SAdrian Chadd /* Unimplemented */ 1278e83ce340SAdrian Chadd } 1279e83ce340SAdrian Chadd 1280e83ce340SAdrian Chadd /* Refuse to proceed on unsupported devices with muxed SPROM pins */ 1281e83ce340SAdrian Chadd device_printf(sc->dev, "muxed sprom lines on unrecognized device\n"); 1282f90f4b65SLandon J. Fuller return (ENXIO); 1283e83ce340SAdrian Chadd } 1284e83ce340SAdrian Chadd 1285e83ce340SAdrian Chadd /** 1286e83ce340SAdrian Chadd * If required by this device, revert any GPIO/pin configuration applied 1287e83ce340SAdrian Chadd * to allow SPROM access. 1288e83ce340SAdrian Chadd * 1289e83ce340SAdrian Chadd * @param sc chipc driver state. 1290e83ce340SAdrian Chadd */ 1291f4a3eb02SAdrian Chadd static void 1292f90f4b65SLandon J. Fuller chipc_disable_sprom_pins(struct chipc_softc *sc) 1293e83ce340SAdrian Chadd { 1294e83ce340SAdrian Chadd uint32_t cctrl; 1295e83ce340SAdrian Chadd 1296e83ce340SAdrian Chadd /* Nothing to do? */ 1297e83ce340SAdrian Chadd if (!CHIPC_QUIRK(sc, MUX_SPROM)) 1298f4a3eb02SAdrian Chadd return; 1299f4a3eb02SAdrian Chadd 1300f90f4b65SLandon J. Fuller CHIPC_LOCK_ASSERT(sc, MA_OWNED); 1301315cf4daSLandon J. Fuller KASSERT(sc->sprom_refcnt == 0, ("sprom pins in use")); 1302e83ce340SAdrian Chadd 1303e83ce340SAdrian Chadd cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); 1304e83ce340SAdrian Chadd 1305e83ce340SAdrian Chadd /* 4331 devices */ 1306e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA_MUX_SPROM)) { 1307e83ce340SAdrian Chadd cctrl |= CHIPC_CCTRL4331_EXTPA_EN; 1308e83ce340SAdrian Chadd 1309e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_GPIO2_5_MUX_SPROM)) 1310e83ce340SAdrian Chadd cctrl |= CHIPC_CCTRL4331_EXTPA_ON_GPIO2_5; 1311e83ce340SAdrian Chadd 1312e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA2_MUX_SPROM)) 1313e83ce340SAdrian Chadd cctrl |= CHIPC_CCTRL4331_EXTPA_EN2; 1314e83ce340SAdrian Chadd 1315e83ce340SAdrian Chadd bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); 1316f90f4b65SLandon J. Fuller return; 1317e83ce340SAdrian Chadd } 1318e83ce340SAdrian Chadd 1319e83ce340SAdrian Chadd /* 4360 devices */ 1320e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4360_FEM_MUX_SPROM)) { 1321e83ce340SAdrian Chadd /* Unimplemented */ 1322e83ce340SAdrian Chadd } 1323f90f4b65SLandon J. Fuller } 1324e83ce340SAdrian Chadd 1325f90f4b65SLandon J. Fuller static uint32_t 1326f90f4b65SLandon J. Fuller chipc_read_chipst(device_t dev) 1327f90f4b65SLandon J. Fuller { 1328f90f4b65SLandon J. Fuller struct chipc_softc *sc = device_get_softc(dev); 1329f90f4b65SLandon J. Fuller return (bhnd_bus_read_4(sc->core, CHIPC_CHIPST)); 1330e83ce340SAdrian Chadd } 1331e83ce340SAdrian Chadd 13328ef24a0dSAdrian Chadd static void 13338ef24a0dSAdrian Chadd chipc_write_chipctrl(device_t dev, uint32_t value, uint32_t mask) 13348ef24a0dSAdrian Chadd { 13358ef24a0dSAdrian Chadd struct chipc_softc *sc; 13368ef24a0dSAdrian Chadd uint32_t cctrl; 13378ef24a0dSAdrian Chadd 13388ef24a0dSAdrian Chadd sc = device_get_softc(dev); 13398ef24a0dSAdrian Chadd 13408ef24a0dSAdrian Chadd CHIPC_LOCK(sc); 13418ef24a0dSAdrian Chadd 13428ef24a0dSAdrian Chadd cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); 13438ef24a0dSAdrian Chadd cctrl = (cctrl & ~mask) | (value | mask); 13448ef24a0dSAdrian Chadd bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); 13458ef24a0dSAdrian Chadd 13468ef24a0dSAdrian Chadd CHIPC_UNLOCK(sc); 13478ef24a0dSAdrian Chadd } 13488ef24a0dSAdrian Chadd 13492b693a88SLandon J. Fuller static struct chipc_caps * 13502b693a88SLandon J. Fuller chipc_get_caps(device_t dev) 13512b693a88SLandon J. Fuller { 13522b693a88SLandon J. Fuller struct chipc_softc *sc; 13532b693a88SLandon J. Fuller 13542b693a88SLandon J. Fuller sc = device_get_softc(dev); 13552b693a88SLandon J. Fuller return (&sc->caps); 13562b693a88SLandon J. Fuller } 13572b693a88SLandon J. Fuller 13584ad7e9b0SAdrian Chadd static device_method_t chipc_methods[] = { 13594ad7e9b0SAdrian Chadd /* Device interface */ 13604ad7e9b0SAdrian Chadd DEVMETHOD(device_probe, chipc_probe), 13614ad7e9b0SAdrian Chadd DEVMETHOD(device_attach, chipc_attach), 13624ad7e9b0SAdrian Chadd DEVMETHOD(device_detach, chipc_detach), 13634ad7e9b0SAdrian Chadd DEVMETHOD(device_suspend, chipc_suspend), 13644ad7e9b0SAdrian Chadd DEVMETHOD(device_resume, chipc_resume), 13654ad7e9b0SAdrian Chadd 1366f4a3eb02SAdrian Chadd /* Bus interface */ 1367f4a3eb02SAdrian Chadd DEVMETHOD(bus_probe_nomatch, chipc_probe_nomatch), 1368f4a3eb02SAdrian Chadd DEVMETHOD(bus_print_child, chipc_print_child), 1369f4a3eb02SAdrian Chadd DEVMETHOD(bus_child_pnpinfo_str, chipc_child_pnpinfo_str), 1370f4a3eb02SAdrian Chadd DEVMETHOD(bus_child_location_str, chipc_child_location_str), 1371f4a3eb02SAdrian Chadd 1372f4a3eb02SAdrian Chadd DEVMETHOD(bus_add_child, chipc_add_child), 1373f4a3eb02SAdrian Chadd DEVMETHOD(bus_child_deleted, chipc_child_deleted), 1374f4a3eb02SAdrian Chadd 1375f4a3eb02SAdrian Chadd DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 1376f4a3eb02SAdrian Chadd DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 1377f4a3eb02SAdrian Chadd DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource), 1378f4a3eb02SAdrian Chadd DEVMETHOD(bus_alloc_resource, chipc_alloc_resource), 1379f4a3eb02SAdrian Chadd DEVMETHOD(bus_release_resource, chipc_release_resource), 1380f4a3eb02SAdrian Chadd DEVMETHOD(bus_adjust_resource, chipc_adjust_resource), 1381f4a3eb02SAdrian Chadd DEVMETHOD(bus_activate_resource, chipc_activate_resource), 1382f4a3eb02SAdrian Chadd DEVMETHOD(bus_deactivate_resource, chipc_deactivate_resource), 1383f4a3eb02SAdrian Chadd DEVMETHOD(bus_get_resource_list, chipc_get_resource_list), 1384f4a3eb02SAdrian Chadd 1385f4a3eb02SAdrian Chadd DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 1386f4a3eb02SAdrian Chadd DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 1387f4a3eb02SAdrian Chadd DEVMETHOD(bus_config_intr, bus_generic_config_intr), 1388f4a3eb02SAdrian Chadd DEVMETHOD(bus_bind_intr, bus_generic_bind_intr), 1389f4a3eb02SAdrian Chadd DEVMETHOD(bus_describe_intr, bus_generic_describe_intr), 1390f4a3eb02SAdrian Chadd 1391f4a3eb02SAdrian Chadd /* BHND bus inteface */ 1392f4a3eb02SAdrian Chadd DEVMETHOD(bhnd_bus_activate_resource, chipc_activate_bhnd_resource), 1393f4a3eb02SAdrian Chadd 13944ad7e9b0SAdrian Chadd /* ChipCommon interface */ 1395f90f4b65SLandon J. Fuller DEVMETHOD(bhnd_chipc_read_chipst, chipc_read_chipst), 13968ef24a0dSAdrian Chadd DEVMETHOD(bhnd_chipc_write_chipctrl, chipc_write_chipctrl), 1397f90f4b65SLandon J. Fuller DEVMETHOD(bhnd_chipc_enable_sprom, chipc_enable_sprom), 1398f90f4b65SLandon J. Fuller DEVMETHOD(bhnd_chipc_disable_sprom, chipc_disable_sprom), 13992b693a88SLandon J. Fuller DEVMETHOD(bhnd_chipc_get_caps, chipc_get_caps), 1400e83ce340SAdrian Chadd 14014ad7e9b0SAdrian Chadd DEVMETHOD_END 14024ad7e9b0SAdrian Chadd }; 14034ad7e9b0SAdrian Chadd 1404f90f4b65SLandon J. Fuller DEFINE_CLASS_0(bhnd_chipc, bhnd_chipc_driver, chipc_methods, sizeof(struct chipc_softc)); 1405f90f4b65SLandon J. Fuller EARLY_DRIVER_MODULE(bhnd_chipc, bhnd, bhnd_chipc_driver, bhnd_chipc_devclass, 0, 0, 1406e129bcd6SLandon J. Fuller BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); 140796546b75SAdrian Chadd MODULE_DEPEND(bhnd_chipc, bhnd, 1, 1, 1); 14084ad7e9b0SAdrian Chadd MODULE_VERSION(bhnd_chipc, 1); 1409