14ad7e9b0SAdrian Chadd /*- 2f4a3eb02SAdrian Chadd * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org> 3f4a3eb02SAdrian Chadd * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com> 44ad7e9b0SAdrian Chadd * All rights reserved. 54ad7e9b0SAdrian Chadd * 64ad7e9b0SAdrian Chadd * Redistribution and use in source and binary forms, with or without 74ad7e9b0SAdrian Chadd * modification, are permitted provided that the following conditions 84ad7e9b0SAdrian Chadd * are met: 94ad7e9b0SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 104ad7e9b0SAdrian Chadd * notice, this list of conditions and the following disclaimer, 114ad7e9b0SAdrian Chadd * without modification. 124ad7e9b0SAdrian Chadd * 2. Redistributions in binary form must reproduce at minimum a disclaimer 134ad7e9b0SAdrian Chadd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 144ad7e9b0SAdrian Chadd * redistribution must be conditioned upon including a substantially 154ad7e9b0SAdrian Chadd * similar Disclaimer requirement for further binary redistribution. 164ad7e9b0SAdrian Chadd * 174ad7e9b0SAdrian Chadd * NO WARRANTY 184ad7e9b0SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 194ad7e9b0SAdrian Chadd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 204ad7e9b0SAdrian Chadd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 214ad7e9b0SAdrian Chadd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 224ad7e9b0SAdrian Chadd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 234ad7e9b0SAdrian Chadd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 244ad7e9b0SAdrian Chadd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 254ad7e9b0SAdrian Chadd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 264ad7e9b0SAdrian Chadd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 274ad7e9b0SAdrian Chadd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 284ad7e9b0SAdrian Chadd * THE POSSIBILITY OF SUCH DAMAGES. 294ad7e9b0SAdrian Chadd */ 304ad7e9b0SAdrian Chadd 314ad7e9b0SAdrian Chadd #include <sys/cdefs.h> 324ad7e9b0SAdrian Chadd __FBSDID("$FreeBSD$"); 334ad7e9b0SAdrian Chadd 344ad7e9b0SAdrian Chadd /* 354ad7e9b0SAdrian Chadd * Broadcom ChipCommon driver. 364ad7e9b0SAdrian Chadd * 374ad7e9b0SAdrian Chadd * With the exception of some very early chipsets, the ChipCommon core 384ad7e9b0SAdrian Chadd * has been included in all HND SoCs and chipsets based on the siba(4) 394ad7e9b0SAdrian Chadd * and bcma(4) interconnects, providing a common interface to chipset 404ad7e9b0SAdrian Chadd * identification, bus enumeration, UARTs, clocks, watchdog interrupts, GPIO, 414ad7e9b0SAdrian Chadd * flash, etc. 42e129bcd6SLandon J. Fuller * 43e129bcd6SLandon J. Fuller * The purpose of this driver is memory resource management for ChipCommon drivers 44e129bcd6SLandon J. Fuller * like UART, PMU, flash. ChipCommon core has several memory regions. 45e129bcd6SLandon J. Fuller * 46e129bcd6SLandon J. Fuller * ChipCommon driver has memory resource manager. Driver 47e129bcd6SLandon J. Fuller * gets information about BHND core ports/regions and map them 48e129bcd6SLandon J. Fuller * into drivers' resources. 49e129bcd6SLandon J. Fuller * 50e129bcd6SLandon J. Fuller * Here is overview of mapping: 51e129bcd6SLandon J. Fuller * 52e129bcd6SLandon J. Fuller * ------------------------------------------------------ 53e129bcd6SLandon J. Fuller * | Port.Region| Purpose | 54e129bcd6SLandon J. Fuller * ------------------------------------------------------ 55e129bcd6SLandon J. Fuller * | 0.0 | PMU, SPI(0x40), UART(0x300) | 56e129bcd6SLandon J. Fuller * | 1.0 | ? | 57e129bcd6SLandon J. Fuller * | 1.1 | MMIO flash (SPI & CFI) | 58e129bcd6SLandon J. Fuller * ------------------------------------------------------ 594ad7e9b0SAdrian Chadd */ 604ad7e9b0SAdrian Chadd 614ad7e9b0SAdrian Chadd #include <sys/param.h> 624ad7e9b0SAdrian Chadd #include <sys/kernel.h> 63f4a3eb02SAdrian Chadd #include <sys/lock.h> 644ad7e9b0SAdrian Chadd #include <sys/bus.h> 65e129bcd6SLandon J. Fuller #include <sys/rman.h> 66f4a3eb02SAdrian Chadd #include <sys/malloc.h> 674ad7e9b0SAdrian Chadd #include <sys/module.h> 68f4a3eb02SAdrian Chadd #include <sys/mutex.h> 694ad7e9b0SAdrian Chadd #include <sys/systm.h> 704ad7e9b0SAdrian Chadd 714ad7e9b0SAdrian Chadd #include <machine/bus.h> 724ad7e9b0SAdrian Chadd #include <machine/resource.h> 734ad7e9b0SAdrian Chadd 744ad7e9b0SAdrian Chadd #include <dev/bhnd/bhnd.h> 75f4a3eb02SAdrian Chadd #include <dev/bhnd/bhndvar.h> 76e83ce340SAdrian Chadd 774ad7e9b0SAdrian Chadd #include "chipcreg.h" 784ad7e9b0SAdrian Chadd #include "chipcvar.h" 79f4a3eb02SAdrian Chadd #include "chipc_private.h" 804ad7e9b0SAdrian Chadd 814ad7e9b0SAdrian Chadd devclass_t bhnd_chipc_devclass; /**< bhnd(4) chipcommon device class */ 824ad7e9b0SAdrian Chadd 8336e4410aSAdrian Chadd static struct bhnd_device_quirk chipc_quirks[]; 8436e4410aSAdrian Chadd 854ad7e9b0SAdrian Chadd /* Supported device identifiers */ 8636e4410aSAdrian Chadd static const struct bhnd_device chipc_devices[] = { 875ad9ac03SAdrian Chadd BHND_DEVICE(CC, NULL, chipc_quirks), 8836e4410aSAdrian Chadd BHND_DEVICE_END 894ad7e9b0SAdrian Chadd }; 904ad7e9b0SAdrian Chadd 9136e4410aSAdrian Chadd 924ad7e9b0SAdrian Chadd /* Device quirks table */ 934ad7e9b0SAdrian Chadd static struct bhnd_device_quirk chipc_quirks[] = { 945ad9ac03SAdrian Chadd /* core revision quirks */ 955ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_GTE(32), CHIPC_QUIRK_SUPPORTS_SPROM), 965ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_GTE(35), CHIPC_QUIRK_SUPPORTS_CAP_EXT), 975ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_GTE(49), CHIPC_QUIRK_IPX_OTPLAYOUT_SIZE), 985ad9ac03SAdrian Chadd 995ad9ac03SAdrian Chadd /* 4706 variant quirks */ 1005ad9ac03SAdrian Chadd BHND_CORE_QUIRK (HWREV_EQ (38), CHIPC_QUIRK_4706_NFLASH), /* BCM5357? */ 1015ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (4706, HWREV_ANY, CHIPC_QUIRK_4706_NFLASH), 1025ad9ac03SAdrian Chadd 1035ad9ac03SAdrian Chadd /* 4331 quirks*/ 1045ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (4331, HWREV_ANY, CHIPC_QUIRK_4331_EXTPA_MUX_SPROM), 1055ad9ac03SAdrian Chadd BHND_PKG_QUIRK (4331, TN, CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM), 1065ad9ac03SAdrian Chadd BHND_PKG_QUIRK (4331, TNA0, CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM), 1075ad9ac03SAdrian Chadd BHND_PKG_QUIRK (4331, TT, CHIPC_QUIRK_4331_EXTPA2_MUX_SPROM), 1085ad9ac03SAdrian Chadd 1095ad9ac03SAdrian Chadd /* 4360 quirks */ 1105ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (4352, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 1115ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (43460, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 1125ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (43462, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 1135ad9ac03SAdrian Chadd BHND_CHIP_QUIRK (43602, HWREV_LTE(2), CHIPC_QUIRK_4360_FEM_MUX_SPROM), 114f4a3eb02SAdrian Chadd 11536e4410aSAdrian Chadd BHND_DEVICE_QUIRK_END 1164ad7e9b0SAdrian Chadd }; 1174ad7e9b0SAdrian Chadd 118785df0cbSAdrian Chadd 119e129bcd6SLandon J. Fuller /* 120e129bcd6SLandon J. Fuller * Here is resource configuration hints for child devices 121e129bcd6SLandon J. Fuller * 122e129bcd6SLandon J. Fuller * [Flash] There are 2 flash resources: 123e129bcd6SLandon J. Fuller * - resource ID (rid) = 0: memory-mapped flash memory 124e129bcd6SLandon J. Fuller * - resource ID (rid) = 1: memory-mapped flash registers (i.e for SPI) 125e129bcd6SLandon J. Fuller * 126e129bcd6SLandon J. Fuller * [UART] Uses IRQ and memory resources: 127e129bcd6SLandon J. Fuller * - resource ID (rid) = 0: memory-mapped registers 128e129bcd6SLandon J. Fuller * - IRQ resource ID (rid) = 0: shared IRQ line for Tx/Rx. 129e129bcd6SLandon J. Fuller */ 130e129bcd6SLandon J. Fuller 131785df0cbSAdrian Chadd static const struct chipc_hint { 132785df0cbSAdrian Chadd const char *name; 133785df0cbSAdrian Chadd int unit; 134785df0cbSAdrian Chadd int type; 135785df0cbSAdrian Chadd int rid; 136785df0cbSAdrian Chadd rman_res_t base; /* relative to parent resource */ 137785df0cbSAdrian Chadd rman_res_t size; 138785df0cbSAdrian Chadd u_int port; /* ignored if SYS_RES_IRQ */ 139785df0cbSAdrian Chadd u_int region; 140785df0cbSAdrian Chadd } chipc_hints[] = { 141785df0cbSAdrian Chadd // FIXME: cfg/spi port1.1 mapping on siba(4) SoCs 1422b693a88SLandon J. Fuller // FIXME: IRQ shouldn't be hardcoded 143785df0cbSAdrian Chadd /* device unit type rid base size port,region */ 144785df0cbSAdrian Chadd { "bhnd_nvram", 0, SYS_RES_MEMORY, 0, CHIPC_SPROM_OTP, CHIPC_SPROM_OTP_SIZE, 0,0 }, 145785df0cbSAdrian Chadd { "uart", 0, SYS_RES_MEMORY, 0, CHIPC_UART0_BASE, CHIPC_UART_SIZE, 0,0 }, 1462b693a88SLandon J. Fuller { "uart", 0, SYS_RES_IRQ, 0, 2, 1 }, 147785df0cbSAdrian Chadd { "uart", 1, SYS_RES_MEMORY, 0, CHIPC_UART1_BASE, CHIPC_UART_SIZE, 0,0 }, 1482b693a88SLandon J. Fuller { "uart", 1, SYS_RES_IRQ, 0, 2, 1 }, 149785df0cbSAdrian Chadd { "spi", 0, SYS_RES_MEMORY, 0, 0, RM_MAX_END, 1,1 }, 150785df0cbSAdrian Chadd { "spi", 0, SYS_RES_MEMORY, 1, CHIPC_SFLASH_BASE, CHIPC_SFLASH_SIZE, 0,0 }, 151785df0cbSAdrian Chadd { "cfi", 0, SYS_RES_MEMORY, 0, 0, RM_MAX_END, 1,1}, 152785df0cbSAdrian Chadd { "cfi", 0, SYS_RES_MEMORY, 1, CHIPC_SFLASH_BASE, CHIPC_SFLASH_SIZE, 0,0 }, 153785df0cbSAdrian Chadd { NULL } 154785df0cbSAdrian Chadd }; 155785df0cbSAdrian Chadd 156785df0cbSAdrian Chadd 157f4a3eb02SAdrian Chadd static int chipc_try_activate_resource( 158f4a3eb02SAdrian Chadd struct chipc_softc *sc, device_t child, 159f4a3eb02SAdrian Chadd int type, int rid, struct resource *r, 160f4a3eb02SAdrian Chadd bool req_direct); 161f4a3eb02SAdrian Chadd 162f4a3eb02SAdrian Chadd static int chipc_read_caps(struct chipc_softc *sc, 163f4a3eb02SAdrian Chadd struct chipc_caps *caps); 164f4a3eb02SAdrian Chadd 165f4a3eb02SAdrian Chadd static bhnd_nvram_src_t chipc_nvram_identify(struct chipc_softc *sc); 166f4a3eb02SAdrian Chadd static bool chipc_should_enable_sprom( 167f4a3eb02SAdrian Chadd struct chipc_softc *sc); 168f4a3eb02SAdrian Chadd 169f4a3eb02SAdrian Chadd static int chipc_init_rman(struct chipc_softc *sc); 170f4a3eb02SAdrian Chadd static void chipc_free_rman(struct chipc_softc *sc); 171f4a3eb02SAdrian Chadd static struct rman *chipc_get_rman(struct chipc_softc *sc, 172f4a3eb02SAdrian Chadd int type); 173f4a3eb02SAdrian Chadd 1744ad7e9b0SAdrian Chadd /* quirk and capability flag convenience macros */ 1754ad7e9b0SAdrian Chadd #define CHIPC_QUIRK(_sc, _name) \ 1764ad7e9b0SAdrian Chadd ((_sc)->quirks & CHIPC_QUIRK_ ## _name) 1774ad7e9b0SAdrian Chadd 1784ad7e9b0SAdrian Chadd #define CHIPC_CAP(_sc, _name) \ 179f4a3eb02SAdrian Chadd ((_sc)->caps._name) 1804ad7e9b0SAdrian Chadd 1814ad7e9b0SAdrian Chadd #define CHIPC_ASSERT_QUIRK(_sc, name) \ 1824ad7e9b0SAdrian Chadd KASSERT(CHIPC_QUIRK((_sc), name), ("quirk " __STRING(_name) " not set")) 1834ad7e9b0SAdrian Chadd 1844ad7e9b0SAdrian Chadd #define CHIPC_ASSERT_CAP(_sc, name) \ 1854ad7e9b0SAdrian Chadd KASSERT(CHIPC_CAP((_sc), name), ("capability " __STRING(_name) " not set")) 1864ad7e9b0SAdrian Chadd 1874ad7e9b0SAdrian Chadd static int 1884ad7e9b0SAdrian Chadd chipc_probe(device_t dev) 1894ad7e9b0SAdrian Chadd { 19036e4410aSAdrian Chadd const struct bhnd_device *id; 1914ad7e9b0SAdrian Chadd 19236e4410aSAdrian Chadd id = bhnd_device_lookup(dev, chipc_devices, sizeof(chipc_devices[0])); 19336e4410aSAdrian Chadd if (id == NULL) 1944ad7e9b0SAdrian Chadd return (ENXIO); 19536e4410aSAdrian Chadd 19636e4410aSAdrian Chadd bhnd_set_default_core_desc(dev); 19736e4410aSAdrian Chadd return (BUS_PROBE_DEFAULT); 1984ad7e9b0SAdrian Chadd } 1994ad7e9b0SAdrian Chadd 2004ad7e9b0SAdrian Chadd static int 2014ad7e9b0SAdrian Chadd chipc_attach(device_t dev) 2024ad7e9b0SAdrian Chadd { 2034ad7e9b0SAdrian Chadd struct chipc_softc *sc; 2044ad7e9b0SAdrian Chadd bhnd_addr_t enum_addr; 2054ad7e9b0SAdrian Chadd uint32_t ccid_reg; 2064ad7e9b0SAdrian Chadd uint8_t chip_type; 2074ad7e9b0SAdrian Chadd int error; 2084ad7e9b0SAdrian Chadd 2094ad7e9b0SAdrian Chadd sc = device_get_softc(dev); 2104ad7e9b0SAdrian Chadd sc->dev = dev; 21136e4410aSAdrian Chadd sc->quirks = bhnd_device_quirks(dev, chipc_devices, 21236e4410aSAdrian Chadd sizeof(chipc_devices[0])); 213f4a3eb02SAdrian Chadd sc->sprom_refcnt = 0; 214e83ce340SAdrian Chadd 215e83ce340SAdrian Chadd CHIPC_LOCK_INIT(sc); 216f4a3eb02SAdrian Chadd STAILQ_INIT(&sc->mem_regions); 2174ad7e9b0SAdrian Chadd 218f4a3eb02SAdrian Chadd /* Set up resource management */ 219f4a3eb02SAdrian Chadd if ((error = chipc_init_rman(sc))) { 220f4a3eb02SAdrian Chadd device_printf(sc->dev, 221f4a3eb02SAdrian Chadd "failed to initialize chipc resource state: %d\n", error); 222f4a3eb02SAdrian Chadd goto failed; 223f4a3eb02SAdrian Chadd } 2244ad7e9b0SAdrian Chadd 225f4a3eb02SAdrian Chadd /* Allocate the region containing our core registers */ 226f4a3eb02SAdrian Chadd if ((sc->core_region = chipc_find_region_by_rid(sc, 0)) == NULL) { 227f4a3eb02SAdrian Chadd error = ENXIO; 228f4a3eb02SAdrian Chadd goto failed; 229f4a3eb02SAdrian Chadd } 230f4a3eb02SAdrian Chadd 231f4a3eb02SAdrian Chadd error = chipc_retain_region(sc, sc->core_region, 232f4a3eb02SAdrian Chadd RF_ALLOCATED|RF_ACTIVE); 233f4a3eb02SAdrian Chadd if (error) { 234f4a3eb02SAdrian Chadd sc->core_region = NULL; 235f4a3eb02SAdrian Chadd goto failed; 236f4a3eb02SAdrian Chadd } else { 237f4a3eb02SAdrian Chadd sc->core = sc->core_region->cr_res; 238f4a3eb02SAdrian Chadd } 2394ad7e9b0SAdrian Chadd 2404ad7e9b0SAdrian Chadd /* Fetch our chipset identification data */ 2414ad7e9b0SAdrian Chadd ccid_reg = bhnd_bus_read_4(sc->core, CHIPC_ID); 242f4a3eb02SAdrian Chadd chip_type = CHIPC_GET_BITS(ccid_reg, CHIPC_ID_BUS); 2434ad7e9b0SAdrian Chadd 2444ad7e9b0SAdrian Chadd switch (chip_type) { 2454ad7e9b0SAdrian Chadd case BHND_CHIPTYPE_SIBA: 2464ad7e9b0SAdrian Chadd /* enumeration space starts at the ChipCommon register base. */ 2474ad7e9b0SAdrian Chadd enum_addr = rman_get_start(sc->core->res); 2484ad7e9b0SAdrian Chadd break; 2494ad7e9b0SAdrian Chadd case BHND_CHIPTYPE_BCMA: 2504ad7e9b0SAdrian Chadd case BHND_CHIPTYPE_BCMA_ALT: 2514ad7e9b0SAdrian Chadd enum_addr = bhnd_bus_read_4(sc->core, CHIPC_EROMPTR); 2524ad7e9b0SAdrian Chadd break; 2534ad7e9b0SAdrian Chadd default: 2544ad7e9b0SAdrian Chadd device_printf(dev, "unsupported chip type %hhu\n", chip_type); 2554ad7e9b0SAdrian Chadd error = ENODEV; 256f4a3eb02SAdrian Chadd goto failed; 2574ad7e9b0SAdrian Chadd } 2584ad7e9b0SAdrian Chadd 2594ad7e9b0SAdrian Chadd sc->ccid = bhnd_parse_chipid(ccid_reg, enum_addr); 2604ad7e9b0SAdrian Chadd 261f4a3eb02SAdrian Chadd /* Fetch and parse capability register(s) */ 262f4a3eb02SAdrian Chadd if ((error = chipc_read_caps(sc, &sc->caps))) 263f4a3eb02SAdrian Chadd goto failed; 2644ad7e9b0SAdrian Chadd 265f4a3eb02SAdrian Chadd if (bootverbose) 266f4a3eb02SAdrian Chadd chipc_print_caps(sc->dev, &sc->caps); 267f4a3eb02SAdrian Chadd 268785df0cbSAdrian Chadd /* Identify NVRAM source */ 269e83ce340SAdrian Chadd sc->nvram_src = chipc_nvram_identify(sc); 270e83ce340SAdrian Chadd 271785df0cbSAdrian Chadd /* Probe and attach children */ 272785df0cbSAdrian Chadd bus_generic_probe(dev); 273f4a3eb02SAdrian Chadd if ((error = bus_generic_attach(dev))) 274f4a3eb02SAdrian Chadd goto failed; 2754ad7e9b0SAdrian Chadd 2764ad7e9b0SAdrian Chadd return (0); 2774ad7e9b0SAdrian Chadd 278f4a3eb02SAdrian Chadd failed: 279f4a3eb02SAdrian Chadd if (sc->core_region != NULL) { 280f4a3eb02SAdrian Chadd chipc_release_region(sc, sc->core_region, 281f4a3eb02SAdrian Chadd RF_ALLOCATED|RF_ACTIVE); 282f4a3eb02SAdrian Chadd } 283f4a3eb02SAdrian Chadd 284f4a3eb02SAdrian Chadd chipc_free_rman(sc); 285e83ce340SAdrian Chadd CHIPC_LOCK_DESTROY(sc); 2864ad7e9b0SAdrian Chadd return (error); 2874ad7e9b0SAdrian Chadd } 2884ad7e9b0SAdrian Chadd 2894ad7e9b0SAdrian Chadd static int 2904ad7e9b0SAdrian Chadd chipc_detach(device_t dev) 2914ad7e9b0SAdrian Chadd { 2924ad7e9b0SAdrian Chadd struct chipc_softc *sc; 293f4a3eb02SAdrian Chadd int error; 2944ad7e9b0SAdrian Chadd 2954ad7e9b0SAdrian Chadd sc = device_get_softc(dev); 296f4a3eb02SAdrian Chadd 297f4a3eb02SAdrian Chadd if ((error = bus_generic_detach(dev))) 298f4a3eb02SAdrian Chadd return (error); 299f4a3eb02SAdrian Chadd 300f4a3eb02SAdrian Chadd chipc_release_region(sc, sc->core_region, RF_ALLOCATED|RF_ACTIVE); 301f4a3eb02SAdrian Chadd chipc_free_rman(sc); 302e83ce340SAdrian Chadd 303e83ce340SAdrian Chadd CHIPC_LOCK_DESTROY(sc); 3044ad7e9b0SAdrian Chadd 3054ad7e9b0SAdrian Chadd return (0); 3064ad7e9b0SAdrian Chadd } 3074ad7e9b0SAdrian Chadd 308f4a3eb02SAdrian Chadd /* Read and parse chipc capabilities */ 3094ad7e9b0SAdrian Chadd static int 310f4a3eb02SAdrian Chadd chipc_read_caps(struct chipc_softc *sc, struct chipc_caps *caps) 3114ad7e9b0SAdrian Chadd { 312f4a3eb02SAdrian Chadd uint32_t cap_reg; 313f4a3eb02SAdrian Chadd uint32_t cap_ext_reg; 314f4a3eb02SAdrian Chadd uint32_t regval; 315f4a3eb02SAdrian Chadd 316f4a3eb02SAdrian Chadd /* Fetch cap registers */ 317f4a3eb02SAdrian Chadd cap_reg = bhnd_bus_read_4(sc->core, CHIPC_CAPABILITIES); 318f4a3eb02SAdrian Chadd cap_ext_reg = 0; 319f4a3eb02SAdrian Chadd if (CHIPC_QUIRK(sc, SUPPORTS_CAP_EXT)) 320f4a3eb02SAdrian Chadd cap_ext_reg = bhnd_bus_read_4(sc->core, CHIPC_CAPABILITIES_EXT); 321f4a3eb02SAdrian Chadd 322f4a3eb02SAdrian Chadd /* Extract values */ 323f4a3eb02SAdrian Chadd caps->num_uarts = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_NUM_UART); 324f4a3eb02SAdrian Chadd caps->mipseb = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_MIPSEB); 325f4a3eb02SAdrian Chadd caps->uart_gpio = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_UARTGPIO); 326f4a3eb02SAdrian Chadd caps->uart_clock = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_UCLKSEL); 327f4a3eb02SAdrian Chadd 328f4a3eb02SAdrian Chadd caps->extbus_type = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_EXTBUS); 329f4a3eb02SAdrian Chadd caps->power_control = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_PWR_CTL); 330f4a3eb02SAdrian Chadd caps->jtag_master = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_JTAGP); 331f4a3eb02SAdrian Chadd 332f4a3eb02SAdrian Chadd caps->pll_type = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_PLL); 333f4a3eb02SAdrian Chadd caps->backplane_64 = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_BKPLN64); 334f4a3eb02SAdrian Chadd caps->boot_rom = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_ROM); 335f4a3eb02SAdrian Chadd caps->pmu = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_PMU); 336f4a3eb02SAdrian Chadd caps->eci = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_ECI); 337f4a3eb02SAdrian Chadd caps->sprom = CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_SPROM); 338f4a3eb02SAdrian Chadd caps->otp_size = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_OTP_SIZE); 339f4a3eb02SAdrian Chadd 340f4a3eb02SAdrian Chadd caps->seci = CHIPC_GET_FLAG(cap_ext_reg, CHIPC_CAP2_SECI); 341f4a3eb02SAdrian Chadd caps->gsio = CHIPC_GET_FLAG(cap_ext_reg, CHIPC_CAP2_GSIO); 342f4a3eb02SAdrian Chadd caps->aob = CHIPC_GET_FLAG(cap_ext_reg, CHIPC_CAP2_AOB); 343f4a3eb02SAdrian Chadd 344f4a3eb02SAdrian Chadd /* Fetch OTP size for later IPX controller revisions */ 345f4a3eb02SAdrian Chadd if (CHIPC_QUIRK(sc, IPX_OTPLAYOUT_SIZE)) { 346f4a3eb02SAdrian Chadd regval = bhnd_bus_read_4(sc->core, CHIPC_OTPLAYOUT); 347f4a3eb02SAdrian Chadd caps->otp_size = CHIPC_GET_BITS(regval, CHIPC_OTPL_SIZE); 3484ad7e9b0SAdrian Chadd } 3494ad7e9b0SAdrian Chadd 3505ad9ac03SAdrian Chadd /* Determine flash type and parameters */ 351f4a3eb02SAdrian Chadd caps->cfi_width = 0; 352f4a3eb02SAdrian Chadd 353f4a3eb02SAdrian Chadd switch (CHIPC_GET_BITS(cap_reg, CHIPC_CAP_FLASH)) { 354f4a3eb02SAdrian Chadd case CHIPC_CAP_SFLASH_ST: 355f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_SFLASH_ST; 356f4a3eb02SAdrian Chadd break; 357f4a3eb02SAdrian Chadd case CHIPC_CAP_SFLASH_AT: 358f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_SFLASH_AT; 359f4a3eb02SAdrian Chadd break; 360f4a3eb02SAdrian Chadd case CHIPC_CAP_NFLASH: 361f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_NFLASH; 362f4a3eb02SAdrian Chadd break; 363f4a3eb02SAdrian Chadd case CHIPC_CAP_PFLASH: 364f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_PFLASH_CFI; 365f4a3eb02SAdrian Chadd 366f4a3eb02SAdrian Chadd /* determine cfi width */ 367f4a3eb02SAdrian Chadd regval = bhnd_bus_read_4(sc->core, CHIPC_FLASH_CFG); 368f4a3eb02SAdrian Chadd if (CHIPC_GET_FLAG(regval, CHIPC_FLASH_CFG_DS)) 369f4a3eb02SAdrian Chadd caps->cfi_width = 2; 370f4a3eb02SAdrian Chadd else 371f4a3eb02SAdrian Chadd caps->cfi_width = 1; 372f4a3eb02SAdrian Chadd 373f4a3eb02SAdrian Chadd break; 374f4a3eb02SAdrian Chadd case CHIPC_CAP_FLASH_NONE: 375f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_FLASH_NONE; 376f4a3eb02SAdrian Chadd break; 377f4a3eb02SAdrian Chadd 378f4a3eb02SAdrian Chadd } 379f4a3eb02SAdrian Chadd 380f4a3eb02SAdrian Chadd /* Handle 4706_NFLASH fallback */ 381f4a3eb02SAdrian Chadd if (CHIPC_QUIRK(sc, 4706_NFLASH) && 382f4a3eb02SAdrian Chadd CHIPC_GET_FLAG(cap_reg, CHIPC_CAP_4706_NFLASH)) 3834ad7e9b0SAdrian Chadd { 384f4a3eb02SAdrian Chadd caps->flash_type = CHIPC_NFLASH_4706; 385f4a3eb02SAdrian Chadd } 386f4a3eb02SAdrian Chadd 3874ad7e9b0SAdrian Chadd return (0); 3884ad7e9b0SAdrian Chadd } 3894ad7e9b0SAdrian Chadd 3904ad7e9b0SAdrian Chadd /** 391e83ce340SAdrian Chadd * Determine the NVRAM data source for this device. 392e83ce340SAdrian Chadd * 393e83ce340SAdrian Chadd * @param sc chipc driver state. 3944ad7e9b0SAdrian Chadd */ 3954ad7e9b0SAdrian Chadd static bhnd_nvram_src_t 396e83ce340SAdrian Chadd chipc_nvram_identify(struct chipc_softc *sc) 3974ad7e9b0SAdrian Chadd { 3984ad7e9b0SAdrian Chadd uint32_t srom_ctrl; 3994ad7e9b0SAdrian Chadd 400e83ce340SAdrian Chadd /* Very early devices vend SPROM/OTP/CIS (if at all) via the 401e83ce340SAdrian Chadd * host bridge interface instead of ChipCommon. */ 402e83ce340SAdrian Chadd if (!CHIPC_QUIRK(sc, SUPPORTS_SPROM)) 403e83ce340SAdrian Chadd return (BHND_NVRAM_SRC_UNKNOWN); 4044ad7e9b0SAdrian Chadd 4054ad7e9b0SAdrian Chadd /* 406e83ce340SAdrian Chadd * Later chipset revisions standardized the SPROM capability flags and 4074ad7e9b0SAdrian Chadd * register interfaces. 4084ad7e9b0SAdrian Chadd * 4094ad7e9b0SAdrian Chadd * We check for hardware presence in order of precedence. For example, 4104ad7e9b0SAdrian Chadd * SPROM is is always used in preference to internal OTP if found. 4114ad7e9b0SAdrian Chadd */ 412f4a3eb02SAdrian Chadd if (CHIPC_CAP(sc, sprom)) { 4134ad7e9b0SAdrian Chadd srom_ctrl = bhnd_bus_read_4(sc->core, CHIPC_SPROM_CTRL); 4144ad7e9b0SAdrian Chadd if (srom_ctrl & CHIPC_SRC_PRESENT) 4154ad7e9b0SAdrian Chadd return (BHND_NVRAM_SRC_SPROM); 4164ad7e9b0SAdrian Chadd } 4174ad7e9b0SAdrian Chadd 4184ad7e9b0SAdrian Chadd /* Check for OTP */ 419f4a3eb02SAdrian Chadd if (CHIPC_CAP(sc, otp_size) != 0) 4204ad7e9b0SAdrian Chadd return (BHND_NVRAM_SRC_OTP); 4214ad7e9b0SAdrian Chadd 422f4a3eb02SAdrian Chadd /* Check for flash */ 423f4a3eb02SAdrian Chadd if (CHIPC_CAP(sc, flash_type) != CHIPC_FLASH_NONE) 424f4a3eb02SAdrian Chadd return (BHND_NVRAM_SRC_FLASH); 4254ad7e9b0SAdrian Chadd 4264ad7e9b0SAdrian Chadd /* No NVRAM hardware capability declared */ 427e83ce340SAdrian Chadd return (BHND_NVRAM_SRC_UNKNOWN); 428e83ce340SAdrian Chadd } 429e83ce340SAdrian Chadd 430f4a3eb02SAdrian Chadd static int 431f4a3eb02SAdrian Chadd chipc_suspend(device_t dev) 432f4a3eb02SAdrian Chadd { 433f4a3eb02SAdrian Chadd return (bus_generic_suspend(dev)); 434f4a3eb02SAdrian Chadd } 435f4a3eb02SAdrian Chadd 436f4a3eb02SAdrian Chadd static int 437f4a3eb02SAdrian Chadd chipc_resume(device_t dev) 438f4a3eb02SAdrian Chadd { 439f4a3eb02SAdrian Chadd return (bus_generic_resume(dev)); 440f4a3eb02SAdrian Chadd } 441f4a3eb02SAdrian Chadd 442f4a3eb02SAdrian Chadd static void 443f4a3eb02SAdrian Chadd chipc_probe_nomatch(device_t dev, device_t child) 444f4a3eb02SAdrian Chadd { 445f4a3eb02SAdrian Chadd struct resource_list *rl; 446f4a3eb02SAdrian Chadd const char *name; 447f4a3eb02SAdrian Chadd 448f4a3eb02SAdrian Chadd name = device_get_name(child); 449f4a3eb02SAdrian Chadd if (name == NULL) 450f4a3eb02SAdrian Chadd name = "unknown device"; 451f4a3eb02SAdrian Chadd 452f4a3eb02SAdrian Chadd device_printf(dev, "<%s> at", name); 453f4a3eb02SAdrian Chadd 454f4a3eb02SAdrian Chadd rl = BUS_GET_RESOURCE_LIST(dev, child); 455f4a3eb02SAdrian Chadd if (rl != NULL) { 456f4a3eb02SAdrian Chadd resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); 457f4a3eb02SAdrian Chadd resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); 458f4a3eb02SAdrian Chadd } 459f4a3eb02SAdrian Chadd 460f4a3eb02SAdrian Chadd printf(" (no driver attached)\n"); 461f4a3eb02SAdrian Chadd } 462f4a3eb02SAdrian Chadd 463f4a3eb02SAdrian Chadd static int 464f4a3eb02SAdrian Chadd chipc_print_child(device_t dev, device_t child) 465f4a3eb02SAdrian Chadd { 466f4a3eb02SAdrian Chadd struct resource_list *rl; 467f4a3eb02SAdrian Chadd int retval = 0; 468f4a3eb02SAdrian Chadd 469f4a3eb02SAdrian Chadd retval += bus_print_child_header(dev, child); 470f4a3eb02SAdrian Chadd 471f4a3eb02SAdrian Chadd rl = BUS_GET_RESOURCE_LIST(dev, child); 472f4a3eb02SAdrian Chadd if (rl != NULL) { 473f4a3eb02SAdrian Chadd retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, 474f4a3eb02SAdrian Chadd "%#jx"); 475f4a3eb02SAdrian Chadd retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, 476f4a3eb02SAdrian Chadd "%jd"); 477f4a3eb02SAdrian Chadd } 478f4a3eb02SAdrian Chadd 479f4a3eb02SAdrian Chadd retval += bus_print_child_domain(dev, child); 480f4a3eb02SAdrian Chadd retval += bus_print_child_footer(dev, child); 481f4a3eb02SAdrian Chadd 482f4a3eb02SAdrian Chadd return (retval); 483f4a3eb02SAdrian Chadd } 484f4a3eb02SAdrian Chadd 485f4a3eb02SAdrian Chadd static int 486f4a3eb02SAdrian Chadd chipc_child_pnpinfo_str(device_t dev, device_t child, char *buf, 487f4a3eb02SAdrian Chadd size_t buflen) 488f4a3eb02SAdrian Chadd { 489f4a3eb02SAdrian Chadd if (buflen == 0) 490f4a3eb02SAdrian Chadd return (EOVERFLOW); 491f4a3eb02SAdrian Chadd 492f4a3eb02SAdrian Chadd *buf = '\0'; 493f4a3eb02SAdrian Chadd return (0); 494f4a3eb02SAdrian Chadd } 495f4a3eb02SAdrian Chadd 496f4a3eb02SAdrian Chadd static int 497f4a3eb02SAdrian Chadd chipc_child_location_str(device_t dev, device_t child, char *buf, 498f4a3eb02SAdrian Chadd size_t buflen) 499f4a3eb02SAdrian Chadd { 500f4a3eb02SAdrian Chadd if (buflen == 0) 501f4a3eb02SAdrian Chadd return (EOVERFLOW); 502f4a3eb02SAdrian Chadd 503f4a3eb02SAdrian Chadd *buf = '\0'; 504f4a3eb02SAdrian Chadd return (ENXIO); 505f4a3eb02SAdrian Chadd } 506f4a3eb02SAdrian Chadd 507f4a3eb02SAdrian Chadd static device_t 508f4a3eb02SAdrian Chadd chipc_add_child(device_t dev, u_int order, const char *name, int unit) 509f4a3eb02SAdrian Chadd { 510f4a3eb02SAdrian Chadd struct chipc_devinfo *dinfo; 511785df0cbSAdrian Chadd const struct chipc_hint *hint; 512f4a3eb02SAdrian Chadd device_t child; 5132b693a88SLandon J. Fuller devclass_t child_dc; 514785df0cbSAdrian Chadd int error; 5152b693a88SLandon J. Fuller int busrel_unit; 516f4a3eb02SAdrian Chadd 517f4a3eb02SAdrian Chadd child = device_add_child_ordered(dev, order, name, unit); 518f4a3eb02SAdrian Chadd if (child == NULL) 519f4a3eb02SAdrian Chadd return (NULL); 520f4a3eb02SAdrian Chadd 5212b693a88SLandon J. Fuller /* system-wide device unit */ 5222b693a88SLandon J. Fuller unit = device_get_unit(child); 5232b693a88SLandon J. Fuller child_dc = device_get_devclass(child); 5242b693a88SLandon J. Fuller 5252b693a88SLandon J. Fuller busrel_unit = 0; 5262b693a88SLandon J. Fuller for (int i = 0; i < unit; i++) { 5272b693a88SLandon J. Fuller device_t tmp; 5282b693a88SLandon J. Fuller 5292b693a88SLandon J. Fuller tmp = devclass_get_device(child_dc, i); 5302b693a88SLandon J. Fuller if (tmp != NULL && (device_get_parent(tmp) == dev)) 5312b693a88SLandon J. Fuller busrel_unit++; 5322b693a88SLandon J. Fuller } 5332b693a88SLandon J. Fuller 5342b693a88SLandon J. Fuller /* bus-wide device unit (override unit for further hint matching) */ 5352b693a88SLandon J. Fuller unit = busrel_unit; 5362b693a88SLandon J. Fuller 537f4a3eb02SAdrian Chadd dinfo = malloc(sizeof(struct chipc_devinfo), M_BHND, M_NOWAIT); 538f4a3eb02SAdrian Chadd if (dinfo == NULL) { 539f4a3eb02SAdrian Chadd device_delete_child(dev, child); 540f4a3eb02SAdrian Chadd return (NULL); 541f4a3eb02SAdrian Chadd } 542f4a3eb02SAdrian Chadd 543f4a3eb02SAdrian Chadd resource_list_init(&dinfo->resources); 544f4a3eb02SAdrian Chadd device_set_ivars(child, dinfo); 545f4a3eb02SAdrian Chadd 546785df0cbSAdrian Chadd /* Hint matching requires a device name */ 547785df0cbSAdrian Chadd if (name == NULL) 548f4a3eb02SAdrian Chadd return (child); 549785df0cbSAdrian Chadd 550785df0cbSAdrian Chadd /* Use hint table to set child resources */ 551785df0cbSAdrian Chadd for (hint = chipc_hints; hint->name != NULL; hint++) { 552785df0cbSAdrian Chadd bhnd_addr_t region_addr; 553785df0cbSAdrian Chadd bhnd_size_t region_size; 554785df0cbSAdrian Chadd 5552b693a88SLandon J. Fuller /* Check device name */ 556785df0cbSAdrian Chadd if (strcmp(hint->name, name) != 0) 557785df0cbSAdrian Chadd continue; 558785df0cbSAdrian Chadd 5592b693a88SLandon J. Fuller /* Check device unit */ 5602b693a88SLandon J. Fuller if (hint->unit >= 0 && unit != hint->unit) 5612b693a88SLandon J. Fuller continue; 5622b693a88SLandon J. Fuller 563785df0cbSAdrian Chadd switch (hint->type) { 564785df0cbSAdrian Chadd case SYS_RES_IRQ: 565785df0cbSAdrian Chadd /* Add child resource */ 566785df0cbSAdrian Chadd error = bus_set_resource(child, hint->type, hint->rid, 567785df0cbSAdrian Chadd hint->base, hint->size); 568785df0cbSAdrian Chadd if (error) { 569785df0cbSAdrian Chadd device_printf(dev, 570785df0cbSAdrian Chadd "bus_set_resource() failed for %s: %d\n", 571785df0cbSAdrian Chadd device_get_nameunit(child), error); 572785df0cbSAdrian Chadd goto failed; 573785df0cbSAdrian Chadd } 574785df0cbSAdrian Chadd break; 575785df0cbSAdrian Chadd 576785df0cbSAdrian Chadd case SYS_RES_MEMORY: 577785df0cbSAdrian Chadd /* Fetch region address and size */ 578785df0cbSAdrian Chadd error = bhnd_get_region_addr(dev, BHND_PORT_DEVICE, 579785df0cbSAdrian Chadd hint->port, hint->region, ®ion_addr, 580785df0cbSAdrian Chadd ®ion_size); 581785df0cbSAdrian Chadd if (error) { 582785df0cbSAdrian Chadd device_printf(dev, 583785df0cbSAdrian Chadd "lookup of %s%u.%u failed: %d\n", 584785df0cbSAdrian Chadd bhnd_port_type_name(BHND_PORT_DEVICE), 585785df0cbSAdrian Chadd hint->port, hint->region, error); 586785df0cbSAdrian Chadd goto failed; 587785df0cbSAdrian Chadd } 588785df0cbSAdrian Chadd 589785df0cbSAdrian Chadd /* Verify requested range is mappable */ 590785df0cbSAdrian Chadd if (hint->base > region_size || 5912b693a88SLandon J. Fuller (hint->size != RM_MAX_END && 5922b693a88SLandon J. Fuller (hint->size > region_size || 5932b693a88SLandon J. Fuller region_size - hint->base < hint->size ))) 594785df0cbSAdrian Chadd { 595785df0cbSAdrian Chadd device_printf(dev, 596785df0cbSAdrian Chadd "%s%u.%u region cannot map requested range " 597785df0cbSAdrian Chadd "%#jx+%#jx\n", 598785df0cbSAdrian Chadd bhnd_port_type_name(BHND_PORT_DEVICE), 599785df0cbSAdrian Chadd hint->port, hint->region, hint->base, 600785df0cbSAdrian Chadd hint->size); 601785df0cbSAdrian Chadd } 602785df0cbSAdrian Chadd 6032b693a88SLandon J. Fuller /* 6042b693a88SLandon J. Fuller * Add child resource. If hint doesn't define the end 6052b693a88SLandon J. Fuller * of resource window (RX_MAX_END), use end of region. 6062b693a88SLandon J. Fuller */ 6072b693a88SLandon J. Fuller 6082b693a88SLandon J. Fuller error = bus_set_resource(child, 6092b693a88SLandon J. Fuller hint->type, 6102b693a88SLandon J. Fuller hint->rid, region_addr + hint->base, 6112b693a88SLandon J. Fuller (hint->size == RM_MAX_END) ? 6122b693a88SLandon J. Fuller region_size - hint->base : 6132b693a88SLandon J. Fuller hint->size); 614785df0cbSAdrian Chadd if (error) { 615785df0cbSAdrian Chadd device_printf(dev, 616785df0cbSAdrian Chadd "bus_set_resource() failed for %s: %d\n", 617785df0cbSAdrian Chadd device_get_nameunit(child), error); 618785df0cbSAdrian Chadd goto failed; 619785df0cbSAdrian Chadd } 620785df0cbSAdrian Chadd break; 621785df0cbSAdrian Chadd default: 622785df0cbSAdrian Chadd device_printf(child, "unknown hint resource type: %d\n", 623785df0cbSAdrian Chadd hint->type); 624785df0cbSAdrian Chadd break; 625785df0cbSAdrian Chadd } 626785df0cbSAdrian Chadd } 627785df0cbSAdrian Chadd 628785df0cbSAdrian Chadd return (child); 629785df0cbSAdrian Chadd 630785df0cbSAdrian Chadd failed: 631785df0cbSAdrian Chadd device_delete_child(dev, child); 632785df0cbSAdrian Chadd return (NULL); 633f4a3eb02SAdrian Chadd } 634f4a3eb02SAdrian Chadd 635f4a3eb02SAdrian Chadd static void 636f4a3eb02SAdrian Chadd chipc_child_deleted(device_t dev, device_t child) 637f4a3eb02SAdrian Chadd { 638f4a3eb02SAdrian Chadd struct chipc_devinfo *dinfo = device_get_ivars(child); 639f4a3eb02SAdrian Chadd 640f4a3eb02SAdrian Chadd if (dinfo != NULL) { 641f4a3eb02SAdrian Chadd resource_list_free(&dinfo->resources); 642f4a3eb02SAdrian Chadd free(dinfo, M_BHND); 643f4a3eb02SAdrian Chadd } 644f4a3eb02SAdrian Chadd 645f4a3eb02SAdrian Chadd device_set_ivars(child, NULL); 646f4a3eb02SAdrian Chadd } 647f4a3eb02SAdrian Chadd 648f4a3eb02SAdrian Chadd static struct resource_list * 649f4a3eb02SAdrian Chadd chipc_get_resource_list(device_t dev, device_t child) 650f4a3eb02SAdrian Chadd { 651f4a3eb02SAdrian Chadd struct chipc_devinfo *dinfo = device_get_ivars(child); 652f4a3eb02SAdrian Chadd return (&dinfo->resources); 653f4a3eb02SAdrian Chadd } 654f4a3eb02SAdrian Chadd 655f4a3eb02SAdrian Chadd 656f4a3eb02SAdrian Chadd /* Allocate region records for the given port, and add the port's memory 657f4a3eb02SAdrian Chadd * range to the mem_rman */ 658f4a3eb02SAdrian Chadd static int 659f4a3eb02SAdrian Chadd chipc_rman_init_regions (struct chipc_softc *sc, bhnd_port_type type, 660f4a3eb02SAdrian Chadd u_int port) 661f4a3eb02SAdrian Chadd { 662f4a3eb02SAdrian Chadd struct chipc_region *cr; 663f4a3eb02SAdrian Chadd rman_res_t start, end; 664f4a3eb02SAdrian Chadd u_int num_regions; 665f4a3eb02SAdrian Chadd int error; 666f4a3eb02SAdrian Chadd 667f4a3eb02SAdrian Chadd num_regions = bhnd_get_region_count(sc->dev, port, port); 668f4a3eb02SAdrian Chadd for (u_int region = 0; region < num_regions; region++) { 669f4a3eb02SAdrian Chadd /* Allocate new region record */ 670f4a3eb02SAdrian Chadd cr = chipc_alloc_region(sc, type, port, region); 671f4a3eb02SAdrian Chadd if (cr == NULL) 672f4a3eb02SAdrian Chadd return (ENODEV); 673f4a3eb02SAdrian Chadd 674f4a3eb02SAdrian Chadd /* Can't manage regions that cannot be allocated */ 675f4a3eb02SAdrian Chadd if (cr->cr_rid < 0) { 676f4a3eb02SAdrian Chadd BHND_DEBUG_DEV(sc->dev, "no rid for chipc region " 677f4a3eb02SAdrian Chadd "%s%u.%u", bhnd_port_type_name(type), port, region); 678f4a3eb02SAdrian Chadd chipc_free_region(sc, cr); 679f4a3eb02SAdrian Chadd continue; 680f4a3eb02SAdrian Chadd } 681f4a3eb02SAdrian Chadd 682f4a3eb02SAdrian Chadd /* Add to rman's managed range */ 683f4a3eb02SAdrian Chadd start = cr->cr_addr; 684f4a3eb02SAdrian Chadd end = cr->cr_end; 685f4a3eb02SAdrian Chadd if ((error = rman_manage_region(&sc->mem_rman, start, end))) { 686f4a3eb02SAdrian Chadd chipc_free_region(sc, cr); 687f4a3eb02SAdrian Chadd return (error); 688f4a3eb02SAdrian Chadd } 689f4a3eb02SAdrian Chadd 690f4a3eb02SAdrian Chadd /* Add to region list */ 691f4a3eb02SAdrian Chadd STAILQ_INSERT_TAIL(&sc->mem_regions, cr, cr_link); 692f4a3eb02SAdrian Chadd } 693f4a3eb02SAdrian Chadd 694f4a3eb02SAdrian Chadd return (0); 695f4a3eb02SAdrian Chadd } 696f4a3eb02SAdrian Chadd 697f4a3eb02SAdrian Chadd /* Initialize memory state for all chipc port regions */ 698f4a3eb02SAdrian Chadd static int 699f4a3eb02SAdrian Chadd chipc_init_rman(struct chipc_softc *sc) 700f4a3eb02SAdrian Chadd { 701f4a3eb02SAdrian Chadd u_int num_ports; 702f4a3eb02SAdrian Chadd int error; 703f4a3eb02SAdrian Chadd 704f4a3eb02SAdrian Chadd /* Port types for which we'll register chipc_region mappings */ 705f4a3eb02SAdrian Chadd bhnd_port_type types[] = { 706f4a3eb02SAdrian Chadd BHND_PORT_DEVICE 707f4a3eb02SAdrian Chadd }; 708f4a3eb02SAdrian Chadd 709f4a3eb02SAdrian Chadd /* Initialize resource manager */ 710f4a3eb02SAdrian Chadd sc->mem_rman.rm_start = 0; 711f4a3eb02SAdrian Chadd sc->mem_rman.rm_end = BUS_SPACE_MAXADDR; 712f4a3eb02SAdrian Chadd sc->mem_rman.rm_type = RMAN_ARRAY; 713f4a3eb02SAdrian Chadd sc->mem_rman.rm_descr = "ChipCommon Device Memory"; 714f4a3eb02SAdrian Chadd if ((error = rman_init(&sc->mem_rman))) { 715f4a3eb02SAdrian Chadd device_printf(sc->dev, "could not initialize mem_rman: %d\n", 716f4a3eb02SAdrian Chadd error); 717f4a3eb02SAdrian Chadd return (error); 718f4a3eb02SAdrian Chadd } 719f4a3eb02SAdrian Chadd 720f4a3eb02SAdrian Chadd /* Populate per-port-region state */ 721f4a3eb02SAdrian Chadd for (u_int i = 0; i < nitems(types); i++) { 722f4a3eb02SAdrian Chadd num_ports = bhnd_get_port_count(sc->dev, types[i]); 723f4a3eb02SAdrian Chadd for (u_int port = 0; port < num_ports; port++) { 724f4a3eb02SAdrian Chadd error = chipc_rman_init_regions(sc, types[i], port); 725f4a3eb02SAdrian Chadd if (error) { 726f4a3eb02SAdrian Chadd device_printf(sc->dev, 727f4a3eb02SAdrian Chadd "region init failed for %s%u: %d\n", 728f4a3eb02SAdrian Chadd bhnd_port_type_name(types[i]), port, 729f4a3eb02SAdrian Chadd error); 730f4a3eb02SAdrian Chadd 731f4a3eb02SAdrian Chadd goto failed; 732f4a3eb02SAdrian Chadd } 733f4a3eb02SAdrian Chadd } 734f4a3eb02SAdrian Chadd } 735f4a3eb02SAdrian Chadd 736f4a3eb02SAdrian Chadd return (0); 737f4a3eb02SAdrian Chadd 738f4a3eb02SAdrian Chadd failed: 739f4a3eb02SAdrian Chadd chipc_free_rman(sc); 740f4a3eb02SAdrian Chadd return (error); 741f4a3eb02SAdrian Chadd } 742f4a3eb02SAdrian Chadd 743f4a3eb02SAdrian Chadd /* Free memory management state */ 744f4a3eb02SAdrian Chadd static void 745f4a3eb02SAdrian Chadd chipc_free_rman(struct chipc_softc *sc) 746f4a3eb02SAdrian Chadd { 747f4a3eb02SAdrian Chadd struct chipc_region *cr, *cr_next; 748f4a3eb02SAdrian Chadd 749f4a3eb02SAdrian Chadd STAILQ_FOREACH_SAFE(cr, &sc->mem_regions, cr_link, cr_next) 750f4a3eb02SAdrian Chadd chipc_free_region(sc, cr); 751f4a3eb02SAdrian Chadd 752f4a3eb02SAdrian Chadd rman_fini(&sc->mem_rman); 753f4a3eb02SAdrian Chadd } 754f4a3eb02SAdrian Chadd 755f4a3eb02SAdrian Chadd /** 756f4a3eb02SAdrian Chadd * Return the rman instance for a given resource @p type, if any. 757f4a3eb02SAdrian Chadd * 758f4a3eb02SAdrian Chadd * @param sc The chipc device state. 759f4a3eb02SAdrian Chadd * @param type The resource type (e.g. SYS_RES_MEMORY, SYS_RES_IRQ, ...) 760f4a3eb02SAdrian Chadd */ 761f4a3eb02SAdrian Chadd static struct rman * 762f4a3eb02SAdrian Chadd chipc_get_rman(struct chipc_softc *sc, int type) 763f4a3eb02SAdrian Chadd { 764f4a3eb02SAdrian Chadd switch (type) { 765f4a3eb02SAdrian Chadd case SYS_RES_MEMORY: 766f4a3eb02SAdrian Chadd return (&sc->mem_rman); 767f4a3eb02SAdrian Chadd 768f4a3eb02SAdrian Chadd case SYS_RES_IRQ: 769f4a3eb02SAdrian Chadd /* IRQs can be used with RF_SHAREABLE, so we don't perform 770f4a3eb02SAdrian Chadd * any local proxying of resource requests. */ 771f4a3eb02SAdrian Chadd return (NULL); 772f4a3eb02SAdrian Chadd 773f4a3eb02SAdrian Chadd default: 774f4a3eb02SAdrian Chadd return (NULL); 775f4a3eb02SAdrian Chadd }; 776f4a3eb02SAdrian Chadd } 777f4a3eb02SAdrian Chadd 778f4a3eb02SAdrian Chadd static struct resource * 779f4a3eb02SAdrian Chadd chipc_alloc_resource(device_t dev, device_t child, int type, 780f4a3eb02SAdrian Chadd int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 781f4a3eb02SAdrian Chadd { 782f4a3eb02SAdrian Chadd struct chipc_softc *sc; 783f4a3eb02SAdrian Chadd struct chipc_region *cr; 784f4a3eb02SAdrian Chadd struct resource_list_entry *rle; 785f4a3eb02SAdrian Chadd struct resource *rv; 786f4a3eb02SAdrian Chadd struct rman *rm; 787f4a3eb02SAdrian Chadd int error; 788f4a3eb02SAdrian Chadd bool passthrough, isdefault; 789f4a3eb02SAdrian Chadd 790f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 791f4a3eb02SAdrian Chadd passthrough = (device_get_parent(child) != dev); 792f4a3eb02SAdrian Chadd isdefault = RMAN_IS_DEFAULT_RANGE(start, end); 793f4a3eb02SAdrian Chadd rle = NULL; 794f4a3eb02SAdrian Chadd 795f4a3eb02SAdrian Chadd /* Fetch the resource manager, delegate request if necessary */ 796f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 797f4a3eb02SAdrian Chadd if (rm == NULL) { 798f4a3eb02SAdrian Chadd /* Requested resource type is delegated to our parent */ 799f4a3eb02SAdrian Chadd rv = bus_generic_rl_alloc_resource(dev, child, type, rid, 800f4a3eb02SAdrian Chadd start, end, count, flags); 801f4a3eb02SAdrian Chadd return (rv); 802f4a3eb02SAdrian Chadd } 803f4a3eb02SAdrian Chadd 804f4a3eb02SAdrian Chadd /* Populate defaults */ 805f4a3eb02SAdrian Chadd if (!passthrough && isdefault) { 806f4a3eb02SAdrian Chadd /* Fetch the resource list entry. */ 807f4a3eb02SAdrian Chadd rle = resource_list_find(BUS_GET_RESOURCE_LIST(dev, child), 808f4a3eb02SAdrian Chadd type, *rid); 809f4a3eb02SAdrian Chadd if (rle == NULL) { 810f4a3eb02SAdrian Chadd device_printf(dev, 811f4a3eb02SAdrian Chadd "default resource %#x type %d for child %s " 812f4a3eb02SAdrian Chadd "not found\n", *rid, type, 813f4a3eb02SAdrian Chadd device_get_nameunit(child)); 814f4a3eb02SAdrian Chadd return (NULL); 815f4a3eb02SAdrian Chadd } 816f4a3eb02SAdrian Chadd 817f4a3eb02SAdrian Chadd if (rle->res != NULL) { 818f4a3eb02SAdrian Chadd device_printf(dev, 8192b693a88SLandon J. Fuller "resource entry %#x type %d for child %s is busy " 8202b693a88SLandon J. Fuller "[%d]\n", 8212b693a88SLandon J. Fuller *rid, type, device_get_nameunit(child), 8222b693a88SLandon J. Fuller rman_get_flags(rle->res)); 823f4a3eb02SAdrian Chadd 824f4a3eb02SAdrian Chadd return (NULL); 825f4a3eb02SAdrian Chadd } 826f4a3eb02SAdrian Chadd 827f4a3eb02SAdrian Chadd start = rle->start; 828f4a3eb02SAdrian Chadd end = rle->end; 829f4a3eb02SAdrian Chadd count = ulmax(count, rle->count); 830f4a3eb02SAdrian Chadd } 831f4a3eb02SAdrian Chadd 832f4a3eb02SAdrian Chadd /* Locate a mapping region */ 833f4a3eb02SAdrian Chadd if ((cr = chipc_find_region(sc, start, end)) == NULL) { 834f4a3eb02SAdrian Chadd /* Resource requests outside our shared port regions can be 835f4a3eb02SAdrian Chadd * delegated to our parent. */ 836f4a3eb02SAdrian Chadd rv = bus_generic_rl_alloc_resource(dev, child, type, rid, 837f4a3eb02SAdrian Chadd start, end, count, flags); 838f4a3eb02SAdrian Chadd return (rv); 839f4a3eb02SAdrian Chadd } 840f4a3eb02SAdrian Chadd 841f4a3eb02SAdrian Chadd /* Try to retain a region reference */ 842f4a3eb02SAdrian Chadd if ((error = chipc_retain_region(sc, cr, RF_ALLOCATED))) { 843f4a3eb02SAdrian Chadd CHIPC_UNLOCK(sc); 844f4a3eb02SAdrian Chadd return (NULL); 845f4a3eb02SAdrian Chadd } 846f4a3eb02SAdrian Chadd 847f4a3eb02SAdrian Chadd /* Make our rman reservation */ 848f4a3eb02SAdrian Chadd rv = rman_reserve_resource(rm, start, end, count, flags & ~RF_ACTIVE, 849f4a3eb02SAdrian Chadd child); 850f4a3eb02SAdrian Chadd if (rv == NULL) { 851f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ALLOCATED); 852f4a3eb02SAdrian Chadd return (NULL); 853f4a3eb02SAdrian Chadd } 854f4a3eb02SAdrian Chadd 855f4a3eb02SAdrian Chadd rman_set_rid(rv, *rid); 856f4a3eb02SAdrian Chadd 857f4a3eb02SAdrian Chadd /* Activate */ 858f4a3eb02SAdrian Chadd if (flags & RF_ACTIVE) { 859f4a3eb02SAdrian Chadd error = bus_activate_resource(child, type, *rid, rv); 860f4a3eb02SAdrian Chadd if (error) { 861f4a3eb02SAdrian Chadd device_printf(dev, 862f4a3eb02SAdrian Chadd "failed to activate entry %#x type %d for " 863f4a3eb02SAdrian Chadd "child %s: %d\n", 864f4a3eb02SAdrian Chadd *rid, type, device_get_nameunit(child), error); 865f4a3eb02SAdrian Chadd 866f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ALLOCATED); 867f4a3eb02SAdrian Chadd rman_release_resource(rv); 868f4a3eb02SAdrian Chadd 869f4a3eb02SAdrian Chadd return (NULL); 870f4a3eb02SAdrian Chadd } 871f4a3eb02SAdrian Chadd } 872f4a3eb02SAdrian Chadd 873f4a3eb02SAdrian Chadd /* Update child's resource list entry */ 874f4a3eb02SAdrian Chadd if (rle != NULL) { 875f4a3eb02SAdrian Chadd rle->res = rv; 876f4a3eb02SAdrian Chadd rle->start = rman_get_start(rv); 877f4a3eb02SAdrian Chadd rle->end = rman_get_end(rv); 878f4a3eb02SAdrian Chadd rle->count = rman_get_size(rv); 879f4a3eb02SAdrian Chadd } 880f4a3eb02SAdrian Chadd 881f4a3eb02SAdrian Chadd return (rv); 882f4a3eb02SAdrian Chadd } 883f4a3eb02SAdrian Chadd 884f4a3eb02SAdrian Chadd static int 885f4a3eb02SAdrian Chadd chipc_release_resource(device_t dev, device_t child, int type, int rid, 886f4a3eb02SAdrian Chadd struct resource *r) 887f4a3eb02SAdrian Chadd { 888f4a3eb02SAdrian Chadd struct chipc_softc *sc; 889f4a3eb02SAdrian Chadd struct chipc_region *cr; 890f4a3eb02SAdrian Chadd struct rman *rm; 8912b693a88SLandon J. Fuller struct resource_list_entry *rle; 892f4a3eb02SAdrian Chadd int error; 893f4a3eb02SAdrian Chadd 894f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 895f4a3eb02SAdrian Chadd 896f4a3eb02SAdrian Chadd /* Handled by parent bus? */ 897f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 898f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 899f4a3eb02SAdrian Chadd return (bus_generic_rl_release_resource(dev, child, type, rid, 900f4a3eb02SAdrian Chadd r)); 901f4a3eb02SAdrian Chadd } 902f4a3eb02SAdrian Chadd 903f4a3eb02SAdrian Chadd /* Locate the mapping region */ 904f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, rman_get_start(r), rman_get_end(r)); 905f4a3eb02SAdrian Chadd if (cr == NULL) 906f4a3eb02SAdrian Chadd return (EINVAL); 907f4a3eb02SAdrian Chadd 908f4a3eb02SAdrian Chadd /* Deactivate resources */ 909f4a3eb02SAdrian Chadd if (rman_get_flags(r) & RF_ACTIVE) { 910f4a3eb02SAdrian Chadd error = BUS_DEACTIVATE_RESOURCE(dev, child, type, rid, r); 911f4a3eb02SAdrian Chadd if (error) 912f4a3eb02SAdrian Chadd return (error); 913f4a3eb02SAdrian Chadd } 914f4a3eb02SAdrian Chadd 915f4a3eb02SAdrian Chadd if ((error = rman_release_resource(r))) 916f4a3eb02SAdrian Chadd return (error); 917f4a3eb02SAdrian Chadd 918f4a3eb02SAdrian Chadd /* Drop allocation reference */ 919f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ALLOCATED); 920f4a3eb02SAdrian Chadd 9212b693a88SLandon J. Fuller /* Clear reference from the resource list entry if exists */ 9222b693a88SLandon J. Fuller rle = resource_list_find(BUS_GET_RESOURCE_LIST(dev, child), type, rid); 9232b693a88SLandon J. Fuller if (rle != NULL) 9242b693a88SLandon J. Fuller rle->res = NULL; 9252b693a88SLandon J. Fuller 926f4a3eb02SAdrian Chadd return (0); 927f4a3eb02SAdrian Chadd } 928f4a3eb02SAdrian Chadd 929f4a3eb02SAdrian Chadd static int 930f4a3eb02SAdrian Chadd chipc_adjust_resource(device_t dev, device_t child, int type, 931f4a3eb02SAdrian Chadd struct resource *r, rman_res_t start, rman_res_t end) 932f4a3eb02SAdrian Chadd { 933f4a3eb02SAdrian Chadd struct chipc_softc *sc; 934f4a3eb02SAdrian Chadd struct chipc_region *cr; 935f4a3eb02SAdrian Chadd struct rman *rm; 936f4a3eb02SAdrian Chadd 937f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 938f4a3eb02SAdrian Chadd 939f4a3eb02SAdrian Chadd /* Handled by parent bus? */ 940f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 941f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 942f4a3eb02SAdrian Chadd return (bus_generic_adjust_resource(dev, child, type, r, start, 943f4a3eb02SAdrian Chadd end)); 944f4a3eb02SAdrian Chadd } 945f4a3eb02SAdrian Chadd 946f4a3eb02SAdrian Chadd /* The range is limited to the existing region mapping */ 947f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, rman_get_start(r), rman_get_end(r)); 948f4a3eb02SAdrian Chadd if (cr == NULL) 949f4a3eb02SAdrian Chadd return (EINVAL); 950f4a3eb02SAdrian Chadd 951f4a3eb02SAdrian Chadd if (end <= start) 952f4a3eb02SAdrian Chadd return (EINVAL); 953f4a3eb02SAdrian Chadd 954f4a3eb02SAdrian Chadd if (start < cr->cr_addr || end > cr->cr_end) 955f4a3eb02SAdrian Chadd return (EINVAL); 956f4a3eb02SAdrian Chadd 957f4a3eb02SAdrian Chadd /* Range falls within the existing region */ 958f4a3eb02SAdrian Chadd return (rman_adjust_resource(r, start, end)); 959f4a3eb02SAdrian Chadd } 960f4a3eb02SAdrian Chadd 961f4a3eb02SAdrian Chadd /** 962f4a3eb02SAdrian Chadd * Retain an RF_ACTIVE reference to the region mapping @p r, and 963f4a3eb02SAdrian Chadd * configure @p r with its subregion values. 964f4a3eb02SAdrian Chadd * 965f4a3eb02SAdrian Chadd * @param sc Driver instance state. 966f4a3eb02SAdrian Chadd * @param child Requesting child device. 967f4a3eb02SAdrian Chadd * @param type resource type of @p r. 968f4a3eb02SAdrian Chadd * @param rid resource id of @p r 969f4a3eb02SAdrian Chadd * @param r resource to be activated. 970f4a3eb02SAdrian Chadd * @param req_direct If true, failure to allocate a direct bhnd resource 971f4a3eb02SAdrian Chadd * will be treated as an error. If false, the resource will not be marked 972f4a3eb02SAdrian Chadd * as RF_ACTIVE if bhnd direct resource allocation fails. 973f4a3eb02SAdrian Chadd */ 974f4a3eb02SAdrian Chadd static int 975f4a3eb02SAdrian Chadd chipc_try_activate_resource(struct chipc_softc *sc, device_t child, int type, 976f4a3eb02SAdrian Chadd int rid, struct resource *r, bool req_direct) 977f4a3eb02SAdrian Chadd { 978f4a3eb02SAdrian Chadd struct rman *rm; 979f4a3eb02SAdrian Chadd struct chipc_region *cr; 980f4a3eb02SAdrian Chadd bhnd_size_t cr_offset; 981f4a3eb02SAdrian Chadd rman_res_t r_start, r_end, r_size; 982f4a3eb02SAdrian Chadd int error; 983f4a3eb02SAdrian Chadd 984f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 985f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) 986f4a3eb02SAdrian Chadd return (EINVAL); 987f4a3eb02SAdrian Chadd 988f4a3eb02SAdrian Chadd r_start = rman_get_start(r); 989f4a3eb02SAdrian Chadd r_end = rman_get_end(r); 990f4a3eb02SAdrian Chadd r_size = rman_get_size(r); 991f4a3eb02SAdrian Chadd 992f4a3eb02SAdrian Chadd /* Find the corresponding chipc region */ 993f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, r_start, r_end); 994f4a3eb02SAdrian Chadd if (cr == NULL) 995f4a3eb02SAdrian Chadd return (EINVAL); 996f4a3eb02SAdrian Chadd 997f4a3eb02SAdrian Chadd /* Calculate subregion offset within the chipc region */ 998f4a3eb02SAdrian Chadd cr_offset = r_start - cr->cr_addr; 999f4a3eb02SAdrian Chadd 1000f4a3eb02SAdrian Chadd /* Retain (and activate, if necessary) the chipc region */ 1001f4a3eb02SAdrian Chadd if ((error = chipc_retain_region(sc, cr, RF_ACTIVE))) 1002f4a3eb02SAdrian Chadd return (error); 1003f4a3eb02SAdrian Chadd 1004f4a3eb02SAdrian Chadd /* Configure child resource with its subregion values. */ 1005f4a3eb02SAdrian Chadd if (cr->cr_res->direct) { 1006f4a3eb02SAdrian Chadd error = chipc_init_child_resource(r, cr->cr_res->res, 1007f4a3eb02SAdrian Chadd cr_offset, r_size); 1008f4a3eb02SAdrian Chadd if (error) 1009f4a3eb02SAdrian Chadd goto cleanup; 1010f4a3eb02SAdrian Chadd 1011f4a3eb02SAdrian Chadd /* Mark active */ 1012f4a3eb02SAdrian Chadd if ((error = rman_activate_resource(r))) 1013f4a3eb02SAdrian Chadd goto cleanup; 1014f4a3eb02SAdrian Chadd } else if (req_direct) { 1015f4a3eb02SAdrian Chadd error = ENOMEM; 1016f4a3eb02SAdrian Chadd goto cleanup; 1017f4a3eb02SAdrian Chadd } 1018f4a3eb02SAdrian Chadd 1019f4a3eb02SAdrian Chadd return (0); 1020f4a3eb02SAdrian Chadd 1021f4a3eb02SAdrian Chadd cleanup: 1022f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ACTIVE); 1023f4a3eb02SAdrian Chadd return (error); 1024f4a3eb02SAdrian Chadd } 1025f4a3eb02SAdrian Chadd 1026f4a3eb02SAdrian Chadd static int 1027f4a3eb02SAdrian Chadd chipc_activate_bhnd_resource(device_t dev, device_t child, int type, 1028f4a3eb02SAdrian Chadd int rid, struct bhnd_resource *r) 1029f4a3eb02SAdrian Chadd { 1030f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1031f4a3eb02SAdrian Chadd struct rman *rm; 1032f4a3eb02SAdrian Chadd int error; 1033f4a3eb02SAdrian Chadd 1034f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1035f4a3eb02SAdrian Chadd 1036f4a3eb02SAdrian Chadd /* Delegate non-locally managed resources to parent */ 1037f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1038f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r->res, rm)) { 1039f4a3eb02SAdrian Chadd return (bhnd_bus_generic_activate_resource(dev, child, type, 1040f4a3eb02SAdrian Chadd rid, r)); 1041f4a3eb02SAdrian Chadd } 1042f4a3eb02SAdrian Chadd 1043f4a3eb02SAdrian Chadd /* Try activating the chipc region resource */ 1044f4a3eb02SAdrian Chadd error = chipc_try_activate_resource(sc, child, type, rid, r->res, 1045f4a3eb02SAdrian Chadd false); 1046f4a3eb02SAdrian Chadd if (error) 1047f4a3eb02SAdrian Chadd return (error); 1048f4a3eb02SAdrian Chadd 1049f4a3eb02SAdrian Chadd /* Mark the child resource as direct according to the returned resource 1050f4a3eb02SAdrian Chadd * state */ 1051f4a3eb02SAdrian Chadd if (rman_get_flags(r->res) & RF_ACTIVE) 1052f4a3eb02SAdrian Chadd r->direct = true; 1053f4a3eb02SAdrian Chadd 1054f4a3eb02SAdrian Chadd return (0); 1055f4a3eb02SAdrian Chadd } 1056f4a3eb02SAdrian Chadd 1057f4a3eb02SAdrian Chadd static int 1058f4a3eb02SAdrian Chadd chipc_activate_resource(device_t dev, device_t child, int type, int rid, 1059f4a3eb02SAdrian Chadd struct resource *r) 1060f4a3eb02SAdrian Chadd { 1061f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1062f4a3eb02SAdrian Chadd struct rman *rm; 1063f4a3eb02SAdrian Chadd 1064f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1065f4a3eb02SAdrian Chadd 1066f4a3eb02SAdrian Chadd /* Delegate non-locally managed resources to parent */ 1067f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1068f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 1069f4a3eb02SAdrian Chadd return (bus_generic_activate_resource(dev, child, type, rid, 1070f4a3eb02SAdrian Chadd r)); 1071f4a3eb02SAdrian Chadd } 1072f4a3eb02SAdrian Chadd 1073f4a3eb02SAdrian Chadd /* Try activating the chipc region-based resource */ 1074f4a3eb02SAdrian Chadd return (chipc_try_activate_resource(sc, child, type, rid, r, true)); 1075f4a3eb02SAdrian Chadd } 1076f4a3eb02SAdrian Chadd 1077f4a3eb02SAdrian Chadd /** 1078f4a3eb02SAdrian Chadd * Default bhndb(4) implementation of BUS_DEACTIVATE_RESOURCE(). 1079f4a3eb02SAdrian Chadd */ 1080f4a3eb02SAdrian Chadd static int 1081f4a3eb02SAdrian Chadd chipc_deactivate_resource(device_t dev, device_t child, int type, 1082f4a3eb02SAdrian Chadd int rid, struct resource *r) 1083f4a3eb02SAdrian Chadd { 1084f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1085f4a3eb02SAdrian Chadd struct chipc_region *cr; 1086f4a3eb02SAdrian Chadd struct rman *rm; 1087f4a3eb02SAdrian Chadd int error; 1088f4a3eb02SAdrian Chadd 1089f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1090f4a3eb02SAdrian Chadd 1091f4a3eb02SAdrian Chadd /* Handled by parent bus? */ 1092f4a3eb02SAdrian Chadd rm = chipc_get_rman(sc, type); 1093f4a3eb02SAdrian Chadd if (rm == NULL || !rman_is_region_manager(r, rm)) { 1094f4a3eb02SAdrian Chadd return (bus_generic_deactivate_resource(dev, child, type, rid, 1095f4a3eb02SAdrian Chadd r)); 1096f4a3eb02SAdrian Chadd } 1097f4a3eb02SAdrian Chadd 1098f4a3eb02SAdrian Chadd /* Find the corresponding chipc region */ 1099f4a3eb02SAdrian Chadd cr = chipc_find_region(sc, rman_get_start(r), rman_get_end(r)); 1100f4a3eb02SAdrian Chadd if (cr == NULL) 1101f4a3eb02SAdrian Chadd return (EINVAL); 1102f4a3eb02SAdrian Chadd 1103f4a3eb02SAdrian Chadd /* Mark inactive */ 1104f4a3eb02SAdrian Chadd if ((error = rman_deactivate_resource(r))) 1105f4a3eb02SAdrian Chadd return (error); 1106f4a3eb02SAdrian Chadd 1107f4a3eb02SAdrian Chadd /* Drop associated RF_ACTIVE reference */ 1108f4a3eb02SAdrian Chadd chipc_release_region(sc, cr, RF_ACTIVE); 1109f4a3eb02SAdrian Chadd 1110f4a3eb02SAdrian Chadd return (0); 1111f4a3eb02SAdrian Chadd } 1112f4a3eb02SAdrian Chadd 1113f4a3eb02SAdrian Chadd /** 1114f4a3eb02SAdrian Chadd * Examine bus state and make a best effort determination of whether it's 1115f4a3eb02SAdrian Chadd * likely safe to enable the muxed SPROM pins. 1116f4a3eb02SAdrian Chadd * 1117f4a3eb02SAdrian Chadd * On devices that do not use SPROM pin muxing, always returns true. 1118f4a3eb02SAdrian Chadd * 1119f4a3eb02SAdrian Chadd * @param sc chipc driver state. 1120f4a3eb02SAdrian Chadd */ 1121f4a3eb02SAdrian Chadd static bool 1122f4a3eb02SAdrian Chadd chipc_should_enable_sprom(struct chipc_softc *sc) 1123f4a3eb02SAdrian Chadd { 1124f4a3eb02SAdrian Chadd device_t *devs; 1125f4a3eb02SAdrian Chadd device_t hostb; 1126f4a3eb02SAdrian Chadd device_t parent; 1127f4a3eb02SAdrian Chadd int devcount; 1128f4a3eb02SAdrian Chadd int error; 1129f4a3eb02SAdrian Chadd bool result; 1130f4a3eb02SAdrian Chadd 1131f4a3eb02SAdrian Chadd mtx_assert(&Giant, MA_OWNED); /* for newbus */ 1132f4a3eb02SAdrian Chadd 1133f4a3eb02SAdrian Chadd /* Nothing to do? */ 1134f4a3eb02SAdrian Chadd if (!CHIPC_QUIRK(sc, MUX_SPROM)) 1135f4a3eb02SAdrian Chadd return (true); 1136f4a3eb02SAdrian Chadd 1137f4a3eb02SAdrian Chadd parent = device_get_parent(sc->dev); 1138f4a3eb02SAdrian Chadd hostb = bhnd_find_hostb_device(parent); 1139f4a3eb02SAdrian Chadd 1140f4a3eb02SAdrian Chadd if ((error = device_get_children(parent, &devs, &devcount))) 1141f4a3eb02SAdrian Chadd return (false); 1142f4a3eb02SAdrian Chadd 1143f4a3eb02SAdrian Chadd /* Reject any active devices other than ChipCommon, or the 1144f4a3eb02SAdrian Chadd * host bridge (if any). */ 1145f4a3eb02SAdrian Chadd result = true; 1146f4a3eb02SAdrian Chadd for (int i = 0; i < devcount; i++) { 1147f4a3eb02SAdrian Chadd if (devs[i] == hostb || devs[i] == sc->dev) 1148f4a3eb02SAdrian Chadd continue; 1149f4a3eb02SAdrian Chadd 1150f4a3eb02SAdrian Chadd if (!device_is_attached(devs[i])) 1151f4a3eb02SAdrian Chadd continue; 1152f4a3eb02SAdrian Chadd 1153f4a3eb02SAdrian Chadd if (device_is_suspended(devs[i])) 1154f4a3eb02SAdrian Chadd continue; 1155f4a3eb02SAdrian Chadd 1156f4a3eb02SAdrian Chadd /* Active device; assume SPROM is busy */ 1157f4a3eb02SAdrian Chadd result = false; 1158f4a3eb02SAdrian Chadd break; 1159f4a3eb02SAdrian Chadd } 1160f4a3eb02SAdrian Chadd 1161f4a3eb02SAdrian Chadd free(devs, M_TEMP); 1162f4a3eb02SAdrian Chadd return (result); 1163f4a3eb02SAdrian Chadd } 1164e83ce340SAdrian Chadd 1165e83ce340SAdrian Chadd /** 1166e83ce340SAdrian Chadd * If required by this device, enable access to the SPROM. 1167e83ce340SAdrian Chadd * 1168e83ce340SAdrian Chadd * @param sc chipc driver state. 1169e83ce340SAdrian Chadd */ 1170e83ce340SAdrian Chadd static int 1171f4a3eb02SAdrian Chadd chipc_enable_sprom_pins(device_t dev) 1172e83ce340SAdrian Chadd { 1173f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1174e83ce340SAdrian Chadd uint32_t cctrl; 1175f4a3eb02SAdrian Chadd int error; 1176e83ce340SAdrian Chadd 1177f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1178e83ce340SAdrian Chadd 1179e83ce340SAdrian Chadd /* Nothing to do? */ 1180e83ce340SAdrian Chadd if (!CHIPC_QUIRK(sc, MUX_SPROM)) 1181e83ce340SAdrian Chadd return (0); 1182e83ce340SAdrian Chadd 1183f4a3eb02SAdrian Chadd /* Make sure we're holding Giant for newbus */ 1184f4a3eb02SAdrian Chadd mtx_lock(&Giant); 1185f4a3eb02SAdrian Chadd CHIPC_LOCK(sc); 1186f4a3eb02SAdrian Chadd 1187f4a3eb02SAdrian Chadd /* Already enabled? */ 1188f4a3eb02SAdrian Chadd if (sc->sprom_refcnt >= 1) { 1189f4a3eb02SAdrian Chadd error = 0; 1190f4a3eb02SAdrian Chadd goto finished; 1191f4a3eb02SAdrian Chadd } 1192f4a3eb02SAdrian Chadd 1193f4a3eb02SAdrian Chadd /* Check whether bus is busy */ 1194f4a3eb02SAdrian Chadd if (!chipc_should_enable_sprom(sc)) { 1195f4a3eb02SAdrian Chadd error = EBUSY; 1196f4a3eb02SAdrian Chadd goto finished; 1197f4a3eb02SAdrian Chadd } 1198f4a3eb02SAdrian Chadd 1199e83ce340SAdrian Chadd cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); 1200e83ce340SAdrian Chadd 1201e83ce340SAdrian Chadd /* 4331 devices */ 1202e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA_MUX_SPROM)) { 1203e83ce340SAdrian Chadd cctrl &= ~CHIPC_CCTRL4331_EXTPA_EN; 1204e83ce340SAdrian Chadd 1205e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_GPIO2_5_MUX_SPROM)) 1206e83ce340SAdrian Chadd cctrl &= ~CHIPC_CCTRL4331_EXTPA_ON_GPIO2_5; 1207e83ce340SAdrian Chadd 1208e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA2_MUX_SPROM)) 1209e83ce340SAdrian Chadd cctrl &= ~CHIPC_CCTRL4331_EXTPA_EN2; 1210e83ce340SAdrian Chadd 1211e83ce340SAdrian Chadd bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); 1212f4a3eb02SAdrian Chadd error = 0; 1213f4a3eb02SAdrian Chadd goto finished; 1214e83ce340SAdrian Chadd } 1215e83ce340SAdrian Chadd 1216e83ce340SAdrian Chadd /* 4360 devices */ 1217e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4360_FEM_MUX_SPROM)) { 1218e83ce340SAdrian Chadd /* Unimplemented */ 1219e83ce340SAdrian Chadd } 1220e83ce340SAdrian Chadd 1221e83ce340SAdrian Chadd /* Refuse to proceed on unsupported devices with muxed SPROM pins */ 1222e83ce340SAdrian Chadd device_printf(sc->dev, "muxed sprom lines on unrecognized device\n"); 1223f4a3eb02SAdrian Chadd error = ENXIO; 1224f4a3eb02SAdrian Chadd 1225f4a3eb02SAdrian Chadd finished: 1226f4a3eb02SAdrian Chadd /* Bump the reference count */ 1227f4a3eb02SAdrian Chadd if (error == 0) 1228f4a3eb02SAdrian Chadd sc->sprom_refcnt++; 1229f4a3eb02SAdrian Chadd 1230f4a3eb02SAdrian Chadd CHIPC_UNLOCK(sc); 1231f4a3eb02SAdrian Chadd mtx_unlock(&Giant); 1232f4a3eb02SAdrian Chadd 1233f4a3eb02SAdrian Chadd return (error); 1234e83ce340SAdrian Chadd } 1235e83ce340SAdrian Chadd 1236e83ce340SAdrian Chadd /** 1237e83ce340SAdrian Chadd * If required by this device, revert any GPIO/pin configuration applied 1238e83ce340SAdrian Chadd * to allow SPROM access. 1239e83ce340SAdrian Chadd * 1240e83ce340SAdrian Chadd * @param sc chipc driver state. 1241e83ce340SAdrian Chadd */ 1242f4a3eb02SAdrian Chadd static void 1243f4a3eb02SAdrian Chadd chipc_disable_sprom_pins(device_t dev) 1244e83ce340SAdrian Chadd { 1245f4a3eb02SAdrian Chadd struct chipc_softc *sc; 1246e83ce340SAdrian Chadd uint32_t cctrl; 1247e83ce340SAdrian Chadd 1248f4a3eb02SAdrian Chadd sc = device_get_softc(dev); 1249e83ce340SAdrian Chadd 1250e83ce340SAdrian Chadd /* Nothing to do? */ 1251e83ce340SAdrian Chadd if (!CHIPC_QUIRK(sc, MUX_SPROM)) 1252f4a3eb02SAdrian Chadd return; 1253f4a3eb02SAdrian Chadd 1254f4a3eb02SAdrian Chadd CHIPC_LOCK(sc); 1255f4a3eb02SAdrian Chadd 1256f4a3eb02SAdrian Chadd /* Check reference count, skip disable if in-use. */ 1257f4a3eb02SAdrian Chadd KASSERT(sc->sprom_refcnt > 0, ("sprom refcnt overrelease")); 1258f4a3eb02SAdrian Chadd sc->sprom_refcnt--; 1259f4a3eb02SAdrian Chadd if (sc->sprom_refcnt > 0) 1260f4a3eb02SAdrian Chadd goto finished; 1261e83ce340SAdrian Chadd 1262e83ce340SAdrian Chadd cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); 1263e83ce340SAdrian Chadd 1264e83ce340SAdrian Chadd /* 4331 devices */ 1265e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA_MUX_SPROM)) { 1266e83ce340SAdrian Chadd cctrl |= CHIPC_CCTRL4331_EXTPA_EN; 1267e83ce340SAdrian Chadd 1268e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_GPIO2_5_MUX_SPROM)) 1269e83ce340SAdrian Chadd cctrl |= CHIPC_CCTRL4331_EXTPA_ON_GPIO2_5; 1270e83ce340SAdrian Chadd 1271e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4331_EXTPA2_MUX_SPROM)) 1272e83ce340SAdrian Chadd cctrl |= CHIPC_CCTRL4331_EXTPA_EN2; 1273e83ce340SAdrian Chadd 1274e83ce340SAdrian Chadd bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); 1275f4a3eb02SAdrian Chadd goto finished; 1276e83ce340SAdrian Chadd } 1277e83ce340SAdrian Chadd 1278e83ce340SAdrian Chadd /* 4360 devices */ 1279e83ce340SAdrian Chadd if (CHIPC_QUIRK(sc, 4360_FEM_MUX_SPROM)) { 1280e83ce340SAdrian Chadd /* Unimplemented */ 1281e83ce340SAdrian Chadd } 1282e83ce340SAdrian Chadd 1283f4a3eb02SAdrian Chadd finished: 1284f4a3eb02SAdrian Chadd CHIPC_UNLOCK(sc); 1285e83ce340SAdrian Chadd } 1286e83ce340SAdrian Chadd 1287e83ce340SAdrian Chadd static bhnd_nvram_src_t 1288e83ce340SAdrian Chadd chipc_nvram_src(device_t dev) 1289e83ce340SAdrian Chadd { 1290e83ce340SAdrian Chadd struct chipc_softc *sc = device_get_softc(dev); 1291e83ce340SAdrian Chadd return (sc->nvram_src); 1292e83ce340SAdrian Chadd } 1293e83ce340SAdrian Chadd 12948ef24a0dSAdrian Chadd static void 12958ef24a0dSAdrian Chadd chipc_write_chipctrl(device_t dev, uint32_t value, uint32_t mask) 12968ef24a0dSAdrian Chadd { 12978ef24a0dSAdrian Chadd struct chipc_softc *sc; 12988ef24a0dSAdrian Chadd uint32_t cctrl; 12998ef24a0dSAdrian Chadd 13008ef24a0dSAdrian Chadd sc = device_get_softc(dev); 13018ef24a0dSAdrian Chadd 13028ef24a0dSAdrian Chadd CHIPC_LOCK(sc); 13038ef24a0dSAdrian Chadd 13048ef24a0dSAdrian Chadd cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); 13058ef24a0dSAdrian Chadd cctrl = (cctrl & ~mask) | (value | mask); 13068ef24a0dSAdrian Chadd bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); 13078ef24a0dSAdrian Chadd 13088ef24a0dSAdrian Chadd CHIPC_UNLOCK(sc); 13098ef24a0dSAdrian Chadd } 13108ef24a0dSAdrian Chadd 13112b693a88SLandon J. Fuller static struct chipc_caps * 13122b693a88SLandon J. Fuller chipc_get_caps(device_t dev) 13132b693a88SLandon J. Fuller { 13142b693a88SLandon J. Fuller struct chipc_softc *sc; 13152b693a88SLandon J. Fuller 13162b693a88SLandon J. Fuller sc = device_get_softc(dev); 13172b693a88SLandon J. Fuller return (&sc->caps); 13182b693a88SLandon J. Fuller } 13192b693a88SLandon J. Fuller 1320e129bcd6SLandon J. Fuller static uint32_t 1321e129bcd6SLandon J. Fuller chipc_get_flash_cfg(device_t dev) 1322e129bcd6SLandon J. Fuller { 1323e129bcd6SLandon J. Fuller struct chipc_softc *sc; 1324e129bcd6SLandon J. Fuller 1325e129bcd6SLandon J. Fuller sc = device_get_softc(dev); 1326e129bcd6SLandon J. Fuller return (bhnd_bus_read_4(sc->core, CHIPC_FLASH_CFG)); 1327e129bcd6SLandon J. Fuller } 1328e129bcd6SLandon J. Fuller 13294ad7e9b0SAdrian Chadd static device_method_t chipc_methods[] = { 13304ad7e9b0SAdrian Chadd /* Device interface */ 13314ad7e9b0SAdrian Chadd DEVMETHOD(device_probe, chipc_probe), 13324ad7e9b0SAdrian Chadd DEVMETHOD(device_attach, chipc_attach), 13334ad7e9b0SAdrian Chadd DEVMETHOD(device_detach, chipc_detach), 13344ad7e9b0SAdrian Chadd DEVMETHOD(device_suspend, chipc_suspend), 13354ad7e9b0SAdrian Chadd DEVMETHOD(device_resume, chipc_resume), 13364ad7e9b0SAdrian Chadd 1337f4a3eb02SAdrian Chadd /* Bus interface */ 1338f4a3eb02SAdrian Chadd DEVMETHOD(bus_probe_nomatch, chipc_probe_nomatch), 1339f4a3eb02SAdrian Chadd DEVMETHOD(bus_print_child, chipc_print_child), 1340f4a3eb02SAdrian Chadd DEVMETHOD(bus_child_pnpinfo_str, chipc_child_pnpinfo_str), 1341f4a3eb02SAdrian Chadd DEVMETHOD(bus_child_location_str, chipc_child_location_str), 1342f4a3eb02SAdrian Chadd 1343f4a3eb02SAdrian Chadd DEVMETHOD(bus_add_child, chipc_add_child), 1344f4a3eb02SAdrian Chadd DEVMETHOD(bus_child_deleted, chipc_child_deleted), 1345f4a3eb02SAdrian Chadd 1346f4a3eb02SAdrian Chadd DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 1347f4a3eb02SAdrian Chadd DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 1348f4a3eb02SAdrian Chadd DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource), 1349f4a3eb02SAdrian Chadd DEVMETHOD(bus_alloc_resource, chipc_alloc_resource), 1350f4a3eb02SAdrian Chadd DEVMETHOD(bus_release_resource, chipc_release_resource), 1351f4a3eb02SAdrian Chadd DEVMETHOD(bus_adjust_resource, chipc_adjust_resource), 1352f4a3eb02SAdrian Chadd DEVMETHOD(bus_activate_resource, chipc_activate_resource), 1353f4a3eb02SAdrian Chadd DEVMETHOD(bus_deactivate_resource, chipc_deactivate_resource), 1354f4a3eb02SAdrian Chadd DEVMETHOD(bus_get_resource_list, chipc_get_resource_list), 1355f4a3eb02SAdrian Chadd 1356f4a3eb02SAdrian Chadd DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 1357f4a3eb02SAdrian Chadd DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 1358f4a3eb02SAdrian Chadd DEVMETHOD(bus_config_intr, bus_generic_config_intr), 1359f4a3eb02SAdrian Chadd DEVMETHOD(bus_bind_intr, bus_generic_bind_intr), 1360f4a3eb02SAdrian Chadd DEVMETHOD(bus_describe_intr, bus_generic_describe_intr), 1361f4a3eb02SAdrian Chadd 1362f4a3eb02SAdrian Chadd /* BHND bus inteface */ 1363f4a3eb02SAdrian Chadd DEVMETHOD(bhnd_bus_activate_resource, chipc_activate_bhnd_resource), 1364f4a3eb02SAdrian Chadd 13654ad7e9b0SAdrian Chadd /* ChipCommon interface */ 13664ad7e9b0SAdrian Chadd DEVMETHOD(bhnd_chipc_nvram_src, chipc_nvram_src), 13678ef24a0dSAdrian Chadd DEVMETHOD(bhnd_chipc_write_chipctrl, chipc_write_chipctrl), 1368f4a3eb02SAdrian Chadd DEVMETHOD(bhnd_chipc_enable_sprom, chipc_enable_sprom_pins), 1369f4a3eb02SAdrian Chadd DEVMETHOD(bhnd_chipc_disable_sprom, chipc_disable_sprom_pins), 13702b693a88SLandon J. Fuller DEVMETHOD(bhnd_chipc_get_caps, chipc_get_caps), 1371e129bcd6SLandon J. Fuller DEVMETHOD(bhnd_chipc_get_flash_cfg, chipc_get_flash_cfg), 1372e83ce340SAdrian Chadd 13734ad7e9b0SAdrian Chadd DEVMETHOD_END 13744ad7e9b0SAdrian Chadd }; 13754ad7e9b0SAdrian Chadd 13764ad7e9b0SAdrian Chadd DEFINE_CLASS_0(bhnd_chipc, chipc_driver, chipc_methods, sizeof(struct chipc_softc)); 1377e129bcd6SLandon J. Fuller EARLY_DRIVER_MODULE(bhnd_chipc, bhnd, chipc_driver, bhnd_chipc_devclass, 0, 0, 1378e129bcd6SLandon J. Fuller BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); 137996546b75SAdrian Chadd MODULE_DEPEND(bhnd_chipc, bhnd, 1, 1, 1); 13804ad7e9b0SAdrian Chadd MODULE_VERSION(bhnd_chipc, 1); 1381