1 /*-
2  * Copyright (c) 2015-2016 Landon Fuller <landonf@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer,
10  *    without modification.
11  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13  *    redistribution must be conditioned upon including a substantially
14  *    similar Disclaimer requirement for further binary redistribution.
15  *
16  * NO WARRANTY
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27  * THE POSSIBILITY OF SUCH DAMAGES.
28  *
29  * $FreeBSD$
30  */
31 
32 #ifndef _BHND_PWRCTL_BHND_PWRCTLVAR_H_
33 #define _BHND_PWRCTL_BHND_PWRCTLVAR_H_
34 
35 #include <sys/param.h>
36 #include <sys/bus.h>
37 #include <sys/queue.h>
38 
39 #include <dev/bhnd/bhnd.h>
40 
41 uint32_t	bhnd_pwrctl_clock_rate(uint32_t pll_type, uint32_t n,
42 		    uint32_t m);
43 
44 bus_size_t	bhnd_pwrctl_si_clkreg_m(const struct bhnd_chipid *cid,
45 		    uint8_t pll_type, uint32_t *fixed_hz);
46 uint32_t	bhnd_pwrctl_si_clock_rate(const struct bhnd_chipid *cid,
47 		    uint32_t pll_type, uint32_t n, uint32_t m);
48 
49 bus_size_t	bhnd_pwrctl_cpu_clkreg_m(const struct bhnd_chipid *cid,
50 		    uint8_t pll_type, uint32_t *fixed_hz);
51 uint32_t	bhnd_pwrctl_cpu_clock_rate(const struct bhnd_chipid *cid,
52 		    uint32_t pll_type, uint32_t n, uint32_t m);
53 
54 /**
55  * bhnd pwrctl device quirks.
56  */
57 enum {
58 	/** No quirks */
59 	PWRCTL_QUIRK_NONE		= 0,
60 
61 	/**
62 	 * Early ChipCommon revisions do not support dynamic clock control
63 	 */
64 	PWRCTL_QUIRK_FIXED_CLK		= (1 << 0),
65 
66 	/**
67 	 * On PCI (not PCIe) devices, early ChipCommon revisions
68 	 * (rev <= 5) vend xtal/pll and clock config registers via the PCI
69 	 * config space.
70 	 *
71 	 * Dynamic clock control is not supported on these devices.
72 	 */
73 	PWRCTL_QUIRK_PCICLK_CTL		= (1 << 1) | PWRCTL_QUIRK_FIXED_CLK,
74 
75 
76 	/**
77 	 * On earliy BCM4311, BCM4321, and BCM4716 PCI(e) devices, no ALP
78 	 * clock is available, and the HT clock must be enabled.
79 	 */
80 	PWRCTL_QUIRK_FORCE_HT		= (1 << 2),
81 
82 	/**
83 	 * ChipCommon revisions 6-9 use the slowclk register layout.
84 	 */
85 	PWRCTL_QUIRK_SLOWCLK_CTL	= (1 << 3),
86 
87 	/**
88 	 * ChipCommon revisions 10-19 support the instaclk register layout.
89 	 */
90 	PWRCTL_QUIRK_INSTACLK_CTL	= (1 << 4),
91 
92 };
93 
94 /**
95  * device clock reservation.
96  */
97 struct bhnd_pwrctl_clkres {
98 	device_t	owner;	/**< bhnd(4) device holding this reservation */
99 	bhnd_clock	clock;	/**< requested clock */
100 	STAILQ_ENTRY(bhnd_pwrctl_clkres) cr_link;
101 };
102 
103 
104 /**
105  * bhnd pwrctl driver instance state.
106  */
107 struct bhnd_pwrctl_softc {
108 	device_t		 dev;
109 	uint32_t		 quirks;
110 
111 	device_t		 chipc_dev;	/**< core device */
112 	struct bhnd_resource	*res;		/**< core register block. */
113 
114 	struct mtx		 mtx;		/**< state mutex */
115 
116 	/** active clock reservations */
117 	STAILQ_HEAD(, bhnd_pwrctl_clkres) clkres_list;
118 };
119 
120 #define	PWRCTL_LOCK_INIT(sc) \
121 	mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \
122 	    "bhnd pwrctl driver lock", MTX_DEF)
123 #define	PWRCTL_LOCK(sc)				mtx_lock(&(sc)->mtx)
124 #define	PWRCTL_UNLOCK(sc)			mtx_unlock(&(sc)->mtx)
125 #define	PWRCTL_LOCK_ASSERT(sc, what)		mtx_assert(&(sc)->mtx, what)
126 #define	PWRCTL_LOCK_DESTROY(sc)			mtx_destroy(&(sc)->mtx)
127 
128 /* quirk convenience macro */
129 #define	PWRCTL_QUIRK(_sc, _name)	\
130     ((_sc)->quirks & PWRCTL_QUIRK_ ## _name)
131 
132 #define	PWRCTL_ASSERT_QUIRK(_sc, name)	\
133     KASSERT(PWRCTL_QUIRK((_sc), name), ("quirk " __STRING(_name) " not set"))
134 
135 #endif /* _BHND_PWRCTL_BHND_PWRCTLVAR_H_ */
136