14ad7e9b0SAdrian Chadd /*- 24d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause 36e778a7eSPedro F. Giffuni * 44ad7e9b0SAdrian Chadd * Copyright (c) 2015 Landon Fuller <landon@landonf.org> 54ad7e9b0SAdrian Chadd * All rights reserved. 64ad7e9b0SAdrian Chadd * 74ad7e9b0SAdrian Chadd * Redistribution and use in source and binary forms, with or without 84ad7e9b0SAdrian Chadd * modification, are permitted provided that the following conditions 94ad7e9b0SAdrian Chadd * are met: 104ad7e9b0SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 114ad7e9b0SAdrian Chadd * notice, this list of conditions and the following disclaimer, 124ad7e9b0SAdrian Chadd * without modification. 134ad7e9b0SAdrian Chadd * 2. Redistributions in binary form must reproduce at minimum a disclaimer 144ad7e9b0SAdrian Chadd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 154ad7e9b0SAdrian Chadd * redistribution must be conditioned upon including a substantially 164ad7e9b0SAdrian Chadd * similar Disclaimer requirement for further binary redistribution. 174ad7e9b0SAdrian Chadd * 184ad7e9b0SAdrian Chadd * NO WARRANTY 194ad7e9b0SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 204ad7e9b0SAdrian Chadd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 214ad7e9b0SAdrian Chadd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 224ad7e9b0SAdrian Chadd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 234ad7e9b0SAdrian Chadd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 244ad7e9b0SAdrian Chadd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 254ad7e9b0SAdrian Chadd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 264ad7e9b0SAdrian Chadd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 274ad7e9b0SAdrian Chadd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 284ad7e9b0SAdrian Chadd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 294ad7e9b0SAdrian Chadd * THE POSSIBILITY OF SUCH DAMAGES. 304ad7e9b0SAdrian Chadd * 314ad7e9b0SAdrian Chadd */ 324ad7e9b0SAdrian Chadd 334ad7e9b0SAdrian Chadd #ifndef _BHND_CORES_PCI_BHND_PCIVAR_H_ 344ad7e9b0SAdrian Chadd #define _BHND_CORES_PCI_BHND_PCIVAR_H_ 354ad7e9b0SAdrian Chadd 364ad7e9b0SAdrian Chadd #include <sys/param.h> 374ad7e9b0SAdrian Chadd #include <sys/bus.h> 384ad7e9b0SAdrian Chadd 394ad7e9b0SAdrian Chadd /* 404ad7e9b0SAdrian Chadd * Shared PCI Bridge/PCI Host Bridge definitions. 414ad7e9b0SAdrian Chadd */ 424ad7e9b0SAdrian Chadd 43bb64eeccSAdrian Chadd DECLARE_CLASS(bhnd_pci_driver); 44bb64eeccSAdrian Chadd struct bhnd_pci_softc; 454ad7e9b0SAdrian Chadd 46bb64eeccSAdrian Chadd int bhnd_pci_generic_probe(device_t dev); 47bb64eeccSAdrian Chadd int bhnd_pci_generic_attach(device_t dev); 48bb64eeccSAdrian Chadd int bhnd_pci_generic_detach(device_t dev); 49bb64eeccSAdrian Chadd int bhnd_pci_generic_suspend(device_t dev); 50bb64eeccSAdrian Chadd int bhnd_pci_generic_resume(device_t dev); 51bb64eeccSAdrian Chadd 52bb64eeccSAdrian Chadd uint32_t bhnd_pcie_read_proto_reg(struct bhnd_pci_softc *sc, 53bb64eeccSAdrian Chadd uint32_t addr); 54bb64eeccSAdrian Chadd void bhnd_pcie_write_proto_reg(struct bhnd_pci_softc *sc, 55bb64eeccSAdrian Chadd uint32_t addr, uint32_t val); 56bb64eeccSAdrian Chadd int bhnd_pcie_mdio_read(struct bhnd_pci_softc *sc, int phy, 57bb64eeccSAdrian Chadd int reg); 58bb64eeccSAdrian Chadd int bhnd_pcie_mdio_write(struct bhnd_pci_softc *sc, int phy, 59bb64eeccSAdrian Chadd int reg, int val); 60bb64eeccSAdrian Chadd int bhnd_pcie_mdio_read_ext(struct bhnd_pci_softc *sc, int phy, 61bb64eeccSAdrian Chadd int devaddr, int reg); 62bb64eeccSAdrian Chadd int bhnd_pcie_mdio_write_ext(struct bhnd_pci_softc *sc, int phy, 63bb64eeccSAdrian Chadd int devaddr, int reg, int val); 64bb64eeccSAdrian Chadd 65bb64eeccSAdrian Chadd /** PCI register block layouts. */ 664ad7e9b0SAdrian Chadd typedef enum { 674ad7e9b0SAdrian Chadd BHND_PCI_REGFMT_PCI = 0, /* PCI register definitions */ 684ad7e9b0SAdrian Chadd BHND_PCI_REGFMT_PCIE = 1, /* PCIe-Gen1 register definitions */ 694ad7e9b0SAdrian Chadd } bhnd_pci_regfmt_t; 704ad7e9b0SAdrian Chadd 71bb64eeccSAdrian Chadd /** PCI (base driver) quirks */ 72bb64eeccSAdrian Chadd enum { 73bb64eeccSAdrian Chadd /** 74bb64eeccSAdrian Chadd * The PCIe SerDes requires use of a non-standard Clause 22 75bb64eeccSAdrian Chadd * address extension mechanism to access extended MDIO registers. 76bb64eeccSAdrian Chadd */ 77bb64eeccSAdrian Chadd BHND_PCI_QUIRK_SD_C22_EXTADDR = (1<<0), 78bb64eeccSAdrian Chadd }; 79bb64eeccSAdrian Chadd 80bb64eeccSAdrian Chadd /** 81bb64eeccSAdrian Chadd * bhnd_pci child device info 82bb64eeccSAdrian Chadd */ 83bb64eeccSAdrian Chadd struct bhnd_pci_devinfo { 84bb64eeccSAdrian Chadd struct resource_list resources; 85bb64eeccSAdrian Chadd }; 86bb64eeccSAdrian Chadd 87bb64eeccSAdrian Chadd /* 88bb64eeccSAdrian Chadd * Generic PCI bridge/end-point driver state. 89bb64eeccSAdrian Chadd * 90bb64eeccSAdrian Chadd * Must be first member of all subclass softc structures. 91bb64eeccSAdrian Chadd */ 92bb64eeccSAdrian Chadd struct bhnd_pci_softc { 93bb64eeccSAdrian Chadd device_t dev; /**< pci device */ 94bb64eeccSAdrian Chadd uint32_t quirks; /**< quirk flags */ 95bb64eeccSAdrian Chadd bhnd_pci_regfmt_t regfmt; /**< register format */ 96bb64eeccSAdrian Chadd 97bb64eeccSAdrian Chadd struct mtx mtx; /**< state mutex used to protect 98bb64eeccSAdrian Chadd interdependent register 99bb64eeccSAdrian Chadd accesses. */ 100bb64eeccSAdrian Chadd 101bb64eeccSAdrian Chadd struct bhnd_resource *mem_res; /**< device register block. */ 102bb64eeccSAdrian Chadd int mem_rid; /**< register block RID */ 103bb64eeccSAdrian Chadd }; 104bb64eeccSAdrian Chadd 105bb64eeccSAdrian Chadd #define BHND_PCI_LOCK_INIT(sc) \ 106bb64eeccSAdrian Chadd mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \ 107bb64eeccSAdrian Chadd "BHND PCI driver lock", MTX_DEF) 108bb64eeccSAdrian Chadd #define BHND_PCI_LOCK(sc) mtx_lock(&(sc)->mtx) 109bb64eeccSAdrian Chadd #define BHND_PCI_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 110bb64eeccSAdrian Chadd #define BHND_PCI_LOCK_ASSERT(sc, what) mtx_assert(&(sc)->mtx, what) 111bb64eeccSAdrian Chadd #define BHND_PCI_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx) 112bb64eeccSAdrian Chadd 113bb64eeccSAdrian Chadd /* BHND_PCI_*_REG_(GET|SET) implementation */ 114bb64eeccSAdrian Chadd #define _BHND_PCI_REG_GET(_regval, _mask, _shift) \ 1154ad7e9b0SAdrian Chadd ((_regval & _mask) >> _shift) 116bb64eeccSAdrian Chadd #define _BHND_PCI_REG_SET(_regval, _mask, _shift, _setval) \ 1174ad7e9b0SAdrian Chadd (((_regval) & ~ _mask) | (((_setval) << _shift) & _mask)) 1184ad7e9b0SAdrian Chadd 1194ad7e9b0SAdrian Chadd /** 1204ad7e9b0SAdrian Chadd * Extract a register value by applying _MASK and _SHIFT defines. 1214ad7e9b0SAdrian Chadd * 1224ad7e9b0SAdrian Chadd * @param _regv The register value containing the desired attribute 1234ad7e9b0SAdrian Chadd * @param _attr The register attribute name to which to append `_MASK`/`_SHIFT` 1244ad7e9b0SAdrian Chadd * suffixes. 1254ad7e9b0SAdrian Chadd */ 126bb64eeccSAdrian Chadd #define BHND_PCI_REG_GET(_regv, _attr) \ 127bb64eeccSAdrian Chadd _BHND_PCI_REG_GET(_regv, _attr ## _MASK, _attr ## _SHIFT) 1284ad7e9b0SAdrian Chadd 1294ad7e9b0SAdrian Chadd /** 1304ad7e9b0SAdrian Chadd * Insert a value in @p _regv by applying _MASK and _SHIFT defines. 1314ad7e9b0SAdrian Chadd * 1324ad7e9b0SAdrian Chadd * @param _regv The current register value. 1334ad7e9b0SAdrian Chadd * @param _attr The register attribute name to which to append `_MASK`/`_SHIFT` 1344ad7e9b0SAdrian Chadd * suffixes. 1354ad7e9b0SAdrian Chadd * @param _val The value to be set in @p _regv. 1364ad7e9b0SAdrian Chadd */ 137bb64eeccSAdrian Chadd #define BHND_PCI_REG_SET(_regv, _attr, _val) \ 138bb64eeccSAdrian Chadd _BHND_PCI_REG_SET(_regv, _attr ## _MASK, _attr ## _SHIFT, _val) 1394ad7e9b0SAdrian Chadd 1404ad7e9b0SAdrian Chadd /** 1414ad7e9b0SAdrian Chadd * Extract a value by applying _MASK and _SHIFT defines to the common 1424ad7e9b0SAdrian Chadd * PCI/PCIe register definition @p _regv 1434ad7e9b0SAdrian Chadd * 144bb64eeccSAdrian Chadd * @param _regf The PCI core register format (BHND_PCI_REGFMT_*). 1454ad7e9b0SAdrian Chadd * @param _regv The register value containing the desired attribute 1464ad7e9b0SAdrian Chadd * @param _attr The register attribute name to which to prepend the register 1474ad7e9b0SAdrian Chadd * definition prefix and append `_MASK`/`_SHIFT` suffixes. 1484ad7e9b0SAdrian Chadd */ 149bb64eeccSAdrian Chadd #define BHND_PCI_CMN_REG_GET(_regf, _regv, _attr) \ 150bb64eeccSAdrian Chadd _BHND_PCI_REG_GET(_regv, \ 1514ad7e9b0SAdrian Chadd BHND_PCI_COMMON_REG((_regf), _attr ## _MASK), \ 1524ad7e9b0SAdrian Chadd BHND_PCI_COMMON_REG((_regf), _attr ## _SHIFT)) 1534ad7e9b0SAdrian Chadd 1544ad7e9b0SAdrian Chadd /** 1554ad7e9b0SAdrian Chadd * Insert a register value by applying _MASK and _SHIFT defines to the common 1564ad7e9b0SAdrian Chadd * PCI/PCIe register definition @p _regv 1574ad7e9b0SAdrian Chadd * 158bb64eeccSAdrian Chadd * @param _regf The PCI core register format (BHND_PCI_REGFMT_*). 1594ad7e9b0SAdrian Chadd * @param _regv The register value containing the desired attribute 1604ad7e9b0SAdrian Chadd * @param _attr The register attribute name to which to prepend the register 1614ad7e9b0SAdrian Chadd * definition prefix and append `_MASK`/`_SHIFT` suffixes. 1624ad7e9b0SAdrian Chadd * @param _val The value to bet set in @p _regv. 1634ad7e9b0SAdrian Chadd */ 164bb64eeccSAdrian Chadd #define BHND_PCI_CMN_REG_SET(_regf, _regv, _attr, _val) \ 165bb64eeccSAdrian Chadd _BHND_PCI_REG_SET(_regv, \ 1664ad7e9b0SAdrian Chadd BHND_PCI_COMMON_REG((_regf), _attr ## _MASK), \ 1674ad7e9b0SAdrian Chadd BHND_PCI_COMMON_REG((_regf), _attr ## _SHIFT), \ 1684ad7e9b0SAdrian Chadd _val) 1694ad7e9b0SAdrian Chadd 1704ad7e9b0SAdrian Chadd /** 1714ad7e9b0SAdrian Chadd * Evaluates to the offset of a common PCI/PCIe register definition. 1724ad7e9b0SAdrian Chadd * 1734ad7e9b0SAdrian Chadd * This will trigger a compile-time error if the register is not defined 1744ad7e9b0SAdrian Chadd * for all supported PCI/PCIe cores. 1754ad7e9b0SAdrian Chadd * 1764ad7e9b0SAdrian Chadd * This should be optimized down to a constant value if the register constant 1774ad7e9b0SAdrian Chadd * is the same across the register definitions. 1784ad7e9b0SAdrian Chadd * 179bb64eeccSAdrian Chadd * @param _regf The PCI core register format (BHND_PCI_REGFMT_*). 1804ad7e9b0SAdrian Chadd * @param _name The base name of the register. 1814ad7e9b0SAdrian Chadd */ 1824ad7e9b0SAdrian Chadd #define BHND_PCI_COMMON_REG(_regf, _name) ( \ 1834ad7e9b0SAdrian Chadd (_regf) == BHND_PCI_REGFMT_PCI ? BHND_PCI_ ## _name : \ 1844ad7e9b0SAdrian Chadd BHND_PCIE_ ## _name \ 1854ad7e9b0SAdrian Chadd ) 1864ad7e9b0SAdrian Chadd 1874ad7e9b0SAdrian Chadd #endif /* _BHND_CORES_PCI_BHND_PCIVAR_H_ */ 188