xref: /freebsd/sys/dev/bhnd/cores/pmu/bhnd_pmu.h (revision 2ff63af9)
1f90f4b65SLandon J. Fuller /*-
24d846d26SWarner Losh  * SPDX-License-Identifier: BSD-2-Clause
36e778a7eSPedro F. Giffuni  *
4f90f4b65SLandon J. Fuller  * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
54e96bf3aSLandon J. Fuller  * Copyright (c) 2017 The FreeBSD Foundation
6f90f4b65SLandon J. Fuller  * All rights reserved.
7f90f4b65SLandon J. Fuller  *
84e96bf3aSLandon J. Fuller  * Portions of this software were developed by Landon Fuller
94e96bf3aSLandon J. Fuller  * under sponsorship from the FreeBSD Foundation.
104e96bf3aSLandon J. Fuller  *
11f90f4b65SLandon J. Fuller  * Redistribution and use in source and binary forms, with or without
12f90f4b65SLandon J. Fuller  * modification, are permitted provided that the following conditions
13f90f4b65SLandon J. Fuller  * are met:
14f90f4b65SLandon J. Fuller  * 1. Redistributions of source code must retain the above copyright
15f90f4b65SLandon J. Fuller  *    notice, this list of conditions and the following disclaimer,
16f90f4b65SLandon J. Fuller  *    without modification.
17f90f4b65SLandon J. Fuller  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
18f90f4b65SLandon J. Fuller  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
19f90f4b65SLandon J. Fuller  *    redistribution must be conditioned upon including a substantially
20f90f4b65SLandon J. Fuller  *    similar Disclaimer requirement for further binary redistribution.
21f90f4b65SLandon J. Fuller  *
22f90f4b65SLandon J. Fuller  * NO WARRANTY
23f90f4b65SLandon J. Fuller  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24f90f4b65SLandon J. Fuller  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25f90f4b65SLandon J. Fuller  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
26f90f4b65SLandon J. Fuller  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
27f90f4b65SLandon J. Fuller  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
28f90f4b65SLandon J. Fuller  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29f90f4b65SLandon J. Fuller  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30f90f4b65SLandon J. Fuller  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
31f90f4b65SLandon J. Fuller  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32f90f4b65SLandon J. Fuller  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
33f90f4b65SLandon J. Fuller  * THE POSSIBILITY OF SUCH DAMAGES.
34f90f4b65SLandon J. Fuller  *
35f90f4b65SLandon J. Fuller  */
36f90f4b65SLandon J. Fuller 
37f90f4b65SLandon J. Fuller #ifndef _BHND_CORES_PMU_BHND_PMU_H_
38f90f4b65SLandon J. Fuller #define _BHND_CORES_PMU_BHND_PMU_H_
39f90f4b65SLandon J. Fuller 
40f90f4b65SLandon J. Fuller #include <sys/types.h>
41f90f4b65SLandon J. Fuller 
428a03f98aSLandon J. Fuller #include <dev/bhnd/bhnd.h>
438a03f98aSLandon J. Fuller 
44f90f4b65SLandon J. Fuller #include "bhnd_pmu_if.h"
454e96bf3aSLandon J. Fuller #include "bhnd_pmu_types.h"
464e96bf3aSLandon J. Fuller 
47f90f4b65SLandon J. Fuller /**
484e96bf3aSLandon J. Fuller  * Return the current value of a PMU chipctrl register.
494e96bf3aSLandon J. Fuller  *
504e96bf3aSLandon J. Fuller  * @param dev A bhnd(4) PMU device.
514e96bf3aSLandon J. Fuller  * @param reg The PMU chipctrl register to be read.
524e96bf3aSLandon J. Fuller  *
534e96bf3aSLandon J. Fuller  * Drivers should only use function for functionality that is not
544e96bf3aSLandon J. Fuller  * available via another bhnd_chipc() function.
554e96bf3aSLandon J. Fuller  *
564e96bf3aSLandon J. Fuller  * @returns The chipctrl register value, or 0 if undefined by this hardware.
57f90f4b65SLandon J. Fuller  */
584e96bf3aSLandon J. Fuller static inline uint32_t
bhnd_pmu_read_chipctrl(device_t dev,uint32_t reg)594e96bf3aSLandon J. Fuller bhnd_pmu_read_chipctrl(device_t dev, uint32_t reg)
604e96bf3aSLandon J. Fuller {
614e96bf3aSLandon J. Fuller 	return (BHND_PMU_READ_CHIPCTRL(dev, reg));
624e96bf3aSLandon J. Fuller }
634e96bf3aSLandon J. Fuller 
644e96bf3aSLandon J. Fuller /**
654e96bf3aSLandon J. Fuller  * Write @p value with @p mask to a PMU chipctrl register.
664e96bf3aSLandon J. Fuller  *
674e96bf3aSLandon J. Fuller  * @param dev A bhnd(4) PMU device.
684e96bf3aSLandon J. Fuller  * @param reg The PMU chipctrl register to be written.
694e96bf3aSLandon J. Fuller  * @param value The value to write.
704e96bf3aSLandon J. Fuller  * @param mask The mask of bits to be written from @p value.
714e96bf3aSLandon J. Fuller  *
724e96bf3aSLandon J. Fuller  * Drivers should only use function for functionality that is not
734e96bf3aSLandon J. Fuller  * available via another bhnd_pmu() function.
744e96bf3aSLandon J. Fuller  */
754e96bf3aSLandon J. Fuller static inline void
bhnd_pmu_write_chipctrl(device_t dev,uint32_t reg,uint32_t value,uint32_t mask)764e96bf3aSLandon J. Fuller bhnd_pmu_write_chipctrl(device_t dev, uint32_t reg, uint32_t value,
774e96bf3aSLandon J. Fuller     uint32_t mask)
784e96bf3aSLandon J. Fuller {
794e96bf3aSLandon J. Fuller 	return (BHND_PMU_WRITE_CHIPCTRL(dev, reg, value, mask));
804e96bf3aSLandon J. Fuller }
814e96bf3aSLandon J. Fuller 
824e96bf3aSLandon J. Fuller /**
834e96bf3aSLandon J. Fuller  * Return the current value of a PMU regulator control register.
844e96bf3aSLandon J. Fuller  *
854e96bf3aSLandon J. Fuller  * @param dev A bhnd(4) PMU device.
864e96bf3aSLandon J. Fuller  * @param reg The PMU regctrl register to be read.
874e96bf3aSLandon J. Fuller  *
884e96bf3aSLandon J. Fuller  * Drivers should only use function for functionality that is not
894e96bf3aSLandon J. Fuller  * available via another bhnd_chipc() function.
904e96bf3aSLandon J. Fuller  *
914e96bf3aSLandon J. Fuller  * @returns The regctrl register value, or 0 if undefined by this hardware.
924e96bf3aSLandon J. Fuller  */
934e96bf3aSLandon J. Fuller static inline uint32_t
bhnd_pmu_read_regctrl(device_t dev,uint32_t reg)944e96bf3aSLandon J. Fuller bhnd_pmu_read_regctrl(device_t dev, uint32_t reg)
954e96bf3aSLandon J. Fuller {
964e96bf3aSLandon J. Fuller 	return (BHND_PMU_READ_REGCTRL(dev, reg));
974e96bf3aSLandon J. Fuller }
984e96bf3aSLandon J. Fuller 
994e96bf3aSLandon J. Fuller /**
1004e96bf3aSLandon J. Fuller  * Write @p value with @p mask to a PMU regulator control register.
1014e96bf3aSLandon J. Fuller  *
1024e96bf3aSLandon J. Fuller  * @param dev A bhnd(4) PMU device.
1034e96bf3aSLandon J. Fuller  * @param reg The PMU regctrl register to be written.
1044e96bf3aSLandon J. Fuller  * @param value The value to write.
1054e96bf3aSLandon J. Fuller  * @param mask The mask of bits to be written from @p value.
1064e96bf3aSLandon J. Fuller  *
1074e96bf3aSLandon J. Fuller  * Drivers should only use function for functionality that is not
1084e96bf3aSLandon J. Fuller  * available via another bhnd_pmu() function.
1094e96bf3aSLandon J. Fuller  */
1104e96bf3aSLandon J. Fuller static inline void
bhnd_pmu_write_regctrl(device_t dev,uint32_t reg,uint32_t value,uint32_t mask)1114e96bf3aSLandon J. Fuller bhnd_pmu_write_regctrl(device_t dev, uint32_t reg, uint32_t value,
1124e96bf3aSLandon J. Fuller     uint32_t mask)
1134e96bf3aSLandon J. Fuller {
1144e96bf3aSLandon J. Fuller 	return (BHND_PMU_WRITE_REGCTRL(dev, reg, value, mask));
1154e96bf3aSLandon J. Fuller }
1164e96bf3aSLandon J. Fuller 
1174e96bf3aSLandon J. Fuller /**
1184e96bf3aSLandon J. Fuller  * Return the current value of a PMU PLL control register.
1194e96bf3aSLandon J. Fuller  *
1204e96bf3aSLandon J. Fuller  * @param dev A bhnd(4) PMU device.
1214e96bf3aSLandon J. Fuller  * @param reg The PMU pllctrl register to be read.
1224e96bf3aSLandon J. Fuller  *
1234e96bf3aSLandon J. Fuller  * Drivers should only use function for functionality that is not
1244e96bf3aSLandon J. Fuller  * available via another bhnd_chipc() function.
1254e96bf3aSLandon J. Fuller  *
1264e96bf3aSLandon J. Fuller  * @returns The pllctrl register value, or 0 if undefined by this hardware.
1274e96bf3aSLandon J. Fuller  */
1284e96bf3aSLandon J. Fuller static inline uint32_t
bhnd_pmu_read_pllctrl(device_t dev,uint32_t reg)1294e96bf3aSLandon J. Fuller bhnd_pmu_read_pllctrl(device_t dev, uint32_t reg)
1304e96bf3aSLandon J. Fuller {
1314e96bf3aSLandon J. Fuller 	return (BHND_PMU_READ_PLLCTRL(dev, reg));
1324e96bf3aSLandon J. Fuller }
1334e96bf3aSLandon J. Fuller 
1344e96bf3aSLandon J. Fuller /**
1354e96bf3aSLandon J. Fuller  * Write @p value with @p mask to a PMU PLL control register.
1364e96bf3aSLandon J. Fuller  *
1374e96bf3aSLandon J. Fuller  * @param dev A bhnd(4) PMU device.
1384e96bf3aSLandon J. Fuller  * @param reg The PMU pllctrl register to be written.
1394e96bf3aSLandon J. Fuller  * @param value The value to write.
1404e96bf3aSLandon J. Fuller  * @param mask The mask of bits to be written from @p value.
1414e96bf3aSLandon J. Fuller  *
1424e96bf3aSLandon J. Fuller  * Drivers should only use function for functionality that is not
1434e96bf3aSLandon J. Fuller  * available via another bhnd_pmu() function.
1444e96bf3aSLandon J. Fuller  */
1454e96bf3aSLandon J. Fuller static inline void
bhnd_pmu_write_pllctrl(device_t dev,uint32_t reg,uint32_t value,uint32_t mask)1464e96bf3aSLandon J. Fuller bhnd_pmu_write_pllctrl(device_t dev, uint32_t reg, uint32_t value,
1474e96bf3aSLandon J. Fuller     uint32_t mask)
1484e96bf3aSLandon J. Fuller {
1494e96bf3aSLandon J. Fuller 	return (BHND_PMU_WRITE_PLLCTRL(dev, reg, value, mask));
1504e96bf3aSLandon J. Fuller }
1514e96bf3aSLandon J. Fuller 
1524e96bf3aSLandon J. Fuller /**
1534e96bf3aSLandon J. Fuller  * Set a hardware-specific output voltage register value for @p regulator.
1544e96bf3aSLandon J. Fuller  *
1554e96bf3aSLandon J. Fuller  * @param dev PMU device.
1564e96bf3aSLandon J. Fuller  * @param regulator Regulator to be configured.
1574e96bf3aSLandon J. Fuller  * @param value The raw voltage register value.
1584e96bf3aSLandon J. Fuller  *
1594e96bf3aSLandon J. Fuller  * @retval 0 success
1604e96bf3aSLandon J. Fuller  * @retval ENODEV If @p regulator is not supported by this driver.
1614e96bf3aSLandon J. Fuller  */
1624e96bf3aSLandon J. Fuller static inline int
bhnd_pmu_set_voltage_raw(device_t dev,bhnd_pmu_regulator regulator,uint32_t value)1634e96bf3aSLandon J. Fuller bhnd_pmu_set_voltage_raw(device_t dev, bhnd_pmu_regulator regulator,
1644e96bf3aSLandon J. Fuller     uint32_t value)
1654e96bf3aSLandon J. Fuller {
1664e96bf3aSLandon J. Fuller 	return (BHND_PMU_SET_VOLTAGE_RAW(dev, regulator, value));
1674e96bf3aSLandon J. Fuller }
1684e96bf3aSLandon J. Fuller 
1694e96bf3aSLandon J. Fuller /**
1704e96bf3aSLandon J. Fuller  * Enable the given @p regulator.
1714e96bf3aSLandon J. Fuller  *
1724e96bf3aSLandon J. Fuller  * @param dev PMU device.
1734e96bf3aSLandon J. Fuller  * @param regulator Regulator to be enabled.
1744e96bf3aSLandon J. Fuller  *
1754e96bf3aSLandon J. Fuller  * @retval 0 success
1764e96bf3aSLandon J. Fuller  * @retval ENODEV If @p regulator is not supported by this driver.
1774e96bf3aSLandon J. Fuller  */
1784e96bf3aSLandon J. Fuller static inline int
bhnd_pmu_enable_regulator(device_t dev,bhnd_pmu_regulator regulator)1794e96bf3aSLandon J. Fuller bhnd_pmu_enable_regulator(device_t dev, bhnd_pmu_regulator regulator)
1804e96bf3aSLandon J. Fuller {
1814e96bf3aSLandon J. Fuller 	return (BHND_PMU_ENABLE_REGULATOR(dev, regulator));
1824e96bf3aSLandon J. Fuller }
1834e96bf3aSLandon J. Fuller 
1844e96bf3aSLandon J. Fuller /**
1854e96bf3aSLandon J. Fuller  * Disable the given @p regulator.
1864e96bf3aSLandon J. Fuller  *
1874e96bf3aSLandon J. Fuller  * @param dev PMU device.
1884e96bf3aSLandon J. Fuller  * @param regulator Regulator to be disabled.
1894e96bf3aSLandon J. Fuller  *
1904e96bf3aSLandon J. Fuller  * @retval 0 success
1914e96bf3aSLandon J. Fuller  * @retval ENODEV If @p regulator is not supported by this driver.
1924e96bf3aSLandon J. Fuller  */
1934e96bf3aSLandon J. Fuller static inline int
bhnd_pmu_disable_regulator(device_t dev,bhnd_pmu_regulator regulator)1944e96bf3aSLandon J. Fuller bhnd_pmu_disable_regulator(device_t dev, bhnd_pmu_regulator regulator)
1954e96bf3aSLandon J. Fuller {
1964e96bf3aSLandon J. Fuller 	return (BHND_PMU_DISABLE_REGULATOR(dev, regulator));
1974e96bf3aSLandon J. Fuller }
1984e96bf3aSLandon J. Fuller 
1994e96bf3aSLandon J. Fuller /**
2004e96bf3aSLandon J. Fuller  * Return the transition latency required for @p clock in microseconds, if
2014e96bf3aSLandon J. Fuller  * known.
2024e96bf3aSLandon J. Fuller  *
2034e96bf3aSLandon J. Fuller  * The BHND_CLOCK_HT latency value is suitable for use as the D11 core's
2044e96bf3aSLandon J. Fuller  * 'fastpwrup_dly' value.
2054e96bf3aSLandon J. Fuller  *
2064e96bf3aSLandon J. Fuller  * @param	dev	PMU device.
2074e96bf3aSLandon J. Fuller  * @param	clock	The clock to be queried for transition latency.
2084e96bf3aSLandon J. Fuller  * @param[out]	latency	On success, the transition latency of @p clock in
2094e96bf3aSLandon J. Fuller  *			microseconds.
2104e96bf3aSLandon J. Fuller  *
2114e96bf3aSLandon J. Fuller  * @retval 0 success
2124e96bf3aSLandon J. Fuller  * @retval ENODEV If the transition latency for @p clock is not available.
2134e96bf3aSLandon J. Fuller  */
2144e96bf3aSLandon J. Fuller static inline int
bhnd_pmu_get_clock_latency(device_t dev,bhnd_clock clock,u_int * latency)2154e96bf3aSLandon J. Fuller bhnd_pmu_get_clock_latency(device_t dev, bhnd_clock clock, u_int *latency)
2164e96bf3aSLandon J. Fuller {
2174e96bf3aSLandon J. Fuller 	return (BHND_PMU_GET_CLOCK_LATENCY(dev, clock, latency));
2184e96bf3aSLandon J. Fuller }
2194e96bf3aSLandon J. Fuller 
2204e96bf3aSLandon J. Fuller /**
2214e96bf3aSLandon J. Fuller  * Return the frequency for @p clock in Hz, if known.
2224e96bf3aSLandon J. Fuller  *
2234e96bf3aSLandon J. Fuller  * @param dev PMU device.
2244e96bf3aSLandon J. Fuller  * @param clock The clock to be queried.
2254e96bf3aSLandon J. Fuller  * @param[out] freq On success, the frequency of @p clock in Hz.
2264e96bf3aSLandon J. Fuller  *
2274e96bf3aSLandon J. Fuller  * @retval 0 success
2284e96bf3aSLandon J. Fuller  * @retval ENODEV If the frequency for @p clock is not available.
2294e96bf3aSLandon J. Fuller  */
2304e96bf3aSLandon J. Fuller static inline int
bhnd_pmu_get_clock_freq(device_t dev,bhnd_clock clock,u_int * freq)2314e96bf3aSLandon J. Fuller bhnd_pmu_get_clock_freq(device_t dev, bhnd_clock clock, u_int *freq)
2324e96bf3aSLandon J. Fuller {
2334e96bf3aSLandon J. Fuller 	return (BHND_PMU_GET_CLOCK_FREQ(dev, clock, freq));
2344e96bf3aSLandon J. Fuller }
2354e96bf3aSLandon J. Fuller 
2364e96bf3aSLandon J. Fuller /**
2374e96bf3aSLandon J. Fuller  * Request that the PMU configure itself for a given hardware-specific
2384e96bf3aSLandon J. Fuller  * spuravoid mode.
2394e96bf3aSLandon J. Fuller  *
2404e96bf3aSLandon J. Fuller  * @param dev PMU device.
2414e96bf3aSLandon J. Fuller  * @param spuravoid The requested mode.
2424e96bf3aSLandon J. Fuller  *
2434e96bf3aSLandon J. Fuller  * @retval 0 success
2444e96bf3aSLandon J. Fuller  * @retval ENODEV If @p regulator is not supported by this driver.
2454e96bf3aSLandon J. Fuller  */
2464e96bf3aSLandon J. Fuller static inline int
bhnd_pmu_request_spuravoid(device_t dev,bhnd_pmu_spuravoid spuravoid)2474e96bf3aSLandon J. Fuller bhnd_pmu_request_spuravoid(device_t dev, bhnd_pmu_spuravoid spuravoid)
2484e96bf3aSLandon J. Fuller {
2494e96bf3aSLandon J. Fuller 	return (BHND_PMU_REQUEST_SPURAVOID(dev, spuravoid));
2504e96bf3aSLandon J. Fuller }
2514e96bf3aSLandon J. Fuller 
2524e96bf3aSLandon J. Fuller /**
2534e96bf3aSLandon J. Fuller  * Return the PMU's maximum state transition latency in microseconds.
2544e96bf3aSLandon J. Fuller  *
2554e96bf3aSLandon J. Fuller  * This upper bound may be used to busy-wait on PMU clock and resource state
2564e96bf3aSLandon J. Fuller  * transitions.
2574e96bf3aSLandon J. Fuller  *
2584e96bf3aSLandon J. Fuller  * @param dev PMU device.
2594e96bf3aSLandon J. Fuller  */
2604e96bf3aSLandon J. Fuller static inline u_int
bhnd_pmu_get_max_transition_latency(device_t dev)2614e96bf3aSLandon J. Fuller bhnd_pmu_get_max_transition_latency(device_t dev)
2624e96bf3aSLandon J. Fuller {
2634e96bf3aSLandon J. Fuller 	return (BHND_PMU_GET_MAX_TRANSITION_LATENCY(dev));
2644e96bf3aSLandon J. Fuller }
265f90f4b65SLandon J. Fuller 
266f90f4b65SLandon J. Fuller #endif /* _BHND_CORES_PMU_BHND_PMU_H_ */
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