1*acd884deSSumit Saxena /*
2*acd884deSSumit Saxena * Copyright (c) 2015-2024, Broadcom. All rights reserved. The term
3*acd884deSSumit Saxena * Broadcom refers to Broadcom Limited and/or its subsidiaries.
4*acd884deSSumit Saxena *
5*acd884deSSumit Saxena * Redistribution and use in source and binary forms, with or without
6*acd884deSSumit Saxena * modification, are permitted provided that the following conditions
7*acd884deSSumit Saxena * are met:
8*acd884deSSumit Saxena *
9*acd884deSSumit Saxena * 1. Redistributions of source code must retain the above copyright
10*acd884deSSumit Saxena * notice, this list of conditions and the following disclaimer.
11*acd884deSSumit Saxena * 2. Redistributions in binary form must reproduce the above copyright
12*acd884deSSumit Saxena * notice, this list of conditions and the following disclaimer in
13*acd884deSSumit Saxena * the documentation and/or other materials provided with the
14*acd884deSSumit Saxena * distribution.
15*acd884deSSumit Saxena *
16*acd884deSSumit Saxena * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
17*acd884deSSumit Saxena * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
18*acd884deSSumit Saxena * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19*acd884deSSumit Saxena * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
20*acd884deSSumit Saxena * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21*acd884deSSumit Saxena * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22*acd884deSSumit Saxena * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23*acd884deSSumit Saxena * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24*acd884deSSumit Saxena * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25*acd884deSSumit Saxena * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26*acd884deSSumit Saxena * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27*acd884deSSumit Saxena *
28*acd884deSSumit Saxena * Description: RDMA Controller HW interface (header)
29*acd884deSSumit Saxena */
30*acd884deSSumit Saxena
31*acd884deSSumit Saxena #ifndef __BNXT_QPLIB_RCFW_H__
32*acd884deSSumit Saxena #define __BNXT_QPLIB_RCFW_H__
33*acd884deSSumit Saxena
34*acd884deSSumit Saxena #include <linux/semaphore.h>
35*acd884deSSumit Saxena #include <linux/module.h>
36*acd884deSSumit Saxena #include <linux/netdevice.h>
37*acd884deSSumit Saxena #include <linux/mutex.h>
38*acd884deSSumit Saxena #include <linux/list.h>
39*acd884deSSumit Saxena #include <linux/rculist.h>
40*acd884deSSumit Saxena #include <linux/spinlock.h>
41*acd884deSSumit Saxena #include <linux/pci.h>
42*acd884deSSumit Saxena #include <net/ipv6.h>
43*acd884deSSumit Saxena #include <linux/if_ether.h>
44*acd884deSSumit Saxena #include <linux/debugfs.h>
45*acd884deSSumit Saxena #include <linux/seq_file.h>
46*acd884deSSumit Saxena #include <linux/interrupt.h>
47*acd884deSSumit Saxena #include <linux/vmalloc.h>
48*acd884deSSumit Saxena #include <linux/delay.h>
49*acd884deSSumit Saxena
50*acd884deSSumit Saxena #include "qplib_tlv.h"
51*acd884deSSumit Saxena
52*acd884deSSumit Saxena #define RCFW_CMDQ_TRIG_VAL 1
53*acd884deSSumit Saxena #define RCFW_COMM_PCI_BAR_REGION 0
54*acd884deSSumit Saxena #define RCFW_COMM_CONS_PCI_BAR_REGION 2
55*acd884deSSumit Saxena #define RCFW_COMM_BASE_OFFSET 0x600
56*acd884deSSumit Saxena #define RCFW_PF_VF_COMM_PROD_OFFSET 0xc
57*acd884deSSumit Saxena #define RCFW_COMM_TRIG_OFFSET 0x100
58*acd884deSSumit Saxena #define RCFW_COMM_SIZE 0x104
59*acd884deSSumit Saxena
60*acd884deSSumit Saxena #define RCFW_DBR_PCI_BAR_REGION 2
61*acd884deSSumit Saxena #define RCFW_DBR_BASE_PAGE_SHIFT 12
62*acd884deSSumit Saxena #define RCFW_MAX_LATENCY_SEC_SLAB_INDEX 128
63*acd884deSSumit Saxena #define RCFW_MAX_LATENCY_MSEC_SLAB_INDEX 3000
64*acd884deSSumit Saxena #define RCFW_MAX_STAT_INDEX 0xFFFF
65*acd884deSSumit Saxena #define RCFW_FW_STALL_MAX_TIMEOUT 40
66*acd884deSSumit Saxena
67*acd884deSSumit Saxena #define GET_OPCODE_TYPE(x) \
68*acd884deSSumit Saxena ((x) == 0x1 ? "CREATE_QP": \
69*acd884deSSumit Saxena ((x) == 0x2 ? "DESTROY_QP": \
70*acd884deSSumit Saxena ((x) == 0x3 ? "MODIFY_QP": \
71*acd884deSSumit Saxena ((x) == 0x4 ? "QUERY_QP": \
72*acd884deSSumit Saxena ((x) == 0x5 ? "CREATE_SRQ": \
73*acd884deSSumit Saxena ((x) == 0x6 ? "DESTROY_SRQ": \
74*acd884deSSumit Saxena ((x) == 0x8 ? "QUERY_SRQ": \
75*acd884deSSumit Saxena ((x) == 0x9 ? "CREATE_CQ": \
76*acd884deSSumit Saxena ((x) == 0xa ? "DESTROY_CQ": \
77*acd884deSSumit Saxena ((x) == 0xc ? "RESIZE_CQ": \
78*acd884deSSumit Saxena ((x) == 0xd ? "ALLOCATE_MRW": \
79*acd884deSSumit Saxena ((x) == 0xe ? "DEALLOCATE_KEY": \
80*acd884deSSumit Saxena ((x) == 0xf ? "REGISTER_MR": \
81*acd884deSSumit Saxena ((x) == 0x10 ? "DEREGISTER_MR": \
82*acd884deSSumit Saxena ((x) == 0x11 ? "ADD_GID": \
83*acd884deSSumit Saxena ((x) == 0x12 ? "DELETE_GID": \
84*acd884deSSumit Saxena ((x) == 0x17 ? "MODIFY_GID": \
85*acd884deSSumit Saxena ((x) == 0x18 ? "QUERY_GID": \
86*acd884deSSumit Saxena ((x) == 0x13 ? "CREATE_QP1": \
87*acd884deSSumit Saxena ((x) == 0x14 ? "DESTROY_QP1": \
88*acd884deSSumit Saxena ((x) == 0x15 ? "CREATE_AH": \
89*acd884deSSumit Saxena ((x) == 0x16 ? "DESTROY_AH": \
90*acd884deSSumit Saxena ((x) == 0x80 ? "INITIALIZE_FW": \
91*acd884deSSumit Saxena ((x) == 0x81 ? "DEINITIALIZE_FW": \
92*acd884deSSumit Saxena ((x) == 0x82 ? "STOP_FUNC": \
93*acd884deSSumit Saxena ((x) == 0x83 ? "QUERY_FUNC": \
94*acd884deSSumit Saxena ((x) == 0x84 ? "SET_FUNC_RESOURCES": \
95*acd884deSSumit Saxena ((x) == 0x85 ? "READ_CONTEXT": \
96*acd884deSSumit Saxena ((x) == 0x86 ? "VF_BACKCHANNEL_REQUEST": \
97*acd884deSSumit Saxena ((x) == 0x87 ? "READ_VF_MEMORY": \
98*acd884deSSumit Saxena ((x) == 0x88 ? "COMPLETE_VF_REQUEST": \
99*acd884deSSumit Saxena ((x) == 0x89 ? "EXTEND_CONTEXT_ARRRAY": \
100*acd884deSSumit Saxena ((x) == 0x8a ? "MAP_TC_TO_COS": \
101*acd884deSSumit Saxena ((x) == 0x8b ? "QUERY_VERSION": \
102*acd884deSSumit Saxena ((x) == 0x8c ? "MODIFY_ROCE_CC": \
103*acd884deSSumit Saxena ((x) == 0x8d ? "QUERY_ROCE_CC": \
104*acd884deSSumit Saxena ((x) == 0x8e ? "QUERY_ROCE_STATS": \
105*acd884deSSumit Saxena ((x) == 0x8f ? "SET_LINK_AGGR_MODE": \
106*acd884deSSumit Saxena ((x) == 0x90 ? "MODIFY_CQ": \
107*acd884deSSumit Saxena ((x) == 0x91 ? "QUERY_QP_EXTEND": \
108*acd884deSSumit Saxena ((x) == 0x92 ? "QUERY_ROCE_STATS_EXT": \
109*acd884deSSumit Saxena "Unknown OPCODE" \
110*acd884deSSumit Saxena )))))))))))))))))))))))))))))))))))))))))
111*acd884deSSumit Saxena
112*acd884deSSumit Saxena extern unsigned int cmdq_shadow_qd;
113*acd884deSSumit Saxena /* Cmdq contains a fix number of a 16-Byte slots */
114*acd884deSSumit Saxena struct bnxt_qplib_cmdqe {
115*acd884deSSumit Saxena u8 data[16];
116*acd884deSSumit Saxena };
117*acd884deSSumit Saxena #define BNXT_QPLIB_CMDQE_UNITS sizeof(struct bnxt_qplib_cmdqe)
118*acd884deSSumit Saxena
bnxt_qplib_rcfw_cmd_prep(void * r,u8 opcode,u8 cmd_size)119*acd884deSSumit Saxena static inline void bnxt_qplib_rcfw_cmd_prep(void *r, u8 opcode, u8 cmd_size)
120*acd884deSSumit Saxena {
121*acd884deSSumit Saxena struct cmdq_base *req = r;
122*acd884deSSumit Saxena
123*acd884deSSumit Saxena req->opcode = opcode;
124*acd884deSSumit Saxena req->cmd_size = cmd_size;
125*acd884deSSumit Saxena }
126*acd884deSSumit Saxena
127*acd884deSSumit Saxena /* Shadow queue depth for non blocking command */
128*acd884deSSumit Saxena #define RCFW_CMD_NON_BLOCKING_SHADOW_QD 64
129*acd884deSSumit Saxena #define RCFW_CMD_DEV_ERR_CHECK_TIME_MS 1000 /* 1 Second time out*/
130*acd884deSSumit Saxena #define RCFW_ERR_RETRY_COUNT (RCFW_CMD_WAIT_TIME_MS / RCFW_CMD_DEV_ERR_CHECK_TIME_MS)
131*acd884deSSumit Saxena
132*acd884deSSumit Saxena /* CMDQ elements */
133*acd884deSSumit Saxena #define BNXT_QPLIB_CMDQE_MAX_CNT 8192
134*acd884deSSumit Saxena #define BNXT_QPLIB_CMDQE_BYTES (BNXT_QPLIB_CMDQE_MAX_CNT * \
135*acd884deSSumit Saxena BNXT_QPLIB_CMDQE_UNITS)
136*acd884deSSumit Saxena #define BNXT_QPLIB_CMDQE_NPAGES ((BNXT_QPLIB_CMDQE_BYTES % \
137*acd884deSSumit Saxena PAGE_SIZE) ? \
138*acd884deSSumit Saxena ((BNXT_QPLIB_CMDQE_BYTES / \
139*acd884deSSumit Saxena PAGE_SIZE) + 1) : \
140*acd884deSSumit Saxena (BNXT_QPLIB_CMDQE_BYTES / \
141*acd884deSSumit Saxena PAGE_SIZE))
142*acd884deSSumit Saxena #define BNXT_QPLIB_CMDQE_PAGE_SIZE (BNXT_QPLIB_CMDQE_NPAGES * \
143*acd884deSSumit Saxena PAGE_SIZE)
144*acd884deSSumit Saxena
145*acd884deSSumit Saxena #define RCFW_MAX_OUTSTANDING_CMD BNXT_QPLIB_CMDQE_MAX_CNT
146*acd884deSSumit Saxena #define RCFW_MAX_COOKIE_VALUE (BNXT_QPLIB_CMDQE_MAX_CNT - 1)
147*acd884deSSumit Saxena #define RCFW_CMD_IS_BLOCKING 0x8000
148*acd884deSSumit Saxena #define RCFW_NO_FW_ACCESS(rcfw) \
149*acd884deSSumit Saxena (test_bit(ERR_DEVICE_DETACHED, &(rcfw)->cmdq.flags) || \
150*acd884deSSumit Saxena pci_channel_offline((rcfw)->pdev))
151*acd884deSSumit Saxena
152*acd884deSSumit Saxena /* Crsq buf is 1024-Byte */
153*acd884deSSumit Saxena struct bnxt_qplib_crsbe {
154*acd884deSSumit Saxena u8 data[1024];
155*acd884deSSumit Saxena };
156*acd884deSSumit Saxena
157*acd884deSSumit Saxena /* Get the number of command units required for the req. The
158*acd884deSSumit Saxena * function returns correct value only if called before
159*acd884deSSumit Saxena * setting using bnxt_qplib_set_cmd_slots
160*acd884deSSumit Saxena */
bnxt_qplib_get_cmd_slots(struct cmdq_base * req)161*acd884deSSumit Saxena static inline u32 bnxt_qplib_get_cmd_slots(struct cmdq_base *req)
162*acd884deSSumit Saxena {
163*acd884deSSumit Saxena u32 cmd_units = 0;
164*acd884deSSumit Saxena
165*acd884deSSumit Saxena if (HAS_TLV_HEADER(req)) {
166*acd884deSSumit Saxena struct roce_tlv *tlv_req = (struct roce_tlv *)req;
167*acd884deSSumit Saxena cmd_units = tlv_req->total_size;
168*acd884deSSumit Saxena } else {
169*acd884deSSumit Saxena cmd_units = (req->cmd_size + BNXT_QPLIB_CMDQE_UNITS - 1) /
170*acd884deSSumit Saxena BNXT_QPLIB_CMDQE_UNITS;
171*acd884deSSumit Saxena }
172*acd884deSSumit Saxena return cmd_units;
173*acd884deSSumit Saxena }
174*acd884deSSumit Saxena
175*acd884deSSumit Saxena /* Set the cmd_size to a factor of CMDQE unit */
bnxt_qplib_set_cmd_slots(struct cmdq_base * req)176*acd884deSSumit Saxena static inline u32 bnxt_qplib_set_cmd_slots(struct cmdq_base *req)
177*acd884deSSumit Saxena {
178*acd884deSSumit Saxena u32 cmd_byte = 0;
179*acd884deSSumit Saxena
180*acd884deSSumit Saxena if (HAS_TLV_HEADER(req)) {
181*acd884deSSumit Saxena struct roce_tlv *tlv_req = (struct roce_tlv *)req;
182*acd884deSSumit Saxena cmd_byte = tlv_req->total_size * BNXT_QPLIB_CMDQE_UNITS;
183*acd884deSSumit Saxena } else {
184*acd884deSSumit Saxena cmd_byte = req->cmd_size;
185*acd884deSSumit Saxena req->cmd_size = (req->cmd_size + BNXT_QPLIB_CMDQE_UNITS - 1) /
186*acd884deSSumit Saxena BNXT_QPLIB_CMDQE_UNITS;
187*acd884deSSumit Saxena }
188*acd884deSSumit Saxena
189*acd884deSSumit Saxena return cmd_byte;
190*acd884deSSumit Saxena }
191*acd884deSSumit Saxena
192*acd884deSSumit Saxena /* CREQ */
193*acd884deSSumit Saxena /* Allocate 1 per QP for async error notification for now */
194*acd884deSSumit Saxena #define BNXT_QPLIB_CREQE_MAX_CNT (64 * 1024)
195*acd884deSSumit Saxena #define BNXT_QPLIB_CREQE_UNITS 16 /* 16-Bytes per prod unit */
196*acd884deSSumit Saxena
197*acd884deSSumit Saxena #define CREQ_CMP_VALID(hdr, pass) \
198*acd884deSSumit Saxena (!!((hdr)->v & CREQ_BASE_V) == \
199*acd884deSSumit Saxena !(pass & BNXT_QPLIB_FLAG_EPOCH_CONS_MASK))
200*acd884deSSumit Saxena
201*acd884deSSumit Saxena #define CREQ_ENTRY_POLL_BUDGET 8
202*acd884deSSumit Saxena
203*acd884deSSumit Saxena typedef int (*aeq_handler_t)(struct bnxt_qplib_rcfw *, void *, void *);
204*acd884deSSumit Saxena
205*acd884deSSumit Saxena struct bnxt_qplib_crsqe {
206*acd884deSSumit Saxena struct creq_qp_event *resp;
207*acd884deSSumit Saxena u32 req_size;
208*acd884deSSumit Saxena bool is_waiter_alive;
209*acd884deSSumit Saxena bool is_internal_cmd;
210*acd884deSSumit Saxena bool is_in_used;
211*acd884deSSumit Saxena
212*acd884deSSumit Saxena /* Free slots at the time of submission */
213*acd884deSSumit Saxena u32 free_slots;
214*acd884deSSumit Saxena unsigned long send_timestamp;
215*acd884deSSumit Saxena u8 opcode;
216*acd884deSSumit Saxena u8 requested_qp_state;
217*acd884deSSumit Saxena };
218*acd884deSSumit Saxena
219*acd884deSSumit Saxena struct bnxt_qplib_rcfw_sbuf {
220*acd884deSSumit Saxena void *sb;
221*acd884deSSumit Saxena dma_addr_t dma_addr;
222*acd884deSSumit Saxena u32 size;
223*acd884deSSumit Saxena };
224*acd884deSSumit Saxena
225*acd884deSSumit Saxena #define BNXT_QPLIB_OOS_COUNT_MASK 0xFFFFFFFF
226*acd884deSSumit Saxena
227*acd884deSSumit Saxena #define FIRMWARE_INITIALIZED_FLAG (0)
228*acd884deSSumit Saxena #define FIRMWARE_FIRST_FLAG (31)
229*acd884deSSumit Saxena #define FIRMWARE_STALL_DETECTED (3)
230*acd884deSSumit Saxena #define ERR_DEVICE_DETACHED (4)
231*acd884deSSumit Saxena struct bnxt_qplib_cmdq_mbox {
232*acd884deSSumit Saxena struct bnxt_qplib_reg_desc reg;
233*acd884deSSumit Saxena void __iomem *prod;
234*acd884deSSumit Saxena void __iomem *db;
235*acd884deSSumit Saxena };
236*acd884deSSumit Saxena
237*acd884deSSumit Saxena struct bnxt_qplib_cmdq_ctx {
238*acd884deSSumit Saxena struct bnxt_qplib_hwq hwq;
239*acd884deSSumit Saxena struct bnxt_qplib_cmdq_mbox cmdq_mbox;
240*acd884deSSumit Saxena wait_queue_head_t waitq;
241*acd884deSSumit Saxena unsigned long flags;
242*acd884deSSumit Saxena unsigned long last_seen;
243*acd884deSSumit Saxena u32 seq_num;
244*acd884deSSumit Saxena };
245*acd884deSSumit Saxena
246*acd884deSSumit Saxena struct bnxt_qplib_creq_db {
247*acd884deSSumit Saxena struct bnxt_qplib_reg_desc reg;
248*acd884deSSumit Saxena void __iomem *db;
249*acd884deSSumit Saxena struct bnxt_qplib_db_info dbinfo;
250*acd884deSSumit Saxena };
251*acd884deSSumit Saxena
252*acd884deSSumit Saxena struct bnxt_qplib_creq_stat {
253*acd884deSSumit Saxena u64 creq_arm_count;
254*acd884deSSumit Saxena u64 creq_tasklet_schedule_count;
255*acd884deSSumit Saxena u64 creq_qp_event_processed;
256*acd884deSSumit Saxena u64 creq_func_event_processed;
257*acd884deSSumit Saxena };
258*acd884deSSumit Saxena
259*acd884deSSumit Saxena struct bnxt_qplib_creq_ctx {
260*acd884deSSumit Saxena struct bnxt_qplib_hwq hwq;
261*acd884deSSumit Saxena struct bnxt_qplib_creq_db creq_db;
262*acd884deSSumit Saxena struct bnxt_qplib_creq_stat stats;
263*acd884deSSumit Saxena aeq_handler_t aeq_handler;
264*acd884deSSumit Saxena u16 ring_id;
265*acd884deSSumit Saxena int msix_vec;
266*acd884deSSumit Saxena bool requested;
267*acd884deSSumit Saxena char *irq_name;
268*acd884deSSumit Saxena };
269*acd884deSSumit Saxena
270*acd884deSSumit Saxena /* RCFW Communication Channels */
271*acd884deSSumit Saxena #define BNXT_QPLIB_RCFW_SEND_RETRY_COUNT 4000
272*acd884deSSumit Saxena struct bnxt_qplib_rcfw {
273*acd884deSSumit Saxena struct pci_dev *pdev;
274*acd884deSSumit Saxena struct bnxt_qplib_res *res;
275*acd884deSSumit Saxena struct bnxt_qplib_cmdq_ctx cmdq;
276*acd884deSSumit Saxena struct bnxt_qplib_creq_ctx creq;
277*acd884deSSumit Saxena struct bnxt_qplib_crsqe *crsqe_tbl;
278*acd884deSSumit Saxena u32 rcfw_lat_slab_sec[RCFW_MAX_LATENCY_SEC_SLAB_INDEX];
279*acd884deSSumit Saxena
280*acd884deSSumit Saxena /* Slow path Perf Stats */
281*acd884deSSumit Saxena bool sp_perf_stats_enabled;
282*acd884deSSumit Saxena u32 *rcfw_lat_slab_msec;
283*acd884deSSumit Saxena u64 *qp_create_stats;
284*acd884deSSumit Saxena u64 *qp_destroy_stats;
285*acd884deSSumit Saxena u64 *qp_modify_stats;
286*acd884deSSumit Saxena u64 *mr_create_stats;
287*acd884deSSumit Saxena u64 *mr_destroy_stats;
288*acd884deSSumit Saxena u32 qp_create_stats_id;
289*acd884deSSumit Saxena u32 qp_destroy_stats_id;
290*acd884deSSumit Saxena u32 qp_modify_stats_id;
291*acd884deSSumit Saxena u32 mr_create_stats_id;
292*acd884deSSumit Saxena u32 mr_destroy_stats_id;
293*acd884deSSumit Saxena bool init_oos_stats;
294*acd884deSSumit Saxena u64 oos_prev;
295*acd884deSSumit Saxena u32 num_irq_stopped;
296*acd884deSSumit Saxena u32 num_irq_started;
297*acd884deSSumit Saxena u32 poll_in_intr_en;
298*acd884deSSumit Saxena u32 poll_in_intr_dis;
299*acd884deSSumit Saxena atomic_t rcfw_intr_enabled;
300*acd884deSSumit Saxena u32 cmdq_full_dbg;
301*acd884deSSumit Saxena struct semaphore rcfw_inflight;
302*acd884deSSumit Saxena unsigned int curr_shadow_qd;
303*acd884deSSumit Saxena atomic_t timeout_send;
304*acd884deSSumit Saxena /* cached from chip cctx for quick reference in slow path */
305*acd884deSSumit Saxena u16 max_timeout;
306*acd884deSSumit Saxena };
307*acd884deSSumit Saxena
308*acd884deSSumit Saxena struct bnxt_qplib_cmdqmsg {
309*acd884deSSumit Saxena struct cmdq_base *req;
310*acd884deSSumit Saxena struct creq_base *resp;
311*acd884deSSumit Saxena void *sb;
312*acd884deSSumit Saxena u32 req_sz;
313*acd884deSSumit Saxena u32 res_sz;
314*acd884deSSumit Saxena u8 block;
315*acd884deSSumit Saxena u8 qp_state;
316*acd884deSSumit Saxena };
317*acd884deSSumit Saxena
bnxt_qplib_fill_cmdqmsg(struct bnxt_qplib_cmdqmsg * msg,void * req,void * resp,void * sb,u32 req_sz,u32 res_sz,u8 block)318*acd884deSSumit Saxena static inline void bnxt_qplib_fill_cmdqmsg(struct bnxt_qplib_cmdqmsg *msg,
319*acd884deSSumit Saxena void *req, void *resp, void *sb,
320*acd884deSSumit Saxena u32 req_sz, u32 res_sz, u8 block)
321*acd884deSSumit Saxena {
322*acd884deSSumit Saxena msg->req = req;
323*acd884deSSumit Saxena msg->resp = resp;
324*acd884deSSumit Saxena msg->sb = sb;
325*acd884deSSumit Saxena msg->req_sz = req_sz;
326*acd884deSSumit Saxena msg->res_sz = res_sz;
327*acd884deSSumit Saxena msg->block = block;
328*acd884deSSumit Saxena }
329*acd884deSSumit Saxena
330*acd884deSSumit Saxena void bnxt_qplib_free_rcfw_channel(struct bnxt_qplib_res *res);
331*acd884deSSumit Saxena int bnxt_qplib_alloc_rcfw_channel(struct bnxt_qplib_res *res);
332*acd884deSSumit Saxena void bnxt_qplib_rcfw_stop_irq(struct bnxt_qplib_rcfw *rcfw, bool kill);
333*acd884deSSumit Saxena void bnxt_qplib_disable_rcfw_channel(struct bnxt_qplib_rcfw *rcfw);
334*acd884deSSumit Saxena int bnxt_qplib_rcfw_start_irq(struct bnxt_qplib_rcfw *rcfw, int msix_vector,
335*acd884deSSumit Saxena bool need_init);
336*acd884deSSumit Saxena int bnxt_qplib_enable_rcfw_channel(struct bnxt_qplib_rcfw *rcfw,
337*acd884deSSumit Saxena int msix_vector,
338*acd884deSSumit Saxena int cp_bar_reg_off,
339*acd884deSSumit Saxena aeq_handler_t aeq_handler);
340*acd884deSSumit Saxena
341*acd884deSSumit Saxena struct bnxt_qplib_rcfw_sbuf *bnxt_qplib_rcfw_alloc_sbuf(
342*acd884deSSumit Saxena struct bnxt_qplib_rcfw *rcfw,
343*acd884deSSumit Saxena u32 size);
344*acd884deSSumit Saxena void bnxt_qplib_rcfw_free_sbuf(struct bnxt_qplib_rcfw *rcfw,
345*acd884deSSumit Saxena struct bnxt_qplib_rcfw_sbuf *sbuf);
346*acd884deSSumit Saxena int bnxt_qplib_rcfw_send_message(struct bnxt_qplib_rcfw *rcfw,
347*acd884deSSumit Saxena struct bnxt_qplib_cmdqmsg *msg);
348*acd884deSSumit Saxena
349*acd884deSSumit Saxena int bnxt_qplib_deinit_rcfw(struct bnxt_qplib_rcfw *rcfw);
350*acd884deSSumit Saxena int bnxt_qplib_init_rcfw(struct bnxt_qplib_rcfw *rcfw, int is_virtfn);
351*acd884deSSumit Saxena void bnxt_qplib_mark_qp_error(void *qp_handle);
352*acd884deSSumit Saxena int __check_cmdq_stall(struct bnxt_qplib_rcfw *rcfw,
353*acd884deSSumit Saxena u32 *cur_prod, u32 *cur_cons);
354*acd884deSSumit Saxena #endif
355