1# Firmware configuration file. 2# 3# Global limits (some are hardware limits, others are due to the firmware). 4# nvi = 128 virtual interfaces 5# niqflint = 1023 ingress queues with freelists and/or interrupts 6# nethctrl = 64K Ethernet or ctrl egress queues 7# neq = 64K egress queues of all kinds, including freelists 8# nexactf = 512 MPS TCAM entries, can oversubscribe. 9 10[global] 11 rss_glb_config_mode = basicvirtual 12 rss_glb_config_options = tnlmapen,hashtoeplitz,tnlalllkp 13 14 # PL_TIMEOUT register 15 pl_timeout_value = 200 # the timeout value in units of us 16 17 sge_timer_value = 1, 5, 10, 50, 100, 200 # SGE_TIMER_VALUE* in usecs 18 19 reg[0x10c4] = 0x20000000/0x20000000 # GK_CONTROL, enable 5th thread 20 21 reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT 22 23 #Tick granularities in kbps 24 tsch_ticks = 100000, 10000, 1000, 10 25 26 filterMode = fragmentation, mpshittype, protocol, vlan, port, fcoe 27 filterMask = port, protocol 28 29 tp_pmrx = 20, 512 30 tp_pmrx_pagesize = 16K 31 32 # TP number of RX channels (0 = auto) 33 tp_nrxch = 0 34 35 tp_pmtx = 40, 512 36 tp_pmtx_pagesize = 64K 37 38 # TP number of TX channels (0 = auto) 39 tp_ntxch = 0 40 41 # TP OFLD MTUs 42 tp_mtus = 88, 256, 512, 576, 808, 1024, 1280, 1488, 1500, 2002, 2048, 4096, 4352, 8192, 9000, 9600 43 44 # enable TP_OUT_CONFIG.IPIDSPLITMODE and CRXPKTENC 45 reg[0x7d04] = 0x00010008/0x00010008 46 47 # TP_GLOBAL_CONFIG 48 reg[0x7d08] = 0x00000800/0x00000800 # set IssFromCplEnable 49 50 # TP_PC_CONFIG 51 reg[0x7d48] = 0x00000000/0x00000400 # clear EnableFLMError 52 53 # TP_PC_CONFIG2 54 reg[0x7d4c] = 0x00010000/0x00010000 # set DisableNewPshFlag 55 56 # TP_PARA_REG0 57 reg[0x7d60] = 0x06000000/0x07000000 # set InitCWND to 6 58 59 # TP_PARA_REG3 60 reg[0x7d6c] = 0x28000000/0x28000000 # set EnableTnlCngHdr 61 # set RxMacCheck (Note: 62 # Only for hash filter, 63 # no tcp offload) 64 65 # LE_DB_CONFIG 66 reg[0x19c04] = 0x00000000/0x02040000 # LE IPv4 compression disabled 67 # EXTN_HASH_IPV4 Disable 68 69 # LE_DB_RSP_CODE_0 70 reg[0x19c74] = 0x00000004/0x0000000f # TCAM_ACTV_HIT = 4 71 72 # LE_DB_RSP_CODE_1 73 reg[0x19c78] = 0x08000000/0x0e000000 # HASH_ACTV_HIT = 4 74 75 # LE_DB_HASH_CONFIG 76 reg[0x19c28] = 0x00800000/0x01f00000 # LE Hash bucket size 8, 77 78 # MC configuration 79 mc_mode_brc[0] = 0 # mc0 - 1: enable BRC, 0: enable RBC 80 81# PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by 82# these 4 PFs only. 83[function "0"] 84 wx_caps = all 85 r_caps = all 86 nvi = 1 87 rssnvi = 0 88 niqflint = 2 89 nethctrl = 2 90 neq = 4 91 nexactf = 2 92 cmask = all 93 pmask = 0x1 94 95[function "1"] 96 wx_caps = all 97 r_caps = all 98 nvi = 1 99 rssnvi = 0 100 niqflint = 2 101 nethctrl = 2 102 neq = 4 103 nexactf = 2 104 cmask = all 105 pmask = 0x2 106 107[function "2"] 108 wx_caps = all 109 r_caps = all 110 nvi = 1 111 rssnvi = 0 112 niqflint = 2 113 nethctrl = 2 114 neq = 4 115 nexactf = 2 116 cmask = all 117 pmask = 0x4 118 119[function "3"] 120 wx_caps = all 121 r_caps = all 122 nvi = 1 123 rssnvi = 0 124 niqflint = 2 125 nethctrl = 2 126 neq = 4 127 nexactf = 2 128 cmask = all 129 pmask = 0x8 130 131# PF4 is the resource-rich PF that the bus/nexus driver attaches to. 132# It gets 32 MSI/128 MSI-X vectors. 133[function "4"] 134 wx_caps = all 135 r_caps = all 136 nvi = 32 137 rssnvi = 32 138 niqflint = 512 139 nethctrl = 1024 140 neq = 2048 141 nqpcq = 8192 142 nexactf = 456 143 cmask = all 144 pmask = all 145 nclip = 320 146 147 # TCAM has 6K cells; each region must start at a multiple of 128 cell. 148 # Each entry in these categories takes 2 cells each. nhash will use the 149 # TCAM iff there is room left (that is, the rest don't add up to 3072). 150 nfilter = 2032 151 nserver = 512 152 nhpfilter = 0 153 nhash = 524288 154 protocol = nic_hashfilter 155 tp_l2t = 4096 156 157# PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors. 158# Not used right now. 159[function "5"] 160 nvi = 1 161 rssnvi = 0 162 163# PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors. 164# Not used right now. 165[function "6"] 166 nvi = 1 167 rssnvi = 0 168 169# The following function, 1023, is not an actual PCIE function but is used to 170# configure and reserve firmware internal resources that come from the global 171# resource pool. 172# 173[function "1023"] 174 wx_caps = all 175 r_caps = all 176 nvi = 4 177 rssnvi = 0 178 cmask = all 179 pmask = all 180 nexactf = 8 181 nfilter = 16 182 183 184# For Virtual functions, we only allow NIC functionality and we only allow 185# access to one port (1 << PF). Note that because of limitations in the 186# Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL 187# and GTS registers, the number of Ingress and Egress Queues must be a power 188# of 2. 189# 190[function "0/*"] 191 wx_caps = 0x82 192 r_caps = 0x86 193 nvi = 1 194 rssnvi = 0 195 niqflint = 2 196 nethctrl = 2 197 neq = 4 198 nexactf = 2 199 cmask = all 200 pmask = 0x1 201 202[function "1/*"] 203 wx_caps = 0x82 204 r_caps = 0x86 205 nvi = 1 206 rssnvi = 0 207 niqflint = 2 208 nethctrl = 2 209 neq = 4 210 nexactf = 2 211 cmask = all 212 pmask = 0x2 213 214[function "2/*"] 215 wx_caps = 0x82 216 r_caps = 0x86 217 nvi = 1 218 rssnvi = 0 219 niqflint = 2 220 nethctrl = 2 221 neq = 4 222 nexactf = 2 223 cmask = all 224 pmask = 0x1 225 226[function "3/*"] 227 wx_caps = 0x82 228 r_caps = 0x86 229 nvi = 1 230 rssnvi = 0 231 niqflint = 2 232 nethctrl = 2 233 neq = 4 234 nexactf = 2 235 cmask = all 236 pmask = 0x2 237 238# MPS has 192K buffer space for ingress packets from the wire as well as 239# loopback path of the L2 switch. 240[port "0"] 241 dcb = none 242 #bg_mem = 25 243 #lpbk_mem = 25 244 hwm = 60 245 lwm = 15 246 dwm = 30 247 248[port "1"] 249 dcb = none 250 #bg_mem = 25 251 #lpbk_mem = 25 252 hwm = 60 253 lwm = 15 254 dwm = 30 255 256[fini] 257 version = 0x1 258 checksum = 0x5e0e0eb7 259# 260# 261