xref: /freebsd/sys/dev/cxgbe/tom/t4_tom.h (revision 315ee00f)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2012, 2015 Chelsio Communications, Inc.
5  * All rights reserved.
6  * Written by: Navdeep Parhar <np@FreeBSD.org>
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  *
29  */
30 
31 #ifndef __T4_TOM_H__
32 #define __T4_TOM_H__
33 #include <sys/vmem.h>
34 #include "common/t4_hw.h"
35 #include "common/t4_msg.h"
36 #include "tom/t4_tls.h"
37 
38 #define LISTEN_HASH_SIZE 32
39 
40 /*
41  * Min receive window.  We want it to be large enough to accommodate receive
42  * coalescing, handle jumbo frames, and not trigger sender SWS avoidance.
43  */
44 #define MIN_RCV_WND (24 * 1024U)
45 
46 /*
47  * Max receive window supported by HW in bytes.  Only a small part of it can
48  * be set through option0, the rest needs to be set through RX_DATA_ACK.
49  */
50 #define MAX_RCV_WND ((1U << 27) - 1)
51 
52 #define	DDP_RSVD_WIN (16 * 1024U)
53 #define	SB_DDP_INDICATE	SB_IN_TOE	/* soreceive must respond to indicate */
54 
55 #define USE_DDP_RX_FLOW_CONTROL
56 
57 #define PPOD_SZ(n)	((n) * sizeof(struct pagepod))
58 #define PPOD_SIZE	(PPOD_SZ(1))
59 
60 /* TOE PCB flags */
61 enum {
62 	TPF_ATTACHED	   = (1 << 0),	/* a tcpcb refers to this toepcb */
63 	TPF_FLOWC_WR_SENT  = (1 << 1),	/* firmware flow context WR sent */
64 	TPF_TX_DATA_SENT   = (1 << 2),	/* some data sent */
65 	TPF_TX_SUSPENDED   = (1 << 3),	/* tx suspended for lack of resources */
66 	TPF_SEND_FIN	   = (1 << 4),	/* send FIN after all pending data */
67 	TPF_FIN_SENT	   = (1 << 5),	/* FIN has been sent */
68 	TPF_ABORT_SHUTDOWN = (1 << 6),	/* connection abort is in progress */
69 	TPF_CPL_PENDING    = (1 << 7),	/* haven't received the last CPL */
70 	TPF_SYNQE	   = (1 << 8),	/* synq_entry, not really a toepcb */
71 	TPF_SYNQE_EXPANDED = (1 << 9),	/* toepcb ready, tid context updated */
72 	TPF_TLS_STARTING   = (1 << 10), /* starting TLS receive */
73 	TPF_KTLS           = (1 << 11), /* send TLS records from KTLS */
74 	TPF_INITIALIZED    = (1 << 12), /* init_toepcb has been called */
75 	TPF_TLS_RECEIVE	   = (1 << 13), /* should receive TLS records */
76 	TPF_TLS_RX_QUIESCED = (1 << 14), /* RX quiesced for TLS RX startup */
77 	TPF_WAITING_FOR_FINAL = (1<< 15), /* waiting for wakeup on final CPL */
78 };
79 
80 enum {
81 	DDP_OK		= (1 << 0),	/* OK to turn on DDP */
82 	DDP_SC_REQ	= (1 << 1),	/* state change (on/off) requested */
83 	DDP_ON		= (1 << 2),	/* DDP is turned on */
84 	DDP_BUF0_ACTIVE	= (1 << 3),	/* buffer 0 in use (not invalidated) */
85 	DDP_BUF1_ACTIVE	= (1 << 4),	/* buffer 1 in use (not invalidated) */
86 	DDP_TASK_ACTIVE = (1 << 5),	/* requeue task is queued / running */
87 	DDP_DEAD	= (1 << 6),	/* toepcb is shutting down */
88 };
89 
90 struct bio;
91 struct ctl_sg_entry;
92 struct sockopt;
93 struct offload_settings;
94 
95 /*
96  * Connection parameters for an offloaded connection.  These are mostly (but not
97  * all) hardware TOE parameters.
98  */
99 struct conn_params {
100 	int8_t rx_coalesce;
101 	int8_t cong_algo;
102 	int8_t tc_idx;
103 	int8_t tstamp;
104 	int8_t sack;
105 	int8_t nagle;
106 	int8_t keepalive;
107 	int8_t wscale;
108 	int8_t ecn;
109 	int8_t mtu_idx;
110 	int8_t ulp_mode;
111 	int8_t tx_align;
112 	int16_t txq_idx;	/* ofld_txq = &sc->sge.ofld_txq[txq_idx] */
113 	int16_t rxq_idx;	/* ofld_rxq = &sc->sge.ofld_rxq[rxq_idx] */
114 	int16_t l2t_idx;
115 	uint16_t emss;
116 	uint16_t opt0_bufsize;
117 	u_int sndbuf;		/* controls TP tx pages */
118 };
119 
120 struct ofld_tx_sdesc {
121 	uint32_t plen;		/* payload length */
122 	uint8_t tx_credits;	/* firmware tx credits (unit is 16B) */
123 };
124 
125 struct ppod_region {
126 	u_int pr_start;
127 	u_int pr_len;
128 	u_int pr_page_shift[4];
129 	uint32_t pr_tag_mask;		/* hardware tagmask for this region. */
130 	uint32_t pr_invalid_bit;	/* OR with this to invalidate tag. */
131 	uint32_t pr_alias_mask;		/* AND with tag to get alias bits. */
132 	u_int pr_alias_shift;		/* shift this much for first alias bit. */
133 	vmem_t *pr_arena;
134 };
135 
136 struct ppod_reservation {
137 	struct ppod_region *prsv_pr;
138 	uint32_t prsv_tag;		/* Full tag: pgsz, alias, tag, color */
139 	u_int prsv_nppods;
140 };
141 
142 struct pageset {
143 	TAILQ_ENTRY(pageset) link;
144 	vm_page_t *pages;
145 	int npages;
146 	int flags;
147 	int offset;		/* offset in first page */
148 	int len;
149 	struct ppod_reservation prsv;
150 	struct vmspace *vm;
151 	vm_offset_t start;
152 	u_int vm_timestamp;
153 };
154 
155 TAILQ_HEAD(pagesetq, pageset);
156 
157 #define	PS_PPODS_WRITTEN	0x0001	/* Page pods written to the card. */
158 
159 struct ddp_buffer {
160 	struct pageset *ps;
161 
162 	struct kaiocb *job;
163 	int cancel_pending;
164 };
165 
166 struct ddp_pcb {
167 	u_int flags;
168 	struct ddp_buffer db[2];
169 	TAILQ_HEAD(, pageset) cached_pagesets;
170 	TAILQ_HEAD(, kaiocb) aiojobq;
171 	u_int waiting_count;
172 	u_int active_count;
173 	u_int cached_count;
174 	int active_id;	/* the currently active DDP buffer */
175 	struct task requeue_task;
176 	struct kaiocb *queueing;
177 	struct mtx lock;
178 };
179 
180 struct toepcb {
181 	struct tom_data *td;
182 	struct inpcb *inp;	/* backpointer to host stack's PCB */
183 	u_int flags;		/* miscellaneous flags */
184 	TAILQ_ENTRY(toepcb) link; /* toep_list */
185 	int refcount;
186 	struct vnet *vnet;
187 	struct vi_info *vi;	/* virtual interface */
188 	struct sge_ofld_txq *ofld_txq;
189 	struct sge_ofld_rxq *ofld_rxq;
190 	struct sge_wrq *ctrlq;
191 	struct l2t_entry *l2te;	/* L2 table entry used by this connection */
192 	struct clip_entry *ce;	/* CLIP table entry used by this tid */
193 	int tid;		/* Connection identifier */
194 
195 	/* tx credit handling */
196 	u_int tx_total;		/* total tx WR credits (in 16B units) */
197 	u_int tx_credits;	/* tx WR credits (in 16B units) available */
198 	u_int tx_nocompl;	/* tx WR credits since last compl request */
199 	u_int plen_nocompl;	/* payload since last compl request */
200 
201 	struct conn_params params;
202 
203 	void *ulpcb;
204 	void *ulpcb2;
205 	struct mbufq ulp_pduq;	/* PDUs waiting to be sent out. */
206 	struct mbufq ulp_pdu_reclaimq;
207 
208 	struct ddp_pcb ddp;
209 	struct tls_ofld_info tls;
210 
211 	TAILQ_HEAD(, kaiocb) aiotx_jobq;
212 	struct task aiotx_task;
213 	struct socket *aiotx_so;
214 
215 	/* Tx software descriptor */
216 	uint8_t txsd_total;
217 	uint8_t txsd_pidx;
218 	uint8_t txsd_cidx;
219 	uint8_t txsd_avail;
220 	struct ofld_tx_sdesc txsd[];
221 };
222 
223 static inline int
224 ulp_mode(struct toepcb *toep)
225 {
226 
227 	return (toep->params.ulp_mode);
228 }
229 
230 #define	DDP_LOCK(toep)		mtx_lock(&(toep)->ddp.lock)
231 #define	DDP_UNLOCK(toep)	mtx_unlock(&(toep)->ddp.lock)
232 #define	DDP_ASSERT_LOCKED(toep)	mtx_assert(&(toep)->ddp.lock, MA_OWNED)
233 
234 /*
235  * Compressed state for embryonic connections for a listener.
236  */
237 struct synq_entry {
238 	struct listen_ctx *lctx;	/* backpointer to listen ctx */
239 	struct mbuf *syn;
240 	int flags;			/* same as toepcb's tp_flags */
241 	volatile int ok_to_respond;
242 	volatile u_int refcnt;
243 	int tid;
244 	uint32_t iss;
245 	uint32_t irs;
246 	uint32_t ts;
247 	uint32_t rss_hash;
248 	__be16 tcp_opt; /* from cpl_pass_establish */
249 	struct toepcb *toep;
250 
251 	struct conn_params params;
252 };
253 
254 /* listen_ctx flags */
255 #define LCTX_RPL_PENDING 1	/* waiting for a CPL_PASS_OPEN_RPL */
256 
257 struct listen_ctx {
258 	LIST_ENTRY(listen_ctx) link;	/* listen hash linkage */
259 	volatile int refcount;
260 	int stid;
261 	struct stid_region stid_region;
262 	int flags;
263 	struct inpcb *inp;		/* listening socket's inp */
264 	struct vnet *vnet;
265 	struct sge_wrq *ctrlq;
266 	struct sge_ofld_rxq *ofld_rxq;
267 	struct clip_entry *ce;
268 };
269 
270 /* tcb_histent flags */
271 #define TE_RPL_PENDING	1
272 #define TE_ACTIVE	2
273 
274 /* bits in one 8b tcb_histent sample. */
275 #define TS_RTO			(1 << 0)
276 #define TS_DUPACKS		(1 << 1)
277 #define TS_FASTREXMT		(1 << 2)
278 #define TS_SND_BACKLOGGED	(1 << 3)
279 #define TS_CWND_LIMITED		(1 << 4)
280 #define TS_ECN_ECE		(1 << 5)
281 #define TS_ECN_CWR		(1 << 6)
282 #define TS_RESERVED		(1 << 7)	/* Unused. */
283 
284 struct tcb_histent {
285 	struct mtx te_lock;
286 	struct callout te_callout;
287 	uint64_t te_tcb[TCB_SIZE / sizeof(uint64_t)];
288 	struct adapter *te_adapter;
289 	u_int te_flags;
290 	u_int te_tid;
291 	uint8_t te_pidx;
292 	uint8_t te_sample[100];
293 };
294 
295 struct tom_data {
296 	struct toedev tod;
297 
298 	/* toepcb's associated with this TOE device */
299 	struct mtx toep_list_lock;
300 	TAILQ_HEAD(, toepcb) toep_list;
301 
302 	struct mtx lctx_hash_lock;
303 	LIST_HEAD(, listen_ctx) *listen_hash;
304 	u_long listen_mask;
305 	int lctx_count;		/* # of lctx in the hash table */
306 
307 	struct ppod_region pr;
308 
309 	struct rwlock tcb_history_lock __aligned(CACHE_LINE_SIZE);
310 	struct tcb_histent **tcb_history;
311 	int dupack_threshold;
312 
313 	/* WRs that will not be sent to the chip because L2 resolution failed */
314 	struct mtx unsent_wr_lock;
315 	STAILQ_HEAD(, wrqe) unsent_wr_list;
316 	struct task reclaim_wr_resources;
317 };
318 
319 static inline struct tom_data *
320 tod_td(struct toedev *tod)
321 {
322 
323 	return (__containerof(tod, struct tom_data, tod));
324 }
325 
326 static inline struct adapter *
327 td_adapter(struct tom_data *td)
328 {
329 
330 	return (td->tod.tod_softc);
331 }
332 
333 static inline void
334 set_mbuf_raw_wr(struct mbuf *m, bool raw)
335 {
336 
337 	M_ASSERTPKTHDR(m);
338 	m->m_pkthdr.PH_per.eight[6] = raw;
339 }
340 
341 static inline bool
342 mbuf_raw_wr(struct mbuf *m)
343 {
344 
345 	M_ASSERTPKTHDR(m);
346 	return (m->m_pkthdr.PH_per.eight[6]);
347 }
348 
349 static inline void
350 set_mbuf_ulp_submode(struct mbuf *m, uint8_t ulp_submode)
351 {
352 
353 	M_ASSERTPKTHDR(m);
354 	m->m_pkthdr.PH_per.eight[0] = ulp_submode;
355 }
356 
357 static inline uint8_t
358 mbuf_ulp_submode(struct mbuf *m)
359 {
360 
361 	M_ASSERTPKTHDR(m);
362 	return (m->m_pkthdr.PH_per.eight[0]);
363 }
364 
365 static inline void
366 set_mbuf_iscsi_iso(struct mbuf *m, bool iso)
367 {
368 
369 	M_ASSERTPKTHDR(m);
370 	m->m_pkthdr.PH_per.eight[1] = iso;
371 }
372 
373 static inline bool
374 mbuf_iscsi_iso(struct mbuf *m)
375 {
376 
377 	M_ASSERTPKTHDR(m);
378 	return (m->m_pkthdr.PH_per.eight[1]);
379 }
380 
381 /* Flags for iSCSI segmentation offload. */
382 #define	CXGBE_ISO_TYPE(flags)	((flags) & 0x3)
383 #define	CXGBE_ISO_F		0x4
384 
385 static inline void
386 set_mbuf_iscsi_iso_flags(struct mbuf *m, uint8_t flags)
387 {
388 
389 	M_ASSERTPKTHDR(m);
390 	m->m_pkthdr.PH_per.eight[2] = flags;
391 }
392 
393 static inline uint8_t
394 mbuf_iscsi_iso_flags(struct mbuf *m)
395 {
396 
397 	M_ASSERTPKTHDR(m);
398 	return (m->m_pkthdr.PH_per.eight[2]);
399 }
400 
401 static inline void
402 set_mbuf_iscsi_iso_mss(struct mbuf *m, uint16_t mss)
403 {
404 
405 	M_ASSERTPKTHDR(m);
406 	m->m_pkthdr.PH_per.sixteen[2] = mss;
407 }
408 
409 static inline uint16_t
410 mbuf_iscsi_iso_mss(struct mbuf *m)
411 {
412 
413 	M_ASSERTPKTHDR(m);
414 	return (m->m_pkthdr.PH_per.sixteen[2]);
415 }
416 
417 /* t4_tom.c */
418 struct toepcb *alloc_toepcb(struct vi_info *, int);
419 int init_toepcb(struct vi_info *, struct toepcb *);
420 struct toepcb *hold_toepcb(struct toepcb *);
421 void free_toepcb(struct toepcb *);
422 void offload_socket(struct socket *, struct toepcb *);
423 void restore_so_proto(struct socket *, bool);
424 void undo_offload_socket(struct socket *);
425 void final_cpl_received(struct toepcb *);
426 void insert_tid(struct adapter *, int, void *, int);
427 void *lookup_tid(struct adapter *, int);
428 void update_tid(struct adapter *, int, void *);
429 void remove_tid(struct adapter *, int, int);
430 u_long select_rcv_wnd(struct socket *);
431 int select_rcv_wscale(void);
432 void init_conn_params(struct vi_info *, struct offload_settings *,
433     struct in_conninfo *, struct socket *, const struct tcp_options *, int16_t,
434     struct conn_params *cp);
435 __be64 calc_options0(struct vi_info *, struct conn_params *);
436 __be32 calc_options2(struct vi_info *, struct conn_params *);
437 uint64_t select_ntuple(struct vi_info *, struct l2t_entry *);
438 int negative_advice(int);
439 int add_tid_to_history(struct adapter *, u_int);
440 
441 /* t4_connect.c */
442 void t4_init_connect_cpl_handlers(void);
443 void t4_uninit_connect_cpl_handlers(void);
444 int t4_connect(struct toedev *, struct socket *, struct nhop_object *,
445     struct sockaddr *);
446 void act_open_failure_cleanup(struct adapter *, u_int, u_int);
447 
448 /* t4_listen.c */
449 void t4_init_listen_cpl_handlers(void);
450 void t4_uninit_listen_cpl_handlers(void);
451 int t4_listen_start(struct toedev *, struct tcpcb *);
452 int t4_listen_stop(struct toedev *, struct tcpcb *);
453 void t4_syncache_added(struct toedev *, void *);
454 void t4_syncache_removed(struct toedev *, void *);
455 int t4_syncache_respond(struct toedev *, void *, struct mbuf *);
456 int do_abort_req_synqe(struct sge_iq *, const struct rss_header *,
457     struct mbuf *);
458 int do_abort_rpl_synqe(struct sge_iq *, const struct rss_header *,
459     struct mbuf *);
460 void t4_offload_socket(struct toedev *, void *, struct socket *);
461 void synack_failure_cleanup(struct adapter *, int);
462 
463 /* t4_cpl_io.c */
464 void aiotx_init_toep(struct toepcb *);
465 int t4_aio_queue_aiotx(struct socket *, struct kaiocb *);
466 void t4_init_cpl_io_handlers(void);
467 void t4_uninit_cpl_io_handlers(void);
468 void send_abort_rpl(struct adapter *, struct sge_ofld_txq *, int , int);
469 void send_flowc_wr(struct toepcb *, struct tcpcb *);
470 void send_reset(struct adapter *, struct toepcb *, uint32_t);
471 int send_rx_credits(struct adapter *, struct toepcb *, int);
472 void make_established(struct toepcb *, uint32_t, uint32_t, uint16_t);
473 int t4_close_conn(struct adapter *, struct toepcb *);
474 void t4_rcvd(struct toedev *, struct tcpcb *);
475 void t4_rcvd_locked(struct toedev *, struct tcpcb *);
476 int t4_tod_output(struct toedev *, struct tcpcb *);
477 int t4_send_fin(struct toedev *, struct tcpcb *);
478 int t4_send_rst(struct toedev *, struct tcpcb *);
479 void t4_set_tcb_field(struct adapter *, struct sge_wrq *, struct toepcb *,
480     uint16_t, uint64_t, uint64_t, int, int);
481 void t4_push_frames(struct adapter *, struct toepcb *, int);
482 void t4_push_pdus(struct adapter *, struct toepcb *, int);
483 
484 /* t4_ddp.c */
485 int t4_init_ppod_region(struct ppod_region *, struct t4_range *, u_int,
486     const char *);
487 void t4_free_ppod_region(struct ppod_region *);
488 int t4_alloc_page_pods_for_ps(struct ppod_region *, struct pageset *);
489 int t4_alloc_page_pods_for_bio(struct ppod_region *, struct bio *,
490     struct ppod_reservation *);
491 int t4_alloc_page_pods_for_buf(struct ppod_region *, vm_offset_t, int,
492     struct ppod_reservation *);
493 int t4_alloc_page_pods_for_sgl(struct ppod_region *, struct ctl_sg_entry *, int,
494     struct ppod_reservation *);
495 int t4_write_page_pods_for_ps(struct adapter *, struct sge_wrq *, int,
496     struct pageset *);
497 int t4_write_page_pods_for_bio(struct adapter *, struct toepcb *,
498     struct ppod_reservation *, struct bio *, struct mbufq *);
499 int t4_write_page_pods_for_buf(struct adapter *, struct toepcb *,
500     struct ppod_reservation *, vm_offset_t, int, struct mbufq *);
501 int t4_write_page_pods_for_sgl(struct adapter *, struct toepcb *,
502     struct ppod_reservation *, struct ctl_sg_entry *, int, int, struct mbufq *);
503 void t4_free_page_pods(struct ppod_reservation *);
504 int t4_aio_queue_ddp(struct socket *, struct kaiocb *);
505 void t4_ddp_mod_load(void);
506 void t4_ddp_mod_unload(void);
507 void ddp_assert_empty(struct toepcb *);
508 void ddp_init_toep(struct toepcb *);
509 void ddp_uninit_toep(struct toepcb *);
510 void ddp_queue_toep(struct toepcb *);
511 void release_ddp_resources(struct toepcb *toep);
512 void handle_ddp_close(struct toepcb *, struct tcpcb *, uint32_t);
513 void handle_ddp_indicate(struct toepcb *);
514 void insert_ddp_data(struct toepcb *, uint32_t);
515 const struct offload_settings *lookup_offload_policy(struct adapter *, int,
516     struct mbuf *, uint16_t, struct inpcb *);
517 
518 /* t4_tls.c */
519 bool can_tls_offload(struct adapter *);
520 void do_rx_data_tls(const struct cpl_rx_data *, struct toepcb *, struct mbuf *);
521 void t4_push_ktls(struct adapter *, struct toepcb *, int);
522 void tls_received_starting_data(struct adapter *, struct toepcb *,
523     struct sockbuf *, int);
524 void t4_tls_mod_load(void);
525 void t4_tls_mod_unload(void);
526 void tls_init_toep(struct toepcb *);
527 int tls_tx_key(struct toepcb *);
528 void tls_uninit_toep(struct toepcb *);
529 int tls_alloc_ktls(struct toepcb *, struct ktls_session *, int);
530 
531 #endif
532