xref: /freebsd/sys/dev/dc/dcphy.c (revision 9768746b)
1 /*-
2  * SPDX-License-Identifier: BSD-4-Clause
3  *
4  * Copyright (c) 1997, 1998, 1999
5  *	Bill Paul <wpaul@ee.columbia.edu>.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Bill Paul.
18  * 4. Neither the name of the author nor the names of any co-contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32  * THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
37 
38 /*
39  * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
40  * controllers.  Technically we're abusing the miibus code to handle
41  * media selection and NWAY support here since there is no MII
42  * interface.  However the logical operations are roughly the same,
43  * and the alternative is to create a fake MII interface in the driver,
44  * which is harder to do.
45  */
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
50 #include <sys/socket.h>
51 #include <sys/errno.h>
52 #include <sys/lock.h>
53 #include <sys/module.h>
54 #include <sys/mutex.h>
55 #include <sys/bus.h>
56 
57 #include <net/if.h>
58 #include <net/if_var.h>
59 #include <net/if_arp.h>
60 #include <net/if_media.h>
61 
62 #include <dev/mii/mii.h>
63 #include <dev/mii/miivar.h>
64 #include "miidevs.h"
65 
66 #include <machine/bus.h>
67 #include <machine/resource.h>
68 
69 #include <dev/pci/pcivar.h>
70 
71 #include <dev/dc/if_dcreg.h>
72 
73 #include "miibus_if.h"
74 
75 #define DC_SETBIT(sc, reg, x)                           \
76         CSR_WRITE_4(sc, reg,                            \
77                 CSR_READ_4(sc, reg) | x)
78 
79 #define DC_CLRBIT(sc, reg, x)                           \
80         CSR_WRITE_4(sc, reg,                            \
81                 CSR_READ_4(sc, reg) & ~x)
82 
83 #define MIIF_AUTOTIMEOUT	0x0004
84 
85 /*
86  * This is the subsystem ID for the built-in 21143 ethernet
87  * in several Compaq Presario systems.  Apparently these are
88  * 10Mbps only, so we need to treat them specially.
89  */
90 #define COMPAQ_PRESARIO_ID	0xb0bb0e11
91 
92 static int dcphy_probe(device_t);
93 static int dcphy_attach(device_t);
94 
95 static device_method_t dcphy_methods[] = {
96 	/* device interface */
97 	DEVMETHOD(device_probe,		dcphy_probe),
98 	DEVMETHOD(device_attach,	dcphy_attach),
99 	DEVMETHOD(device_detach,	mii_phy_detach),
100 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
101 	DEVMETHOD_END
102 };
103 
104 static driver_t dcphy_driver = {
105 	"dcphy",
106 	dcphy_methods,
107 	sizeof(struct mii_softc)
108 };
109 
110 DRIVER_MODULE(dcphy, miibus, dcphy_driver, 0, 0);
111 
112 static int	dcphy_service(struct mii_softc *, struct mii_data *, int);
113 static void	dcphy_status(struct mii_softc *);
114 static void	dcphy_reset(struct mii_softc *);
115 static int	dcphy_auto(struct mii_softc *);
116 
117 static const struct mii_phy_funcs dcphy_funcs = {
118 	dcphy_service,
119 	dcphy_status,
120 	dcphy_reset
121 };
122 
123 static int
124 dcphy_probe(device_t dev)
125 {
126 	struct mii_attach_args *ma;
127 
128 	ma = device_get_ivars(dev);
129 
130 	/*
131 	 * The dc driver will report the 21143 vendor and device
132 	 * ID to let us know that it wants us to attach.
133 	 */
134 	if (ma->mii_id1 != DC_VENDORID_DEC ||
135 	    ma->mii_id2 != DC_DEVICEID_21143)
136 		return (ENXIO);
137 
138 	device_set_desc(dev, "Intel 21143 NWAY media interface");
139 
140 	return (BUS_PROBE_DEFAULT);
141 }
142 
143 static int
144 dcphy_attach(device_t dev)
145 {
146 	struct mii_softc *sc;
147 	struct dc_softc		*dc_sc;
148 	device_t brdev;
149 
150 	sc = device_get_softc(dev);
151 
152 	mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE,
153 	    &dcphy_funcs, 0);
154 
155 	/*PHY_RESET(sc);*/
156 	dc_sc = if_getsoftc(sc->mii_pdata->mii_ifp);
157 	CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
158 	CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
159 
160 	brdev = device_get_parent(sc->mii_dev);
161 	switch (pci_get_subdevice(brdev) << 16 | pci_get_subvendor(brdev)) {
162 	case COMPAQ_PRESARIO_ID:
163 		/* Example of how to only allow 10Mbps modes. */
164 		sc->mii_capabilities = BMSR_ANEG | BMSR_10TFDX | BMSR_10THDX;
165 		break;
166 	default:
167 		if (dc_sc->dc_pmode == DC_PMODE_SIA)
168 			sc->mii_capabilities =
169 			    BMSR_ANEG | BMSR_10TFDX | BMSR_10THDX;
170 		else
171 			sc->mii_capabilities =
172 			    BMSR_ANEG | BMSR_100TXFDX | BMSR_100TXHDX |
173 			    BMSR_10TFDX | BMSR_10THDX;
174 		break;
175 	}
176 
177 	sc->mii_capabilities &= sc->mii_capmask;
178 	device_printf(dev, " ");
179 	mii_phy_add_media(sc);
180 	printf("\n");
181 
182 	MIIBUS_MEDIAINIT(sc->mii_dev);
183 	return (0);
184 }
185 
186 static int
187 dcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
188 {
189 	struct dc_softc		*dc_sc;
190 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
191 	int reg;
192 	u_int32_t		mode;
193 
194 	dc_sc = if_getsoftc(mii->mii_ifp);
195 
196 	switch (cmd) {
197 	case MII_POLLSTAT:
198 		break;
199 
200 	case MII_MEDIACHG:
201 		/*
202 		 * If the interface is not up, don't do anything.
203 		 */
204 		if ((if_getflags(mii->mii_ifp) & IFF_UP) == 0)
205 			break;
206 
207 		mii->mii_media_active = IFM_NONE;
208 		mode = CSR_READ_4(dc_sc, DC_NETCFG);
209 		mode &= ~(DC_NETCFG_FULLDUPLEX | DC_NETCFG_PORTSEL |
210 		    DC_NETCFG_PCS | DC_NETCFG_SCRAMBLER | DC_NETCFG_SPEEDSEL);
211 
212 		switch (IFM_SUBTYPE(ife->ifm_media)) {
213 		case IFM_AUTO:
214 			/*PHY_RESET(sc);*/
215 			(void)dcphy_auto(sc);
216 			break;
217 		case IFM_100_TX:
218 			PHY_RESET(sc);
219 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
220 			mode |= DC_NETCFG_PORTSEL | DC_NETCFG_PCS |
221 			    DC_NETCFG_SCRAMBLER;
222 			if ((ife->ifm_media & IFM_FDX) != 0)
223 				mode |= DC_NETCFG_FULLDUPLEX;
224 			else
225 				mode &= ~DC_NETCFG_FULLDUPLEX;
226 			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
227 			break;
228 		case IFM_10_T:
229 			DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
230 			DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
231 			if ((ife->ifm_media & IFM_FDX) != 0)
232 				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
233 			else
234 				DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
235 			DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
236 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
237 			mode &= ~DC_NETCFG_PORTSEL;
238 			mode |= DC_NETCFG_SPEEDSEL;
239 			if ((ife->ifm_media & IFM_FDX) != 0)
240 				mode |= DC_NETCFG_FULLDUPLEX;
241 			else
242 				mode &= ~DC_NETCFG_FULLDUPLEX;
243 			CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
244 			break;
245 		default:
246 			return (EINVAL);
247 		}
248 		break;
249 
250 	case MII_TICK:
251 		/*
252 		 * Is the interface even up?
253 		 */
254 		if ((if_getflags(mii->mii_ifp) & IFF_UP) == 0)
255 			return (0);
256 
257 		/*
258 		 * Only used for autonegotiation.
259 		 */
260 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
261 			break;
262 
263 		reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
264 		if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
265 			break;
266 
267                 /*
268                  * Only retry autonegotiation every 5 seconds.
269 		 *
270 		 * Otherwise, fall through to calling dcphy_status()
271 		 * since real Intel 21143 chips don't show valid link
272 		 * status until autonegotiation is switched off, and
273 		 * that only happens in dcphy_status().  Without this,
274 		 * successful autonegotiation is never recognised on
275 		 * these chips.
276                  */
277                 if (++sc->mii_ticks <= 50)
278 			break;
279 
280 		sc->mii_ticks = 0;
281 		dcphy_auto(sc);
282 
283 		break;
284 	}
285 
286 	/* Update the media status. */
287 	PHY_STATUS(sc);
288 
289 	/* Callback if something changed. */
290 	mii_phy_update(sc, cmd);
291 	return (0);
292 }
293 
294 static void
295 dcphy_status(struct mii_softc *sc)
296 {
297 	struct mii_data *mii = sc->mii_pdata;
298 	int anlpar, tstat;
299 	struct dc_softc		*dc_sc;
300 
301 	dc_sc = if_getsoftc(mii->mii_ifp);
302 
303 	mii->mii_media_status = IFM_AVALID;
304 	mii->mii_media_active = IFM_ETHER;
305 
306 	if ((if_getflags(mii->mii_ifp) & IFF_UP) == 0)
307 		return;
308 
309 	tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
310 	if (!(tstat & DC_TSTAT_LS10) || !(tstat & DC_TSTAT_LS100))
311 		mii->mii_media_status |= IFM_ACTIVE;
312 
313 	if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
314 		/* Erg, still trying, I guess... */
315 		if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
316 			if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
317 			    (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
318 				goto skip;
319 			mii->mii_media_active |= IFM_NONE;
320 			return;
321 		}
322 
323 		if (tstat & DC_TSTAT_LP_CAN_NWAY) {
324 			anlpar = tstat >> 16;
325 			if (anlpar & ANLPAR_TX_FD &&
326 			    sc->mii_capabilities & BMSR_100TXFDX)
327 				mii->mii_media_active |= IFM_100_TX | IFM_FDX;
328 			else if (anlpar & ANLPAR_T4 &&
329 			    sc->mii_capabilities & BMSR_100T4)
330 				mii->mii_media_active |= IFM_100_T4 | IFM_HDX;
331 			else if (anlpar & ANLPAR_TX &&
332 			    sc->mii_capabilities & BMSR_100TXHDX)
333 				mii->mii_media_active |= IFM_100_TX | IFM_HDX;
334 			else if (anlpar & ANLPAR_10_FD)
335 				mii->mii_media_active |= IFM_10_T | IFM_FDX;
336 			else if (anlpar & ANLPAR_10)
337 				mii->mii_media_active |= IFM_10_T | IFM_HDX;
338 			else
339 				mii->mii_media_active |= IFM_NONE;
340 			if (DC_IS_INTEL(dc_sc))
341 				DC_CLRBIT(dc_sc, DC_10BTCTRL,
342 				    DC_TCTL_AUTONEGENBL);
343 			return;
344 		}
345 
346 		/*
347 		 * If the other side doesn't support NWAY, then the
348 		 * best we can do is determine if we have a 10Mbps or
349 		 * 100Mbps link.  There's no way to know if the link
350 		 * is full or half duplex, so we default to half duplex
351 		 * and hope that the user is clever enough to manually
352 		 * change the media settings if we're wrong.
353 		 */
354 		if (!(tstat & DC_TSTAT_LS100))
355 			mii->mii_media_active |= IFM_100_TX | IFM_HDX;
356 		else if (!(tstat & DC_TSTAT_LS10))
357 			mii->mii_media_active |= IFM_10_T | IFM_HDX;
358 		else
359 			mii->mii_media_active |= IFM_NONE;
360 		if (DC_IS_INTEL(dc_sc))
361 			DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
362 		return;
363 	}
364 
365 skip:
366 	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
367 		mii->mii_media_active |= IFM_10_T;
368 	else
369 		mii->mii_media_active |= IFM_100_TX;
370 	if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
371 		mii->mii_media_active |= IFM_FDX;
372 	else
373 		mii->mii_media_active |= IFM_HDX;
374 }
375 
376 static int
377 dcphy_auto(struct mii_softc *mii)
378 {
379 	struct dc_softc		*sc;
380 
381 	sc = if_getsoftc(mii->mii_pdata->mii_ifp);
382 
383 	DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
384 	DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
385 	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
386 	if (mii->mii_capabilities & BMSR_100TXHDX)
387 		CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
388 	else
389 		CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
390 	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
391 	DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
392 	DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
393 
394 	return (EJUSTRETURN);
395 }
396 
397 static void
398 dcphy_reset(struct mii_softc *mii)
399 {
400 	struct dc_softc		*sc;
401 
402 	sc = if_getsoftc(mii->mii_pdata->mii_ifp);
403 
404 	DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
405 	DELAY(1000);
406 	DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
407 }
408