1 /*- 2 * Copyright (c) 2016 Justin Hibbits 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/param.h> 28 #include <sys/systm.h> 29 #include <sys/kernel.h> 30 #include <sys/bus.h> 31 #include <sys/module.h> 32 #include <sys/mutex.h> 33 #include <sys/resource.h> 34 #include <sys/socket.h> 35 36 #include <machine/bus.h> 37 38 #include <net/if.h> 39 #include <net/if_media.h> 40 #include <net/if_types.h> 41 #include <net/if_var.h> 42 43 #include <dev/mii/mii.h> 44 #include <dev/mii/miivar.h> 45 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 49 #include <contrib/ncsw/inc/Peripherals/fm_ext.h> 50 51 #include "fman.h" 52 #include "miibus_if.h" 53 54 #define MDIO_LOCK() mtx_lock(&sc->sc_lock) 55 #define MDIO_UNLOCK() mtx_unlock(&sc->sc_lock) 56 #define MDIO_WRITE4(sc,r,v) \ 57 bus_space_write_4(&bs_be_tag, sc->sc_handle, sc->sc_offset + r, v) 58 #define MDIO_READ4(sc, r) \ 59 bus_space_read_4(&bs_be_tag, sc->sc_handle, sc->sc_offset + r) 60 61 #define MDIO_MIIMCFG 0x0 62 #define MDIO_MIIMCOM 0x4 63 #define MIIMCOM_SCAN_CYCLE 0x00000002 64 #define MIIMCOM_READ_CYCLE 0x00000001 65 #define MDIO_MIIMADD 0x8 66 #define MDIO_MIIMCON 0xc 67 #define MDIO_MIIMSTAT 0x10 68 #define MDIO_MIIMIND 0x14 69 #define MIIMIND_BUSY 0x1 70 71 static int pqmdio_fdt_probe(device_t dev); 72 static int pqmdio_fdt_attach(device_t dev); 73 static int pqmdio_detach(device_t dev); 74 static int pqmdio_miibus_readreg(device_t dev, int phy, int reg); 75 static int pqmdio_miibus_writereg(device_t dev, int phy, int reg, int value); 76 77 struct pqmdio_softc { 78 struct mtx sc_lock; 79 bus_space_handle_t sc_handle; 80 int sc_offset; 81 }; 82 83 static device_method_t pqmdio_methods[] = { 84 /* Device interface */ 85 DEVMETHOD(device_probe, pqmdio_fdt_probe), 86 DEVMETHOD(device_attach, pqmdio_fdt_attach), 87 DEVMETHOD(device_detach, pqmdio_detach), 88 89 /* MII interface */ 90 DEVMETHOD(miibus_readreg, pqmdio_miibus_readreg), 91 DEVMETHOD(miibus_writereg, pqmdio_miibus_writereg), 92 93 { 0, 0 } 94 }; 95 96 static struct ofw_compat_data mdio_compat_data[] = { 97 {"fsl,fman-mdio", 0}, 98 {NULL, 0} 99 }; 100 101 static driver_t pqmdio_driver = { 102 "pq_mdio", 103 pqmdio_methods, 104 sizeof(struct pqmdio_softc), 105 }; 106 107 static int 108 pqmdio_fdt_probe(device_t dev) 109 { 110 111 if (!ofw_bus_status_okay(dev)) 112 return (ENXIO); 113 114 if (!ofw_bus_search_compatible(dev, mdio_compat_data)->ocd_str) 115 return (ENXIO); 116 117 device_set_desc(dev, "Freescale QorIQ MDIO"); 118 119 return (BUS_PROBE_DEFAULT); 120 } 121 122 static int 123 pqmdio_fdt_attach(device_t dev) 124 { 125 struct pqmdio_softc *sc; 126 rman_res_t start, count; 127 128 sc = device_get_softc(dev); 129 130 fman_get_bushandle(device_get_parent(dev), &sc->sc_handle); 131 bus_get_resource(dev, SYS_RES_MEMORY, 0, &start, &count); 132 sc->sc_offset = start; 133 134 OF_device_register_xref(OF_xref_from_node(ofw_bus_get_node(dev)), dev); 135 136 mtx_init(&sc->sc_lock, device_get_nameunit(dev), "QorIQ MDIO lock", 137 MTX_DEF); 138 139 return (0); 140 } 141 142 static int 143 pqmdio_detach(device_t dev) 144 { 145 struct pqmdio_softc *sc; 146 147 sc = device_get_softc(dev); 148 149 mtx_destroy(&sc->sc_lock); 150 151 return (0); 152 } 153 154 int 155 pqmdio_miibus_readreg(device_t dev, int phy, int reg) 156 { 157 struct pqmdio_softc *sc; 158 int rv; 159 160 sc = device_get_softc(dev); 161 162 MDIO_LOCK(); 163 164 MDIO_WRITE4(sc, MDIO_MIIMADD, (phy << 8) | reg); 165 MDIO_WRITE4(sc, MDIO_MIIMCOM, MIIMCOM_READ_CYCLE); 166 167 MDIO_READ4(sc, MDIO_MIIMCOM); 168 169 while ((MDIO_READ4(sc, MDIO_MIIMIND)) & MIIMIND_BUSY) 170 ; 171 172 rv = MDIO_READ4(sc, MDIO_MIIMSTAT); 173 174 MDIO_WRITE4(sc, MDIO_MIIMCOM, 0); 175 MDIO_READ4(sc, MDIO_MIIMCOM); 176 MDIO_UNLOCK(); 177 178 return (rv); 179 } 180 181 int 182 pqmdio_miibus_writereg(device_t dev, int phy, int reg, int value) 183 { 184 struct pqmdio_softc *sc; 185 186 sc = device_get_softc(dev); 187 188 MDIO_LOCK(); 189 /* Stop the MII management read cycle */ 190 MDIO_WRITE4(sc, MDIO_MIIMCOM, 0); 191 MDIO_READ4(sc, MDIO_MIIMCOM); 192 193 MDIO_WRITE4(sc, MDIO_MIIMADD, (phy << 8) | reg); 194 195 MDIO_WRITE4(sc, MDIO_MIIMCON, value); 196 MDIO_READ4(sc, MDIO_MIIMCON); 197 198 /* Wait till MII management write is complete */ 199 while ((MDIO_READ4(sc, MDIO_MIIMIND)) & MIIMIND_BUSY) 200 ; 201 MDIO_UNLOCK(); 202 203 return (0); 204 } 205 206 EARLY_DRIVER_MODULE(pqmdio, fman, pqmdio_driver, 0, 0, 207 BUS_PASS_SUPPORTDEV); 208 DRIVER_MODULE(miibus, pqmdio, miibus_driver, 0, 0); 209 MODULE_DEPEND(pqmdio, miibus, 1, 1, 1); 210 211