1 /*- 2 * Copyright (c) 2012 Semihalf. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/kernel.h> 31 #include <sys/module.h> 32 #include <sys/bus.h> 33 #include <sys/rman.h> 34 #include <sys/malloc.h> 35 #include <sys/mbuf.h> 36 #include <sys/socket.h> 37 #include <sys/sysctl.h> 38 #include <sys/sockio.h> 39 40 #include <net/ethernet.h> 41 #include <net/if.h> 42 #include <net/if_dl.h> 43 #include <net/if_media.h> 44 #include <net/if_types.h> 45 #include <net/if_arp.h> 46 47 #include <dev/mii/mii.h> 48 #include <dev/mii/miivar.h> 49 50 #include "miibus_if.h" 51 52 #include <contrib/ncsw/inc/integrations/dpaa_integration_ext.h> 53 #include <contrib/ncsw/inc/Peripherals/fm_ext.h> 54 #include <contrib/ncsw/inc/Peripherals/fm_mac_ext.h> 55 #include <contrib/ncsw/inc/Peripherals/fm_port_ext.h> 56 #include <contrib/ncsw/inc/xx_ext.h> 57 58 #include "fman.h" 59 #include "bman.h" 60 #include "qman.h" 61 #include "if_dtsec.h" 62 #include "if_dtsec_rm.h" 63 64 65 /** 66 * @group dTSEC RM private defines. 67 * @{ 68 */ 69 #define DTSEC_BPOOLS_USED (1) 70 #define DTSEC_MAX_TX_QUEUE_LEN 256 71 72 struct dtsec_rm_frame_info { 73 struct mbuf *fi_mbuf; 74 t_DpaaSGTE fi_sgt[DPAA_NUM_OF_SG_TABLE_ENTRY]; 75 }; 76 77 enum dtsec_rm_pool_params { 78 DTSEC_RM_POOL_RX_LOW_MARK = 16, 79 DTSEC_RM_POOL_RX_HIGH_MARK = 64, 80 DTSEC_RM_POOL_RX_MAX_SIZE = 256, 81 82 DTSEC_RM_POOL_FI_LOW_MARK = 16, 83 DTSEC_RM_POOL_FI_HIGH_MARK = 64, 84 DTSEC_RM_POOL_FI_MAX_SIZE = 256, 85 }; 86 87 #define DTSEC_RM_FQR_RX_CHANNEL e_QM_FQ_CHANNEL_POOL1 88 #define DTSEC_RM_FQR_TX_CONF_CHANNEL e_QM_FQ_CHANNEL_SWPORTAL0 89 enum dtsec_rm_fqr_params { 90 DTSEC_RM_FQR_RX_WQ = 1, 91 DTSEC_RM_FQR_TX_WQ = 1, 92 DTSEC_RM_FQR_TX_CONF_WQ = 1 93 }; 94 /** @} */ 95 96 97 /** 98 * @group dTSEC Frame Info routines. 99 * @{ 100 */ 101 void 102 dtsec_rm_fi_pool_free(struct dtsec_softc *sc) 103 { 104 105 if (sc->sc_fi_zone != NULL) 106 uma_zdestroy(sc->sc_fi_zone); 107 } 108 109 int 110 dtsec_rm_fi_pool_init(struct dtsec_softc *sc) 111 { 112 113 snprintf(sc->sc_fi_zname, sizeof(sc->sc_fi_zname), "%s: Frame Info", 114 device_get_nameunit(sc->sc_dev)); 115 116 sc->sc_fi_zone = uma_zcreate(sc->sc_fi_zname, 117 sizeof(struct dtsec_rm_frame_info), NULL, NULL, NULL, NULL, 118 UMA_ALIGN_PTR, 0); 119 if (sc->sc_fi_zone == NULL) 120 return (EIO); 121 122 return (0); 123 } 124 125 static struct dtsec_rm_frame_info * 126 dtsec_rm_fi_alloc(struct dtsec_softc *sc) 127 { 128 struct dtsec_rm_frame_info *fi; 129 130 fi = uma_zalloc(sc->sc_fi_zone, M_NOWAIT); 131 132 return (fi); 133 } 134 135 static void 136 dtsec_rm_fi_free(struct dtsec_softc *sc, struct dtsec_rm_frame_info *fi) 137 { 138 139 uma_zfree(sc->sc_fi_zone, fi); 140 } 141 /** @} */ 142 143 144 /** 145 * @group dTSEC FMan PORT routines. 146 * @{ 147 */ 148 int 149 dtsec_rm_fm_port_rx_init(struct dtsec_softc *sc, int unit) 150 { 151 t_FmPortParams params; 152 t_FmPortRxParams *rx_params; 153 t_FmExtPools *pool_params; 154 t_Error error; 155 156 memset(¶ms, 0, sizeof(params)); 157 158 params.baseAddr = sc->sc_fm_base + sc->sc_port_rx_hw_id; 159 params.h_Fm = sc->sc_fmh; 160 params.portType = dtsec_fm_port_rx_type(sc->sc_eth_dev_type); 161 params.portId = sc->sc_eth_id; 162 params.independentModeEnable = false; 163 params.liodnBase = FM_PORT_LIODN_BASE; 164 params.f_Exception = dtsec_fm_port_rx_exception_callback; 165 params.h_App = sc; 166 167 rx_params = ¶ms.specificParams.rxParams; 168 rx_params->errFqid = sc->sc_rx_fqid; 169 rx_params->dfltFqid = sc->sc_rx_fqid; 170 rx_params->liodnOffset = 0; 171 172 pool_params = &rx_params->extBufPools; 173 pool_params->numOfPoolsUsed = DTSEC_BPOOLS_USED; 174 pool_params->extBufPool->id = sc->sc_rx_bpid; 175 pool_params->extBufPool->size = FM_PORT_BUFFER_SIZE; 176 177 sc->sc_rxph = FM_PORT_Config(¶ms); 178 if (sc->sc_rxph == NULL) { 179 device_printf(sc->sc_dev, "couldn't configure FM Port RX.\n"); 180 return (ENXIO); 181 } 182 183 error = FM_PORT_Init(sc->sc_rxph); 184 if (error != E_OK) { 185 device_printf(sc->sc_dev, "couldn't initialize FM Port RX.\n"); 186 FM_PORT_Free(sc->sc_rxph); 187 return (ENXIO); 188 } 189 190 if (bootverbose) 191 device_printf(sc->sc_dev, "RX hw port 0x%02x initialized.\n", 192 sc->sc_port_rx_hw_id); 193 194 return (0); 195 } 196 197 int 198 dtsec_rm_fm_port_tx_init(struct dtsec_softc *sc, int unit) 199 { 200 t_FmPortParams params; 201 t_FmPortNonRxParams *tx_params; 202 t_Error error; 203 204 memset(¶ms, 0, sizeof(params)); 205 206 params.baseAddr = sc->sc_fm_base + sc->sc_port_tx_hw_id; 207 params.h_Fm = sc->sc_fmh; 208 params.portType = dtsec_fm_port_tx_type(sc->sc_eth_dev_type); 209 params.portId = sc->sc_eth_id; 210 params.independentModeEnable = false; 211 params.liodnBase = FM_PORT_LIODN_BASE; 212 params.f_Exception = dtsec_fm_port_tx_exception_callback; 213 params.h_App = sc; 214 215 tx_params = ¶ms.specificParams.nonRxParams; 216 tx_params->errFqid = sc->sc_tx_conf_fqid; 217 tx_params->dfltFqid = sc->sc_tx_conf_fqid; 218 tx_params->qmChannel = sc->sc_port_tx_qman_chan; 219 #ifdef FM_OP_PARTITION_ERRATA_FMANx8 220 tx_params->opLiodnOffset = 0; 221 #endif 222 223 sc->sc_txph = FM_PORT_Config(¶ms); 224 if (sc->sc_txph == NULL) { 225 device_printf(sc->sc_dev, "couldn't configure FM Port TX.\n"); 226 return (ENXIO); 227 } 228 229 error = FM_PORT_Init(sc->sc_txph); 230 if (error != E_OK) { 231 device_printf(sc->sc_dev, "couldn't initialize FM Port TX.\n"); 232 FM_PORT_Free(sc->sc_txph); 233 return (ENXIO); 234 } 235 236 if (bootverbose) 237 device_printf(sc->sc_dev, "TX hw port 0x%02x initialized.\n", 238 sc->sc_port_tx_hw_id); 239 240 return (0); 241 } 242 /** @} */ 243 244 245 /** 246 * @group dTSEC buffer pools routines. 247 * @{ 248 */ 249 static t_Error 250 dtsec_rm_pool_rx_put_buffer(t_Handle h_BufferPool, uint8_t *buffer, 251 t_Handle context) 252 { 253 struct dtsec_softc *sc; 254 255 sc = h_BufferPool; 256 uma_zfree(sc->sc_rx_zone, buffer); 257 258 return (E_OK); 259 } 260 261 static uint8_t * 262 dtsec_rm_pool_rx_get_buffer(t_Handle h_BufferPool, t_Handle *context) 263 { 264 struct dtsec_softc *sc; 265 uint8_t *buffer; 266 267 sc = h_BufferPool; 268 buffer = uma_zalloc(sc->sc_rx_zone, M_NOWAIT); 269 270 return (buffer); 271 } 272 273 static void 274 dtsec_rm_pool_rx_depleted(t_Handle h_App, bool in) 275 { 276 struct dtsec_softc *sc; 277 unsigned int count; 278 279 sc = h_App; 280 281 if (!in) 282 return; 283 284 while (1) { 285 count = bman_count(sc->sc_rx_pool); 286 if (count > DTSEC_RM_POOL_RX_HIGH_MARK) 287 return; 288 289 bman_pool_fill(sc->sc_rx_pool, DTSEC_RM_POOL_RX_HIGH_MARK); 290 } 291 } 292 293 void 294 dtsec_rm_pool_rx_free(struct dtsec_softc *sc) 295 { 296 297 if (sc->sc_rx_pool != NULL) 298 bman_pool_destroy(sc->sc_rx_pool); 299 300 if (sc->sc_rx_zone != NULL) 301 uma_zdestroy(sc->sc_rx_zone); 302 } 303 304 int 305 dtsec_rm_pool_rx_init(struct dtsec_softc *sc) 306 { 307 308 /* FM_PORT_BUFFER_SIZE must be less than PAGE_SIZE */ 309 CTASSERT(FM_PORT_BUFFER_SIZE < PAGE_SIZE); 310 311 snprintf(sc->sc_rx_zname, sizeof(sc->sc_rx_zname), "%s: RX Buffers", 312 device_get_nameunit(sc->sc_dev)); 313 314 sc->sc_rx_zone = uma_zcreate(sc->sc_rx_zname, FM_PORT_BUFFER_SIZE, NULL, 315 NULL, NULL, NULL, FM_PORT_BUFFER_SIZE - 1, 0); 316 if (sc->sc_rx_zone == NULL) 317 return (EIO); 318 319 sc->sc_rx_pool = bman_pool_create(&sc->sc_rx_bpid, FM_PORT_BUFFER_SIZE, 320 0, 0, DTSEC_RM_POOL_RX_MAX_SIZE, dtsec_rm_pool_rx_get_buffer, 321 dtsec_rm_pool_rx_put_buffer, DTSEC_RM_POOL_RX_LOW_MARK, 322 DTSEC_RM_POOL_RX_HIGH_MARK, 0, 0, dtsec_rm_pool_rx_depleted, sc, NULL, 323 NULL); 324 if (sc->sc_rx_pool == NULL) { 325 device_printf(sc->sc_dev, "NULL rx pool somehow\n"); 326 dtsec_rm_pool_rx_free(sc); 327 return (EIO); 328 } 329 330 return (0); 331 } 332 /** @} */ 333 334 335 /** 336 * @group dTSEC Frame Queue Range routines. 337 * @{ 338 */ 339 static void 340 dtsec_rm_fqr_mext_free(struct mbuf *m) 341 { 342 struct dtsec_softc *sc; 343 void *buffer; 344 345 buffer = m->m_ext.ext_arg1; 346 sc = m->m_ext.ext_arg2; 347 if (bman_count(sc->sc_rx_pool) <= DTSEC_RM_POOL_RX_MAX_SIZE) 348 bman_put_buffer(sc->sc_rx_pool, buffer); 349 else 350 dtsec_rm_pool_rx_put_buffer(sc, buffer, NULL); 351 } 352 353 static e_RxStoreResponse 354 dtsec_rm_fqr_rx_callback(t_Handle app, t_Handle fqr, t_Handle portal, 355 uint32_t fqid_off, t_DpaaFD *frame) 356 { 357 struct dtsec_softc *sc; 358 struct mbuf *m; 359 void *frame_va; 360 361 m = NULL; 362 sc = app; 363 364 frame_va = DPAA_FD_GET_ADDR(frame); 365 KASSERT(DPAA_FD_GET_FORMAT(frame) == e_DPAA_FD_FORMAT_TYPE_SHORT_SBSF, 366 ("%s(): Got unsupported frame format 0x%02X!", __func__, 367 DPAA_FD_GET_FORMAT(frame))); 368 369 KASSERT(DPAA_FD_GET_OFFSET(frame) == 0, 370 ("%s(): Only offset 0 is supported!", __func__)); 371 372 if (DPAA_FD_GET_STATUS(frame) != 0) { 373 device_printf(sc->sc_dev, "RX error: 0x%08X\n", 374 DPAA_FD_GET_STATUS(frame)); 375 goto err; 376 } 377 378 m = m_gethdr(M_NOWAIT, MT_HEADER); 379 if (m == NULL) 380 goto err; 381 382 m_extadd(m, frame_va, FM_PORT_BUFFER_SIZE, 383 dtsec_rm_fqr_mext_free, frame_va, sc, 0, 384 EXT_NET_DRV); 385 386 m->m_pkthdr.rcvif = sc->sc_ifnet; 387 m->m_len = DPAA_FD_GET_LENGTH(frame); 388 m_fixhdr(m); 389 390 if_input(sc->sc_ifnet, m); 391 392 return (e_RX_STORE_RESPONSE_CONTINUE); 393 394 err: 395 bman_put_buffer(sc->sc_rx_pool, frame_va); 396 if (m != NULL) 397 m_freem(m); 398 399 return (e_RX_STORE_RESPONSE_CONTINUE); 400 } 401 402 static e_RxStoreResponse 403 dtsec_rm_fqr_tx_confirm_callback(t_Handle app, t_Handle fqr, t_Handle portal, 404 uint32_t fqid_off, t_DpaaFD *frame) 405 { 406 struct dtsec_rm_frame_info *fi; 407 struct dtsec_softc *sc; 408 unsigned int qlen; 409 t_DpaaSGTE *sgt0; 410 411 sc = app; 412 413 if (DPAA_FD_GET_STATUS(frame) != 0) 414 device_printf(sc->sc_dev, "TX error: 0x%08X\n", 415 DPAA_FD_GET_STATUS(frame)); 416 417 /* 418 * We are storing struct dtsec_rm_frame_info in first entry 419 * of scatter-gather table. 420 */ 421 sgt0 = DPAA_FD_GET_ADDR(frame); 422 fi = DPAA_SGTE_GET_ADDR(sgt0); 423 424 /* Free transmitted frame */ 425 m_freem(fi->fi_mbuf); 426 dtsec_rm_fi_free(sc, fi); 427 428 qlen = qman_fqr_get_counter(sc->sc_tx_conf_fqr, 0, 429 e_QM_FQR_COUNTERS_FRAME); 430 431 if (qlen == 0) { 432 DTSEC_LOCK(sc); 433 434 if (sc->sc_tx_fqr_full) { 435 sc->sc_tx_fqr_full = 0; 436 dtsec_rm_if_start_locked(sc); 437 } 438 439 DTSEC_UNLOCK(sc); 440 } 441 442 return (e_RX_STORE_RESPONSE_CONTINUE); 443 } 444 445 void 446 dtsec_rm_fqr_rx_free(struct dtsec_softc *sc) 447 { 448 449 if (sc->sc_rx_fqr) 450 qman_fqr_free(sc->sc_rx_fqr); 451 } 452 453 int 454 dtsec_rm_fqr_rx_init(struct dtsec_softc *sc) 455 { 456 t_Error error; 457 t_Handle fqr; 458 459 /* Default Frame Queue */ 460 fqr = qman_fqr_create(1, DTSEC_RM_FQR_RX_CHANNEL, DTSEC_RM_FQR_RX_WQ, 461 false, 0, false, false, true, false, 0, 0, 0); 462 if (fqr == NULL) { 463 device_printf(sc->sc_dev, "could not create default RX queue" 464 "\n"); 465 return (EIO); 466 } 467 468 sc->sc_rx_fqr = fqr; 469 sc->sc_rx_fqid = qman_fqr_get_base_fqid(fqr); 470 471 error = qman_fqr_register_cb(fqr, dtsec_rm_fqr_rx_callback, sc); 472 if (error != E_OK) { 473 device_printf(sc->sc_dev, "could not register RX callback\n"); 474 dtsec_rm_fqr_rx_free(sc); 475 return (EIO); 476 } 477 478 return (0); 479 } 480 481 void 482 dtsec_rm_fqr_tx_free(struct dtsec_softc *sc) 483 { 484 485 if (sc->sc_tx_fqr) 486 qman_fqr_free(sc->sc_tx_fqr); 487 488 if (sc->sc_tx_conf_fqr) 489 qman_fqr_free(sc->sc_tx_conf_fqr); 490 } 491 492 int 493 dtsec_rm_fqr_tx_init(struct dtsec_softc *sc) 494 { 495 t_Error error; 496 t_Handle fqr; 497 498 /* TX Frame Queue */ 499 fqr = qman_fqr_create(1, sc->sc_port_tx_qman_chan, 500 DTSEC_RM_FQR_TX_WQ, false, 0, false, false, true, false, 0, 0, 0); 501 if (fqr == NULL) { 502 device_printf(sc->sc_dev, "could not create default TX queue" 503 "\n"); 504 return (EIO); 505 } 506 507 sc->sc_tx_fqr = fqr; 508 509 /* TX Confirmation Frame Queue */ 510 fqr = qman_fqr_create(1, DTSEC_RM_FQR_TX_CONF_CHANNEL, 511 DTSEC_RM_FQR_TX_CONF_WQ, false, 0, false, false, true, false, 0, 0, 512 0); 513 if (fqr == NULL) { 514 device_printf(sc->sc_dev, "could not create TX confirmation " 515 "queue\n"); 516 dtsec_rm_fqr_tx_free(sc); 517 return (EIO); 518 } 519 520 sc->sc_tx_conf_fqr = fqr; 521 sc->sc_tx_conf_fqid = qman_fqr_get_base_fqid(fqr); 522 523 error = qman_fqr_register_cb(fqr, dtsec_rm_fqr_tx_confirm_callback, sc); 524 if (error != E_OK) { 525 device_printf(sc->sc_dev, "could not register TX confirmation " 526 "callback\n"); 527 dtsec_rm_fqr_tx_free(sc); 528 return (EIO); 529 } 530 531 return (0); 532 } 533 /** @} */ 534 535 536 /** 537 * @group dTSEC IFnet routines. 538 * @{ 539 */ 540 void 541 dtsec_rm_if_start_locked(struct dtsec_softc *sc) 542 { 543 vm_size_t dsize, psize, ssize; 544 struct dtsec_rm_frame_info *fi; 545 unsigned int qlen, i; 546 struct mbuf *m0, *m; 547 vm_offset_t vaddr; 548 t_DpaaFD fd; 549 550 DTSEC_LOCK_ASSERT(sc); 551 /* TODO: IFF_DRV_OACTIVE */ 552 553 if ((sc->sc_mii->mii_media_status & IFM_ACTIVE) == 0) 554 return; 555 556 if ((if_getdrvflags(sc->sc_ifnet) & IFF_DRV_RUNNING) != IFF_DRV_RUNNING) 557 return; 558 559 while (!if_sendq_empty(sc->sc_ifnet)) { 560 /* Check length of the TX queue */ 561 qlen = qman_fqr_get_counter(sc->sc_tx_fqr, 0, 562 e_QM_FQR_COUNTERS_FRAME); 563 564 if (qlen >= DTSEC_MAX_TX_QUEUE_LEN) { 565 sc->sc_tx_fqr_full = 1; 566 return; 567 } 568 569 fi = dtsec_rm_fi_alloc(sc); 570 if (fi == NULL) 571 return; 572 573 m0 = if_dequeue(sc->sc_ifnet); 574 if (m0 == NULL) { 575 dtsec_rm_fi_free(sc, fi); 576 return; 577 } 578 579 i = 0; 580 m = m0; 581 psize = 0; 582 dsize = 0; 583 fi->fi_mbuf = m0; 584 while (m && i < DPAA_NUM_OF_SG_TABLE_ENTRY) { 585 if (m->m_len == 0) 586 continue; 587 588 /* 589 * First entry in scatter-gather table is used to keep 590 * pointer to frame info structure. 591 */ 592 DPAA_SGTE_SET_ADDR(&fi->fi_sgt[i], (void *)fi); 593 DPAA_SGTE_SET_LENGTH(&fi->fi_sgt[i], 0); 594 595 DPAA_SGTE_SET_EXTENSION(&fi->fi_sgt[i], 0); 596 DPAA_SGTE_SET_FINAL(&fi->fi_sgt[i], 0); 597 DPAA_SGTE_SET_BPID(&fi->fi_sgt[i], 0); 598 DPAA_SGTE_SET_OFFSET(&fi->fi_sgt[i], 0); 599 i++; 600 601 dsize = m->m_len; 602 vaddr = (vm_offset_t)m->m_data; 603 while (dsize > 0 && i < DPAA_NUM_OF_SG_TABLE_ENTRY) { 604 ssize = PAGE_SIZE - (vaddr & PAGE_MASK); 605 if (m->m_len < ssize) 606 ssize = m->m_len; 607 608 DPAA_SGTE_SET_ADDR(&fi->fi_sgt[i], 609 (void *)vaddr); 610 DPAA_SGTE_SET_LENGTH(&fi->fi_sgt[i], ssize); 611 612 DPAA_SGTE_SET_EXTENSION(&fi->fi_sgt[i], 0); 613 DPAA_SGTE_SET_FINAL(&fi->fi_sgt[i], 0); 614 DPAA_SGTE_SET_BPID(&fi->fi_sgt[i], 0); 615 DPAA_SGTE_SET_OFFSET(&fi->fi_sgt[i], 0); 616 617 dsize -= ssize; 618 vaddr += ssize; 619 psize += ssize; 620 i++; 621 } 622 623 if (dsize > 0) 624 break; 625 626 m = m->m_next; 627 } 628 629 /* Check if SG table was constructed properly */ 630 if (m != NULL || dsize != 0) { 631 dtsec_rm_fi_free(sc, fi); 632 m_freem(m0); 633 continue; 634 } 635 636 DPAA_SGTE_SET_FINAL(&fi->fi_sgt[i-1], 1); 637 638 DPAA_FD_SET_ADDR(&fd, fi->fi_sgt); 639 DPAA_FD_SET_LENGTH(&fd, psize); 640 DPAA_FD_SET_FORMAT(&fd, e_DPAA_FD_FORMAT_TYPE_SHORT_MBSF); 641 642 fd.liodn = 0; 643 fd.bpid = 0; 644 fd.elion = 0; 645 DPAA_FD_SET_OFFSET(&fd, 0); 646 DPAA_FD_SET_STATUS(&fd, 0); 647 648 DTSEC_UNLOCK(sc); 649 if (qman_fqr_enqueue(sc->sc_tx_fqr, 0, &fd) != E_OK) { 650 dtsec_rm_fi_free(sc, fi); 651 m_freem(m0); 652 } 653 DTSEC_LOCK(sc); 654 } 655 } 656 /** @} */ 657