1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2016 Nicole Graziano <nicole@nextbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /*$FreeBSD$*/ 30 #include "opt_ddb.h" 31 #include "opt_inet.h" 32 #include "opt_inet6.h" 33 34 #ifdef HAVE_KERNEL_OPTION_HEADERS 35 #include "opt_device_polling.h" 36 #endif 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #ifdef DDB 41 #include <sys/types.h> 42 #include <ddb/ddb.h> 43 #endif 44 #if __FreeBSD_version >= 800000 45 #include <sys/buf_ring.h> 46 #endif 47 #include <sys/bus.h> 48 #include <sys/endian.h> 49 #include <sys/kernel.h> 50 #include <sys/kthread.h> 51 #include <sys/malloc.h> 52 #include <sys/mbuf.h> 53 #include <sys/module.h> 54 #include <sys/rman.h> 55 #include <sys/smp.h> 56 #include <sys/socket.h> 57 #include <sys/sockio.h> 58 #include <sys/sysctl.h> 59 #include <sys/taskqueue.h> 60 #include <sys/eventhandler.h> 61 #include <machine/bus.h> 62 #include <machine/resource.h> 63 64 #include <net/bpf.h> 65 #include <net/ethernet.h> 66 #include <net/if.h> 67 #include <net/if_var.h> 68 #include <net/if_arp.h> 69 #include <net/if_dl.h> 70 #include <net/if_media.h> 71 #include <net/iflib.h> 72 73 #include <net/if_types.h> 74 #include <net/if_vlan_var.h> 75 76 #include <netinet/in_systm.h> 77 #include <netinet/in.h> 78 #include <netinet/if_ether.h> 79 #include <netinet/ip.h> 80 #include <netinet/ip6.h> 81 #include <netinet/tcp.h> 82 #include <netinet/udp.h> 83 84 #include <machine/in_cksum.h> 85 #include <dev/led/led.h> 86 #include <dev/pci/pcivar.h> 87 #include <dev/pci/pcireg.h> 88 89 #include "e1000_api.h" 90 #include "e1000_82571.h" 91 #include "ifdi_if.h" 92 93 94 #ifndef _EM_H_DEFINED_ 95 #define _EM_H_DEFINED_ 96 97 98 /* Tunables */ 99 100 /* 101 * EM_MAX_TXD: Maximum number of Transmit Descriptors 102 * Valid Range: 80-256 for 82542 and 82543-based adapters 103 * 80-4096 for others 104 * Default Value: 1024 105 * This value is the number of transmit descriptors allocated by the driver. 106 * Increasing this value allows the driver to queue more transmits. Each 107 * descriptor is 16 bytes. 108 * Since TDLEN should be multiple of 128bytes, the number of transmit 109 * desscriptors should meet the following condition. 110 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 111 */ 112 #define EM_MIN_TXD 128 113 #define EM_MAX_TXD 4096 114 #define EM_DEFAULT_TXD 1024 115 #define EM_DEFAULT_MULTI_TXD 4096 116 #define IGB_MAX_TXD 4096 117 118 /* 119 * EM_MAX_RXD - Maximum number of receive Descriptors 120 * Valid Range: 80-256 for 82542 and 82543-based adapters 121 * 80-4096 for others 122 * Default Value: 1024 123 * This value is the number of receive descriptors allocated by the driver. 124 * Increasing this value allows the driver to buffer more incoming packets. 125 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 126 * descriptor. The maximum MTU size is 16110. 127 * Since TDLEN should be multiple of 128bytes, the number of transmit 128 * desscriptors should meet the following condition. 129 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 130 */ 131 #define EM_MIN_RXD 128 132 #define EM_MAX_RXD 4096 133 #define EM_DEFAULT_RXD 1024 134 #define EM_DEFAULT_MULTI_RXD 4096 135 #define IGB_MAX_RXD 4096 136 137 /* 138 * EM_TIDV - Transmit Interrupt Delay Value 139 * Valid Range: 0-65535 (0=off) 140 * Default Value: 64 141 * This value delays the generation of transmit interrupts in units of 142 * 1.024 microseconds. Transmit interrupt reduction can improve CPU 143 * efficiency if properly tuned for specific network traffic. If the 144 * system is reporting dropped transmits, this value may be set too high 145 * causing the driver to run out of available transmit descriptors. 146 */ 147 #define EM_TIDV 64 148 149 /* 150 * EM_TADV - Transmit Absolute Interrupt Delay Value 151 * (Not valid for 82542/82543/82544) 152 * Valid Range: 0-65535 (0=off) 153 * Default Value: 64 154 * This value, in units of 1.024 microseconds, limits the delay in which a 155 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, 156 * this value ensures that an interrupt is generated after the initial 157 * packet is sent on the wire within the set amount of time. Proper tuning, 158 * along with EM_TIDV, may improve traffic throughput in specific 159 * network conditions. 160 */ 161 #define EM_TADV 64 162 163 /* 164 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) 165 * Valid Range: 0-65535 (0=off) 166 * Default Value: 0 167 * This value delays the generation of receive interrupts in units of 1.024 168 * microseconds. Receive interrupt reduction can improve CPU efficiency if 169 * properly tuned for specific network traffic. Increasing this value adds 170 * extra latency to frame reception and can end up decreasing the throughput 171 * of TCP traffic. If the system is reporting dropped receives, this value 172 * may be set too high, causing the driver to run out of available receive 173 * descriptors. 174 * 175 * CAUTION: When setting EM_RDTR to a value other than 0, adapters 176 * may hang (stop transmitting) under certain network conditions. 177 * If this occurs a WATCHDOG message is logged in the system 178 * event log. In addition, the controller is automatically reset, 179 * restoring the network connection. To eliminate the potential 180 * for the hang ensure that EM_RDTR is set to 0. 181 */ 182 #define EM_RDTR 0 183 184 /* 185 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) 186 * Valid Range: 0-65535 (0=off) 187 * Default Value: 64 188 * This value, in units of 1.024 microseconds, limits the delay in which a 189 * receive interrupt is generated. Useful only if EM_RDTR is non-zero, 190 * this value ensures that an interrupt is generated after the initial 191 * packet is received within the set amount of time. Proper tuning, 192 * along with EM_RDTR, may improve traffic throughput in specific network 193 * conditions. 194 */ 195 #define EM_RADV 64 196 197 /* 198 * This parameter controls whether or not autonegotation is enabled. 199 * 0 - Disable autonegotiation 200 * 1 - Enable autonegotiation 201 */ 202 #define DO_AUTO_NEG 1 203 204 /* 205 * This parameter control whether or not the driver will wait for 206 * autonegotiation to complete. 207 * 1 - Wait for autonegotiation to complete 208 * 0 - Don't wait for autonegotiation to complete 209 */ 210 #define WAIT_FOR_AUTO_NEG_DEFAULT 0 211 212 /* Tunables -- End */ 213 214 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 215 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 216 ADVERTISE_1000_FULL) 217 218 #define AUTO_ALL_MODES 0 219 220 /* PHY master/slave setting */ 221 #define EM_MASTER_SLAVE e1000_ms_hw_default 222 223 /* 224 * Micellaneous constants 225 */ 226 #define EM_VENDOR_ID 0x8086 227 #define EM_FLASH 0x0014 228 229 #define EM_JUMBO_PBA 0x00000028 230 #define EM_DEFAULT_PBA 0x00000030 231 #define EM_SMARTSPEED_DOWNSHIFT 3 232 #define EM_SMARTSPEED_MAX 15 233 #define EM_MAX_LOOP 10 234 235 #define MAX_NUM_MULTICAST_ADDRESSES 128 236 #define PCI_ANY_ID (~0U) 237 #define ETHER_ALIGN 2 238 #define EM_FC_PAUSE_TIME 0x0680 239 #define EM_EEPROM_APME 0x400; 240 #define EM_82544_APME 0x0004; 241 242 243 /* Support AutoMediaDetect for Marvell M88 PHY in i354 */ 244 #define IGB_MEDIA_RESET (1 << 0) 245 246 /* Define the starting Interrupt rate per Queue */ 247 #define IGB_INTS_PER_SEC 8000 248 #define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2) 249 250 #define IGB_LINK_ITR 2000 251 #define I210_LINK_DELAY 1000 252 253 #define IGB_TXPBSIZE 20408 254 #define IGB_HDR_BUF 128 255 #define IGB_PKTTYPE_MASK 0x0000FFF0 256 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ 257 258 /* 259 * Driver state logic for the detection of a hung state 260 * in hardware. Set TX_HUNG whenever a TX packet is used 261 * (data is sent) and clear it when txeof() is invoked if 262 * any descriptors from the ring are cleaned/reclaimed. 263 * Increment internal counter if no descriptors are cleaned 264 * and compare to TX_MAXTRIES. When counter > TX_MAXTRIES, 265 * reset adapter. 266 */ 267 #define EM_TX_IDLE 0x00000000 268 #define EM_TX_BUSY 0x00000001 269 #define EM_TX_HUNG 0x80000000 270 #define EM_TX_MAXTRIES 10 271 272 #define PCICFG_DESC_RING_STATUS 0xe4 273 #define FLUSH_DESC_REQUIRED 0x100 274 275 276 #define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \ 277 ((hw->mac.type <= e1000_82576) ? 16 : 8)) 278 #define IGB_RX_HTHRESH 8 279 #define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \ 280 (adapter->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4) 281 282 #define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8) 283 #define IGB_TX_HTHRESH 1 284 #define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \ 285 (adapter->intr_type == IFLIB_INTR_MSIX) ? 1 : 16) 286 287 /* 288 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be 289 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will 290 * also optimize cache line size effect. H/W supports up to cache line size 128. 291 */ 292 #define EM_DBA_ALIGN 128 293 294 /* 295 * See Intel 82574 Driver Programming Interface Manual, Section 10.2.6.9 296 */ 297 #define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */ 298 #define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */ 299 #define TARC_MQ_FIX (1 << 23) | \ 300 (1 << 24) | \ 301 (1 << 25) /* Handle errata in MQ mode */ 302 #define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */ 303 304 /* PCI Config defines */ 305 #define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK) 306 #define EM_BAR_TYPE_MASK 0x00000001 307 #define EM_BAR_TYPE_MMEM 0x00000000 308 #define EM_BAR_TYPE_IO 0x00000001 309 #define EM_BAR_TYPE_FLASH 0x0014 310 #define EM_BAR_MEM_TYPE(v) ((v) & EM_BAR_MEM_TYPE_MASK) 311 #define EM_BAR_MEM_TYPE_MASK 0x00000006 312 #define EM_BAR_MEM_TYPE_32BIT 0x00000000 313 #define EM_BAR_MEM_TYPE_64BIT 0x00000004 314 #define EM_MSIX_BAR 3 /* On 82575 */ 315 316 /* More backward compatibility */ 317 #if __FreeBSD_version < 900000 318 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 319 #endif 320 321 /* Defines for printing debug information */ 322 #define DEBUG_INIT 0 323 #define DEBUG_IOCTL 0 324 #define DEBUG_HW 0 325 326 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 327 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 328 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 329 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 330 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 331 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 332 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 333 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 334 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 335 336 #define EM_MAX_SCATTER 40 337 #define EM_VFTA_SIZE 128 338 #define EM_TSO_SIZE 65535 339 #define EM_TSO_SEG_SIZE 4096 /* Max dma segment size */ 340 #define EM_MSIX_MASK 0x01F00000 /* For 82574 use */ 341 #define EM_MSIX_LINK 0x01000000 /* For 82574 use */ 342 #define ETH_ZLEN 60 343 #define ETH_ADDR_LEN 6 344 #define EM_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP) /* Offload bits in mbuf flag */ 345 #define IGB_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \ 346 CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \ 347 CSUM_IP6_SCTP) /* Offload bits in mbuf flag */ 348 349 350 #define IGB_PKTTYPE_MASK 0x0000FFF0 351 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ 352 353 /* 354 * 82574 has a nonstandard address for EIAC 355 * and since its only used in MSI-X, and in 356 * the em driver only 82574 uses MSI-X we can 357 * solve it just using this define. 358 */ 359 #define EM_EIAC 0x000DC 360 /* 361 * 82574 only reports 3 MSI-X vectors by default; 362 * defines assisting with making it report 5 are 363 * located here. 364 */ 365 #define EM_NVM_PCIE_CTRL 0x1B 366 #define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT) 367 #define EM_NVM_MSIX_N_SHIFT 7 368 369 struct adapter; 370 371 struct em_int_delay_info { 372 struct adapter *adapter; /* Back-pointer to the adapter struct */ 373 int offset; /* Register offset to read/write */ 374 int value; /* Current value in usecs */ 375 }; 376 377 /* 378 * The transmit ring, one per tx queue 379 */ 380 struct tx_ring { 381 struct adapter *adapter; 382 struct e1000_tx_desc *tx_base; 383 uint64_t tx_paddr; 384 qidx_t *tx_rsq; 385 bool tx_tso; /* last tx was tso */ 386 uint8_t me; 387 qidx_t tx_rs_cidx; 388 qidx_t tx_rs_pidx; 389 qidx_t tx_cidx_processed; 390 /* Interrupt resources */ 391 void *tag; 392 struct resource *res; 393 unsigned long tx_irq; 394 395 /* Saved csum offloading context information */ 396 int csum_flags; 397 int csum_lhlen; 398 int csum_iphlen; 399 400 int csum_thlen; 401 int csum_mss; 402 int csum_pktlen; 403 404 uint32_t csum_txd_upper; 405 uint32_t csum_txd_lower; /* last field */ 406 }; 407 408 /* 409 * The Receive ring, one per rx queue 410 */ 411 struct rx_ring { 412 struct adapter *adapter; 413 struct em_rx_queue *que; 414 u32 me; 415 u32 payload; 416 union e1000_rx_desc_extended *rx_base; 417 uint64_t rx_paddr; 418 419 /* Interrupt resources */ 420 void *tag; 421 struct resource *res; 422 bool discard; 423 424 /* Soft stats */ 425 unsigned long rx_irq; 426 unsigned long rx_discarded; 427 unsigned long rx_packets; 428 unsigned long rx_bytes; 429 }; 430 431 struct em_tx_queue { 432 struct adapter *adapter; 433 u32 msix; 434 u32 eims; /* This queue's EIMS bit */ 435 u32 me; 436 struct tx_ring txr; 437 }; 438 439 struct em_rx_queue { 440 struct adapter *adapter; 441 u32 me; 442 u32 msix; 443 u32 eims; 444 struct rx_ring rxr; 445 u64 irqs; 446 struct if_irq que_irq; 447 }; 448 449 /* Our adapter structure */ 450 struct adapter { 451 struct ifnet *ifp; 452 struct e1000_hw hw; 453 454 if_softc_ctx_t shared; 455 if_ctx_t ctx; 456 #define tx_num_queues shared->isc_ntxqsets 457 #define rx_num_queues shared->isc_nrxqsets 458 #define intr_type shared->isc_intr 459 /* FreeBSD operating-system-specific structures. */ 460 struct e1000_osdep osdep; 461 device_t dev; 462 struct cdev *led_dev; 463 464 struct em_tx_queue *tx_queues; 465 struct em_rx_queue *rx_queues; 466 struct if_irq irq; 467 468 struct resource *memory; 469 struct resource *flash; 470 struct resource *ioport; 471 472 struct resource *res; 473 void *tag; 474 u32 linkvec; 475 u32 ivars; 476 477 struct ifmedia *media; 478 int msix; 479 int if_flags; 480 int em_insert_vlan_header; 481 u32 ims; 482 bool in_detach; 483 484 u32 flags; 485 /* Task for FAST handling */ 486 struct grouptask link_task; 487 488 u16 num_vlans; 489 u32 txd_cmd; 490 491 u32 tx_process_limit; 492 u32 rx_process_limit; 493 u32 rx_mbuf_sz; 494 495 /* Management and WOL features */ 496 u32 wol; 497 bool has_manage; 498 bool has_amt; 499 500 /* Multicast array memory */ 501 u8 *mta; 502 503 /* 504 ** Shadow VFTA table, this is needed because 505 ** the real vlan filter table gets cleared during 506 ** a soft reset and the driver needs to be able 507 ** to repopulate it. 508 */ 509 u32 shadow_vfta[EM_VFTA_SIZE]; 510 511 /* Info about the interface */ 512 u16 link_active; 513 u16 fc; 514 u16 link_speed; 515 u16 link_duplex; 516 u32 smartspeed; 517 u32 dmac; 518 int link_mask; 519 520 u64 que_mask; 521 522 struct em_int_delay_info tx_int_delay; 523 struct em_int_delay_info tx_abs_int_delay; 524 struct em_int_delay_info rx_int_delay; 525 struct em_int_delay_info rx_abs_int_delay; 526 struct em_int_delay_info tx_itr; 527 528 /* Misc stats maintained by the driver */ 529 unsigned long dropped_pkts; 530 unsigned long link_irq; 531 unsigned long rx_overruns; 532 unsigned long watchdog_events; 533 534 struct e1000_hw_stats stats; 535 u16 vf_ifp; 536 }; 537 538 /******************************************************************************** 539 * vendor_info_array 540 * 541 * This array contains the list of Subvendor/Subdevice IDs on which the driver 542 * should load. 543 * 544 ********************************************************************************/ 545 typedef struct _em_vendor_info_t { 546 unsigned int vendor_id; 547 unsigned int device_id; 548 unsigned int subvendor_id; 549 unsigned int subdevice_id; 550 unsigned int index; 551 } em_vendor_info_t; 552 553 void em_dump_rs(struct adapter *); 554 555 #define EM_RSSRK_SIZE 4 556 #define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \ 557 key[(i) * EM_RSSRK_SIZE + 1] << 8 | \ 558 key[(i) * EM_RSSRK_SIZE + 2] << 16 | \ 559 key[(i) * EM_RSSRK_SIZE + 3] << 24) 560 #endif /* _EM_H_DEFINED_ */ 561