1 /*- 2 * Copyright (c) 2016 Matt Macy <mmacy@nextbsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 /*$FreeBSD$*/ 28 #include "opt_ddb.h" 29 #include "opt_inet.h" 30 #include "opt_inet6.h" 31 32 #ifdef HAVE_KERNEL_OPTION_HEADERS 33 #include "opt_device_polling.h" 34 #endif 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #ifdef DDB 39 #include <sys/types.h> 40 #include <ddb/ddb.h> 41 #endif 42 #if __FreeBSD_version >= 800000 43 #include <sys/buf_ring.h> 44 #endif 45 #include <sys/bus.h> 46 #include <sys/endian.h> 47 #include <sys/kernel.h> 48 #include <sys/kthread.h> 49 #include <sys/malloc.h> 50 #include <sys/mbuf.h> 51 #include <sys/module.h> 52 #include <sys/rman.h> 53 #include <sys/smp.h> 54 #include <sys/socket.h> 55 #include <sys/sockio.h> 56 #include <sys/sysctl.h> 57 #include <sys/taskqueue.h> 58 #include <sys/eventhandler.h> 59 #include <machine/bus.h> 60 #include <machine/resource.h> 61 62 #include <net/bpf.h> 63 #include <net/ethernet.h> 64 #include <net/if.h> 65 #include <net/if_var.h> 66 #include <net/if_arp.h> 67 #include <net/if_dl.h> 68 #include <net/if_media.h> 69 #include <net/iflib.h> 70 71 #include <net/if_types.h> 72 #include <net/if_vlan_var.h> 73 74 #include <netinet/in_systm.h> 75 #include <netinet/in.h> 76 #include <netinet/if_ether.h> 77 #include <netinet/ip.h> 78 #include <netinet/ip6.h> 79 #include <netinet/tcp.h> 80 #include <netinet/udp.h> 81 82 #include <machine/in_cksum.h> 83 #include <dev/led/led.h> 84 #include <dev/pci/pcivar.h> 85 #include <dev/pci/pcireg.h> 86 87 #include "e1000_api.h" 88 #include "e1000_82571.h" 89 #include "ifdi_if.h" 90 91 92 #ifndef _EM_H_DEFINED_ 93 #define _EM_H_DEFINED_ 94 95 96 /* Tunables */ 97 98 /* 99 * EM_TXD: Maximum number of Transmit Descriptors 100 * Valid Range: 80-256 for 82542 and 82543-based adapters 101 * 80-4096 for others 102 * Default Value: 256 103 * This value is the number of transmit descriptors allocated by the driver. 104 * Increasing this value allows the driver to queue more transmits. Each 105 * descriptor is 16 bytes. 106 * Since TDLEN should be multiple of 128bytes, the number of transmit 107 * desscriptors should meet the following condition. 108 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 109 */ 110 #define EM_MIN_TXD 128 111 #define EM_MAX_TXD 4096 112 #define EM_DEFAULT_TXD 1024 113 #define EM_DEFAULT_MULTI_TXD 4096 114 115 /* 116 * EM_RXD - Maximum number of receive Descriptors 117 * Valid Range: 80-256 for 82542 and 82543-based adapters 118 * 80-4096 for others 119 * Default Value: 256 120 * This value is the number of receive descriptors allocated by the driver. 121 * Increasing this value allows the driver to buffer more incoming packets. 122 * Each descriptor is 16 bytes. A receive buffer is also allocated for each 123 * descriptor. The maximum MTU size is 16110. 124 * Since TDLEN should be multiple of 128bytes, the number of transmit 125 * desscriptors should meet the following condition. 126 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 127 */ 128 #define EM_MIN_RXD 128 129 #define EM_MAX_RXD 4096 130 #define EM_DEFAULT_RXD 1024 131 #define EM_DEFAULT_MULTI_RXD 4096 132 133 /* 134 * EM_TIDV - Transmit Interrupt Delay Value 135 * Valid Range: 0-65535 (0=off) 136 * Default Value: 64 137 * This value delays the generation of transmit interrupts in units of 138 * 1.024 microseconds. Transmit interrupt reduction can improve CPU 139 * efficiency if properly tuned for specific network traffic. If the 140 * system is reporting dropped transmits, this value may be set too high 141 * causing the driver to run out of available transmit descriptors. 142 */ 143 #define EM_TIDV 64 144 145 /* 146 * EM_TADV - Transmit Absolute Interrupt Delay Value 147 * (Not valid for 82542/82543/82544) 148 * Valid Range: 0-65535 (0=off) 149 * Default Value: 64 150 * This value, in units of 1.024 microseconds, limits the delay in which a 151 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, 152 * this value ensures that an interrupt is generated after the initial 153 * packet is sent on the wire within the set amount of time. Proper tuning, 154 * along with EM_TIDV, may improve traffic throughput in specific 155 * network conditions. 156 */ 157 #define EM_TADV 64 158 159 /* 160 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) 161 * Valid Range: 0-65535 (0=off) 162 * Default Value: 0 163 * This value delays the generation of receive interrupts in units of 1.024 164 * microseconds. Receive interrupt reduction can improve CPU efficiency if 165 * properly tuned for specific network traffic. Increasing this value adds 166 * extra latency to frame reception and can end up decreasing the throughput 167 * of TCP traffic. If the system is reporting dropped receives, this value 168 * may be set too high, causing the driver to run out of available receive 169 * descriptors. 170 * 171 * CAUTION: When setting EM_RDTR to a value other than 0, adapters 172 * may hang (stop transmitting) under certain network conditions. 173 * If this occurs a WATCHDOG message is logged in the system 174 * event log. In addition, the controller is automatically reset, 175 * restoring the network connection. To eliminate the potential 176 * for the hang ensure that EM_RDTR is set to 0. 177 */ 178 #define EM_RDTR 0 179 180 /* 181 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) 182 * Valid Range: 0-65535 (0=off) 183 * Default Value: 64 184 * This value, in units of 1.024 microseconds, limits the delay in which a 185 * receive interrupt is generated. Useful only if EM_RDTR is non-zero, 186 * this value ensures that an interrupt is generated after the initial 187 * packet is received within the set amount of time. Proper tuning, 188 * along with EM_RDTR, may improve traffic throughput in specific network 189 * conditions. 190 */ 191 #define EM_RADV 64 192 193 /* 194 * This parameter controls whether or not autonegotation is enabled. 195 * 0 - Disable autonegotiation 196 * 1 - Enable autonegotiation 197 */ 198 #define DO_AUTO_NEG 1 199 200 /* 201 * This parameter control whether or not the driver will wait for 202 * autonegotiation to complete. 203 * 1 - Wait for autonegotiation to complete 204 * 0 - Don't wait for autonegotiation to complete 205 */ 206 #define WAIT_FOR_AUTO_NEG_DEFAULT 0 207 208 /* Tunables -- End */ 209 210 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 211 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 212 ADVERTISE_1000_FULL) 213 214 #define AUTO_ALL_MODES 0 215 216 /* PHY master/slave setting */ 217 #define EM_MASTER_SLAVE e1000_ms_hw_default 218 219 /* 220 * Micellaneous constants 221 */ 222 #define EM_VENDOR_ID 0x8086 223 #define EM_FLASH 0x0014 224 225 #define EM_JUMBO_PBA 0x00000028 226 #define EM_DEFAULT_PBA 0x00000030 227 #define EM_SMARTSPEED_DOWNSHIFT 3 228 #define EM_SMARTSPEED_MAX 15 229 #define EM_MAX_LOOP 10 230 231 #define MAX_NUM_MULTICAST_ADDRESSES 128 232 #define PCI_ANY_ID (~0U) 233 #define ETHER_ALIGN 2 234 #define EM_FC_PAUSE_TIME 0x0680 235 #define EM_EEPROM_APME 0x400; 236 #define EM_82544_APME 0x0004; 237 238 239 /* Support AutoMediaDetect for Marvell M88 PHY in i354 */ 240 #define IGB_MEDIA_RESET (1 << 0) 241 242 /* Define the starting Interrupt rate per Queue */ 243 #define IGB_INTS_PER_SEC 8000 244 #define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2) 245 246 #define IGB_LINK_ITR 2000 247 #define I210_LINK_DELAY 1000 248 249 #define IGB_MAX_SCATTER 40 250 #define IGB_VFTA_SIZE 128 251 #define IGB_BR_SIZE 4096 /* ring buf size */ 252 #define IGB_TSO_SIZE (65535 + sizeof(struct ether_vlan_header)) 253 #define IGB_TSO_SEG_SIZE 4096 /* Max dma segment size */ 254 #define IGB_TXPBSIZE 20408 255 #define IGB_HDR_BUF 128 256 #define IGB_PKTTYPE_MASK 0x0000FFF0 257 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ 258 259 /* 260 * Driver state logic for the detection of a hung state 261 * in hardware. Set TX_HUNG whenever a TX packet is used 262 * (data is sent) and clear it when txeof() is invoked if 263 * any descriptors from the ring are cleaned/reclaimed. 264 * Increment internal counter if no descriptors are cleaned 265 * and compare to TX_MAXTRIES. When counter > TX_MAXTRIES, 266 * reset adapter. 267 */ 268 #define EM_TX_IDLE 0x00000000 269 #define EM_TX_BUSY 0x00000001 270 #define EM_TX_HUNG 0x80000000 271 #define EM_TX_MAXTRIES 10 272 273 #define PCICFG_DESC_RING_STATUS 0xe4 274 #define FLUSH_DESC_REQUIRED 0x100 275 276 277 #define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \ 278 ((hw->mac.type <= e1000_82576) ? 16 : 8)) 279 #define IGB_RX_HTHRESH 8 280 #define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \ 281 (adapter->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4) 282 283 #define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8) 284 #define IGB_TX_HTHRESH 1 285 #define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \ 286 (adapter->intr_type == IFLIB_INTR_MSIX) ? 1 : 16) 287 288 /* 289 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be 290 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will 291 * also optimize cache line size effect. H/W supports up to cache line size 128. 292 */ 293 #define EM_DBA_ALIGN 128 294 295 /* 296 * See Intel 82574 Driver Programming Interface Manual, Section 10.2.6.9 297 */ 298 #define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */ 299 #define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */ 300 #define TARC_MQ_FIX (1 << 23) | \ 301 (1 << 24) | \ 302 (1 << 25) /* Handle errata in MQ mode */ 303 #define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */ 304 305 /* PCI Config defines */ 306 #define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK) 307 #define EM_BAR_TYPE_MASK 0x00000001 308 #define EM_BAR_TYPE_MMEM 0x00000000 309 #define EM_BAR_TYPE_IO 0x00000001 310 #define EM_BAR_TYPE_FLASH 0x0014 311 #define EM_BAR_MEM_TYPE(v) ((v) & EM_BAR_MEM_TYPE_MASK) 312 #define EM_BAR_MEM_TYPE_MASK 0x00000006 313 #define EM_BAR_MEM_TYPE_32BIT 0x00000000 314 #define EM_BAR_MEM_TYPE_64BIT 0x00000004 315 #define EM_MSIX_BAR 3 /* On 82575 */ 316 317 /* More backward compatibility */ 318 #if __FreeBSD_version < 900000 319 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 320 #endif 321 322 /* Defines for printing debug information */ 323 #define DEBUG_INIT 0 324 #define DEBUG_IOCTL 0 325 #define DEBUG_HW 0 326 327 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 328 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 329 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 330 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 331 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 332 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 333 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 334 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 335 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 336 337 #define EM_MAX_SCATTER 40 338 #define EM_VFTA_SIZE 128 339 #define EM_TSO_SIZE (65535 + sizeof(struct ether_vlan_header)) 340 #define EM_TSO_SEG_SIZE 4096 /* Max dma segment size */ 341 #define EM_MSIX_MASK 0x01F00000 /* For 82574 use */ 342 #define EM_MSIX_LINK 0x01000000 /* For 82574 use */ 343 #define ETH_ZLEN 60 344 #define ETH_ADDR_LEN 6 345 #define EM_CSUM_OFFLOAD 7 /* Offload bits in mbuf flag */ 346 #define IGB_CSUM_OFFLOAD 0x0E0F /* Offload bits in mbuf flag */ 347 348 #define IGB_PKTTYPE_MASK 0x0000FFF0 349 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ 350 351 /* 352 * 82574 has a nonstandard address for EIAC 353 * and since its only used in MSIX, and in 354 * the em driver only 82574 uses MSIX we can 355 * solve it just using this define. 356 */ 357 #define EM_EIAC 0x000DC 358 /* 359 * 82574 only reports 3 MSI-X vectors by default; 360 * defines assisting with making it report 5 are 361 * located here. 362 */ 363 #define EM_NVM_PCIE_CTRL 0x1B 364 #define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT) 365 #define EM_NVM_MSIX_N_SHIFT 7 366 367 struct adapter; 368 369 struct em_int_delay_info { 370 struct adapter *adapter; /* Back-pointer to the adapter struct */ 371 int offset; /* Register offset to read/write */ 372 int value; /* Current value in usecs */ 373 }; 374 375 /* 376 * The transmit ring, one per tx queue 377 */ 378 struct tx_ring { 379 struct adapter *adapter; 380 struct e1000_tx_desc *tx_base; 381 uint64_t tx_paddr; 382 qidx_t *tx_rsq; 383 bool tx_tso; /* last tx was tso */ 384 uint8_t me; 385 qidx_t tx_rs_cidx; 386 qidx_t tx_rs_pidx; 387 qidx_t tx_cidx_processed; 388 /* Interrupt resources */ 389 void *tag; 390 struct resource *res; 391 unsigned long tx_irq; 392 393 /* Saved csum offloading context information */ 394 int csum_flags; 395 int csum_lhlen; 396 int csum_iphlen; 397 398 int csum_thlen; 399 int csum_mss; 400 int csum_pktlen; 401 402 uint32_t csum_txd_upper; 403 uint32_t csum_txd_lower; /* last field */ 404 }; 405 406 /* 407 * The Receive ring, one per rx queue 408 */ 409 struct rx_ring { 410 struct adapter *adapter; 411 struct em_rx_queue *que; 412 u32 me; 413 u32 payload; 414 union e1000_rx_desc_extended *rx_base; 415 uint64_t rx_paddr; 416 417 /* Interrupt resources */ 418 void *tag; 419 struct resource *res; 420 bool discard; 421 422 /* Soft stats */ 423 unsigned long rx_irq; 424 unsigned long rx_discarded; 425 unsigned long rx_packets; 426 unsigned long rx_bytes; 427 }; 428 429 struct em_tx_queue { 430 struct adapter *adapter; 431 u32 msix; 432 u32 eims; /* This queue's EIMS bit */ 433 u32 me; 434 struct tx_ring txr; 435 }; 436 437 struct em_rx_queue { 438 struct adapter *adapter; 439 u32 me; 440 u32 msix; 441 u32 eims; 442 struct rx_ring rxr; 443 u64 irqs; 444 struct if_irq que_irq; 445 }; 446 447 /* Our adapter structure */ 448 struct adapter { 449 struct ifnet *ifp; 450 struct e1000_hw hw; 451 452 if_softc_ctx_t shared; 453 if_ctx_t ctx; 454 #define tx_num_queues shared->isc_ntxqsets 455 #define rx_num_queues shared->isc_nrxqsets 456 #define intr_type shared->isc_intr 457 /* FreeBSD operating-system-specific structures. */ 458 struct e1000_osdep osdep; 459 device_t dev; 460 struct cdev *led_dev; 461 462 struct em_tx_queue *tx_queues; 463 struct em_rx_queue *rx_queues; 464 struct if_irq irq; 465 466 struct resource *memory; 467 struct resource *flash; 468 struct resource *ioport; 469 int io_rid; 470 471 struct resource *res; 472 void *tag; 473 u32 linkvec; 474 u32 ivars; 475 476 struct ifmedia *media; 477 int msix; 478 int if_flags; 479 int em_insert_vlan_header; 480 u32 ims; 481 bool in_detach; 482 483 u32 flags; 484 /* Task for FAST handling */ 485 struct grouptask link_task; 486 487 u16 num_vlans; 488 u32 txd_cmd; 489 490 u32 tx_process_limit; 491 u32 rx_process_limit; 492 u32 rx_mbuf_sz; 493 494 /* Management and WOL features */ 495 u32 wol; 496 bool has_manage; 497 bool has_amt; 498 499 /* Multicast array memory */ 500 u8 *mta; 501 502 /* 503 ** Shadow VFTA table, this is needed because 504 ** the real vlan filter table gets cleared during 505 ** a soft reset and the driver needs to be able 506 ** to repopulate it. 507 */ 508 u32 shadow_vfta[EM_VFTA_SIZE]; 509 510 /* Info about the interface */ 511 u16 link_active; 512 u16 fc; 513 u16 link_speed; 514 u16 link_duplex; 515 u32 smartspeed; 516 u32 dmac; 517 int link_mask; 518 519 u64 que_mask; 520 521 522 struct em_int_delay_info tx_int_delay; 523 struct em_int_delay_info tx_abs_int_delay; 524 struct em_int_delay_info rx_int_delay; 525 struct em_int_delay_info rx_abs_int_delay; 526 struct em_int_delay_info tx_itr; 527 528 /* Misc stats maintained by the driver */ 529 unsigned long dropped_pkts; 530 unsigned long link_irq; 531 unsigned long mbuf_defrag_failed; 532 unsigned long no_tx_dma_setup; 533 unsigned long no_tx_map_avail; 534 unsigned long rx_overruns; 535 unsigned long watchdog_events; 536 537 struct e1000_hw_stats stats; 538 u16 vf_ifp; 539 }; 540 541 /******************************************************************************** 542 * vendor_info_array 543 * 544 * This array contains the list of Subvendor/Subdevice IDs on which the driver 545 * should load. 546 * 547 ********************************************************************************/ 548 typedef struct _em_vendor_info_t { 549 unsigned int vendor_id; 550 unsigned int device_id; 551 unsigned int subvendor_id; 552 unsigned int subdevice_id; 553 unsigned int index; 554 } em_vendor_info_t; 555 556 void em_dump_rs(struct adapter *); 557 558 #define EM_CORE_LOCK_INIT(_sc, _name) \ 559 mtx_init(&(_sc)->core_mtx, _name, "EM Core Lock", MTX_DEF) 560 #define EM_TX_LOCK_INIT(_sc, _name) \ 561 mtx_init(&(_sc)->tx_mtx, _name, "EM TX Lock", MTX_DEF) 562 #define EM_RX_LOCK_INIT(_sc, _name) \ 563 mtx_init(&(_sc)->rx_mtx, _name, "EM RX Lock", MTX_DEF) 564 #define EM_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 565 #define EM_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 566 #define EM_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 567 #define EM_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 568 #define EM_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 569 #define EM_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 570 #define EM_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 571 #define EM_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 572 #define EM_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 573 #define EM_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 574 #define EM_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 575 #define EM_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 576 #define EM_RX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->rx_mtx, MA_OWNED) 577 578 #define EM_RSSRK_SIZE 4 579 #define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \ 580 key[(i) * EM_RSSRK_SIZE + 1] << 8 | \ 581 key[(i) * EM_RSSRK_SIZE + 2] << 16 | \ 582 key[(i) * EM_RSSRK_SIZE + 3] << 24) 583 #endif /* _EM_H_DEFINED_ */ 584