xref: /freebsd/sys/dev/enic/enic.h (revision dad64f0e)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2008-2017 Cisco Systems, Inc.  All rights reserved.
3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4  */
5 
6 #include <sys/cdefs.h>
7 __FBSDID("$FreeBSD: $");
8 
9 #ifndef _ENIC_H
10 #define _ENIC_H
11 
12 #include <sys/param.h>
13 #include <sys/socket.h>
14 #include <sys/sysctl.h>
15 #include <sys/taskqueue.h>
16 
17 #include <machine/bus.h>
18 
19 #include <net/ethernet.h>
20 #include <net/if.h>
21 #include <net/if_var.h>
22 #include <net/iflib.h>
23 
24 #define u8  uint8_t
25 #define u16 uint16_t
26 #define u32 uint32_t
27 #define u64 uint64_t
28 
29 struct enic_bar_info {
30 	struct resource		*res;
31 	bus_space_tag_t		tag;
32 	bus_space_handle_t	handle;
33 	bus_size_t		size;
34 	int			rid;
35 	int			offset;
36 };
37 
38 #define ENIC_BUS_WRITE_8(res, index, value) \
39     bus_space_write_8(res->bar.tag, res->bar.handle, \
40     res->bar.offset + (index), value)
41 #define ENIC_BUS_WRITE_4(res, index, value) \
42     bus_space_write_4(res->bar.tag, res->bar.handle, \
43     res->bar.offset + (index), value)
44 #define ENIC_BUS_WRITE_REGION_4(res, index, values, count) \
45     bus_space_write_region_4(res->bar.tag, res->bar.handle, \
46     res->bar.offset + (index), values, count);
47 
48 #define ENIC_BUS_READ_8(res, index) \
49     bus_space_read_8(res->bar.tag, res->bar.handle, \
50     res->bar.offset + (index))
51 #define ENIC_BUS_READ_4(res, index) \
52     bus_space_read_4(res->bar.tag, res->bar.handle, \
53     res->bar.offset + (index))
54 #define ENIC_BUS_READ_REGION_4(res, type, index, values, count) \
55     bus_space_read_region_4(res->type.tag, res->type.handle, \
56     res->type.offset + (index), values, count);
57 
58 struct vnic_res {
59 	unsigned int count;
60 	struct enic_bar_info bar;
61 };
62 
63 #include "vnic_enet.h"
64 #include "vnic_dev.h"
65 #include "vnic_wq.h"
66 #include "vnic_rq.h"
67 #include "vnic_cq.h"
68 #include "vnic_intr.h"
69 #include "vnic_stats.h"
70 #include "vnic_nic.h"
71 #include "vnic_rss.h"
72 #include "enic_res.h"
73 #include "cq_enet_desc.h"
74 
75 #define ENIC_LOCK(_softc)	mtx_lock(&(_softc)->enic_lock)
76 #define ENIC_UNLOCK(_softc)	mtx_unlock(&(_softc)->enic_lock)
77 
78 #define DRV_NAME		"enic"
79 #define DRV_DESCRIPTION		"Cisco VIC Ethernet NIC"
80 #define DRV_COPYRIGHT		"Copyright 2008-2015 Cisco Systems, Inc"
81 
82 #define ENIC_MAX_MAC_ADDR	64
83 
84 #define VLAN_ETH_HLEN           18
85 
86 #define ENICPMD_SETTING(enic, f) ((enic->config.flags & VENETF_##f) ? 1 : 0)
87 
88 #define ENICPMD_BDF_LENGTH		13   /* 0000:00:00.0'\0' */
89 #define ENIC_CALC_IP_CKSUM		1
90 #define ENIC_CALC_TCP_UDP_CKSUM		2
91 #define ENIC_MAX_MTU			9000
92 #define ENIC_PAGE_SIZE			4096
93 #define PAGE_ROUND_UP(x) \
94 	((((unsigned long)(x)) + ENIC_PAGE_SIZE-1) & (~(ENIC_PAGE_SIZE-1)))
95 
96 /* must be >= VNIC_COUNTER_DMA_MIN_PERIOD */
97 #define VNIC_FLOW_COUNTER_UPDATE_MSECS 500
98 
99 /* PCI IDs */
100 #define CISCO_VENDOR_ID	0x1137
101 
102 #define PCI_DEVICE_ID_CISCO_VIC_ENET	0x0043  /* ethernet vnic */
103 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF	0x0071  /* enet SRIOV VF */
104 
105 /* Special Filter id for non-specific packet flagging. Don't change value */
106 #define ENIC_MAGIC_FILTER_ID 0xffff
107 
108 #define ENICPMD_FDIR_MAX		64
109 
110 /* HW default VXLAN port */
111 #define ENIC_DEFAULT_VXLAN_PORT		4789
112 
113 /*
114  * Interrupt 0: LSC and errors
115  * Interrupt 1: rx queue 0
116  * Interrupt 2: rx queue 1
117  * ...
118  */
119 #define ENICPMD_LSC_INTR_OFFSET 0
120 #define ENICPMD_RXQ_INTR_OFFSET 1
121 
122 #include "vnic_devcmd.h"
123 
124 enum vnic_proxy_type {
125 	PROXY_NONE,
126 	PROXY_BY_BDF,
127 	PROXY_BY_INDEX,
128 };
129 
130 struct vnic_intr_coal_timer_info {
131 	u32 mul;
132 	u32 div;
133 	u32 max_usec;
134 };
135 
136 struct enic_softc;
137 struct vnic_dev {
138 	void *priv;
139 	struct rte_pci_device *pdev;
140 	struct vnic_res res[RES_TYPE_MAX];
141 	enum vnic_dev_intr_mode intr_mode;
142 	struct vnic_res __iomem *devcmd;
143 	struct vnic_devcmd_notify *notify;
144 	struct vnic_devcmd_notify notify_copy;
145 	bus_addr_t notify_pa;
146 	struct iflib_dma_info notify_res;
147 	u32 notify_sz;
148 	struct iflib_dma_info linkstatus_res;
149 	struct vnic_stats *stats;
150 	struct iflib_dma_info stats_res;
151 	struct vnic_devcmd_fw_info *fw_info;
152 	struct iflib_dma_info fw_info_res;
153 	enum vnic_proxy_type proxy;
154 	u32 proxy_index;
155 	u64 args[VNIC_DEVCMD_NARGS];
156 	int in_reset;
157 	struct vnic_intr_coal_timer_info intr_coal_timer_info;
158 	void *(*alloc_consistent)(void *priv, size_t size,
159 	    bus_addr_t *dma_handle, struct iflib_dma_info *res, u8 *name);
160 	void (*free_consistent)(void *priv, size_t size, void *vaddr,
161 	    bus_addr_t dma_handle, struct iflib_dma_info *res);
162 	struct vnic_counter_counts *flow_counters;
163 	struct iflib_dma_info flow_counters_res;
164 	u8 flow_counters_dma_active;
165 	struct enic_softc *softc;
166 };
167 
168 struct enic_soft_stats {
169 	uint64_t rx_nombuf;
170 	uint64_t rx_packet_errors;
171 	uint64_t tx_oversized;
172 };
173 
174 struct intr_queue {
175 	struct if_irq intr_irq;
176 	struct resource *res;
177 	int rid;
178 	struct enic_softc *softc;
179 };
180 
181 struct enic {
182 	struct enic *next;
183 	struct rte_pci_device *pdev;
184 	struct vnic_enet_config config;
185 	struct vnic_dev_bar bar0;
186 	struct vnic_dev *vdev;
187 
188 	/*
189 	 * mbuf_initializer contains 64 bits of mbuf rearm_data, used by
190 	 * the avx2 handler at this time.
191 	 */
192 	uint64_t mbuf_initializer;
193 	unsigned int port_id;
194 	bool overlay_offload;
195 	char bdf_name[ENICPMD_BDF_LENGTH];
196 	int dev_fd;
197 	int iommu_group_fd;
198 	int iommu_groupid;
199 	int eventfd;
200 	uint8_t mac_addr[ETH_ALEN];
201 	pthread_t err_intr_thread;
202 	u8 ig_vlan_strip_en;
203 	int link_status;
204 	u8 hw_ip_checksum;
205 	u16 max_mtu;
206 	u8 adv_filters;
207 	u32 flow_filter_mode;
208 	u8 filter_actions; /* HW supported actions */
209 	bool vxlan;
210 	bool disable_overlay; /* devargs disable_overlay=1 */
211 	uint8_t enable_avx2_rx;  /* devargs enable-avx2-rx=1 */
212 	bool nic_cfg_chk;     /* NIC_CFG_CHK available */
213 	bool udp_rss_weak;    /* Bodega style UDP RSS */
214 	uint8_t ig_vlan_rewrite_mode; /* devargs ig-vlan-rewrite */
215 	uint16_t vxlan_port;  /* current vxlan port pushed to NIC */
216 
217 	unsigned int flags;
218 	unsigned int priv_flags;
219 
220 	/* work queue (len = conf_wq_count) */
221 	struct vnic_wq *wq;
222 	unsigned int wq_count; /* equals eth_dev nb_tx_queues */
223 
224 	/* receive queue (len = conf_rq_count) */
225 	struct vnic_rq *rq;
226 	unsigned int rq_count; /* equals eth_dev nb_rx_queues */
227 
228 	/* completion queue (len = conf_cq_count) */
229 	struct vnic_cq *cq;
230 	unsigned int cq_count; /* equals rq_count + wq_count */
231 
232 	/* interrupt vectors (len = conf_intr_count) */
233 	struct vnic_intr *intr;
234 	struct intr_queue *intr_queues;;
235 	unsigned int intr_count; /* equals enabled interrupts (lsc + rxqs) */
236 
237 
238 	/* software counters */
239 	struct enic_soft_stats soft_stats;
240 
241 	/* configured resources on vic */
242 	unsigned int conf_rq_count;
243 	unsigned int conf_wq_count;
244 	unsigned int conf_cq_count;
245 	unsigned int conf_intr_count;
246 
247 	/* linked list storing memory allocations */
248 	LIST_HEAD(enic_memzone_list, enic_memzone_entry) memzone_list;
249 
250 	LIST_HEAD(enic_flows, rte_flow) flows;
251 	int max_flow_counter;
252 
253 	/* RSS */
254 	uint16_t reta_size;
255 	uint8_t hash_key_size;
256 	uint64_t flow_type_rss_offloads; /* 0 indicates RSS not supported */
257 	/*
258 	 * Keep a copy of current RSS config for queries, as we cannot retrieve
259 	 * it from the NIC.
260 	 */
261 	uint8_t rss_hash_type; /* NIC_CFG_RSS_HASH_TYPE flags */
262 	uint8_t rss_enable;
263 	uint64_t rss_hf; /* ETH_RSS flags */
264 	union vnic_rss_key rss_key;
265 	union vnic_rss_cpu rss_cpu;
266 
267 	uint64_t rx_offload_capa; /* DEV_RX_OFFLOAD flags */
268 	uint64_t tx_offload_capa; /* DEV_TX_OFFLOAD flags */
269 	uint64_t tx_queue_offload_capa; /* DEV_TX_OFFLOAD flags */
270 	uint64_t tx_offload_mask; /* PKT_TX flags accepted */
271 	struct enic_softc *softc;
272 	int port_mtu;
273 };
274 
275 struct enic_softc {
276 	device_t		dev;
277 	if_ctx_t		ctx;
278 	if_softc_ctx_t		scctx;
279 	if_shared_ctx_t		sctx;
280 	struct ifmedia		*media;
281 	if_t			ifp;
282 
283 	struct mtx		enic_lock;
284 
285 	struct enic_bar_info	mem;
286 	struct enic_bar_info	io;
287 
288 	struct vnic_dev		vdev;
289 	struct enic		enic;
290 
291 	int ntxqsets;
292 	int nrxqsets;
293 
294 	struct if_irq		enic_event_intr_irq;
295 	struct if_irq		enic_err_intr_irq;
296 	uint8_t			lladdr[ETHER_ADDR_LEN];
297 	int			link_active;
298 	int			stopped;
299 	uint8_t			mac_addr[ETHER_ADDR_LEN];
300 
301 	int			directed;
302 	int			multicast;
303 	int			broadcast;
304 	int			promisc;
305 	int 			allmulti;
306 
307 	u_int			mc_count;
308 	uint8_t			*mta;
309 };
310 
311 /* Per-instance private data structure */
312 
313 static inline unsigned int enic_vnic_rq_count(struct enic *enic)
314 {
315 	return enic->rq_count;
316 }
317 
318 static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
319 {
320 	return rq;
321 }
322 
323 static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
324 {
325 	return enic->rq_count + wq;
326 }
327 
328 static inline uint32_t
329 enic_ring_add(uint32_t n_descriptors, uint32_t i0, uint32_t i1)
330 {
331 	uint32_t d = i0 + i1;
332 	d -= (d >= n_descriptors) ? n_descriptors : 0;
333 	return d;
334 }
335 
336 static inline uint32_t
337 enic_ring_sub(uint32_t n_descriptors, uint32_t i0, uint32_t i1)
338 {
339 	int32_t d = i1 - i0;
340 	return (uint32_t)((d < 0) ? ((int32_t)n_descriptors + d) : d);
341 }
342 
343 static inline uint32_t
344 enic_ring_incr(uint32_t n_descriptors, uint32_t idx)
345 {
346 	idx++;
347 	if (unlikely(idx == n_descriptors))
348 		idx = 0;
349 	return idx;
350 }
351 
352 void enic_free_wq(void *txq);
353 int enic_alloc_intr_resources(struct enic *enic);
354 int enic_setup_finish(struct enic *enic);
355 int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,
356 		  unsigned int socket_id, uint16_t nb_desc);
357 void enic_start_wq(struct enic *enic, uint16_t queue_idx);
358 int enic_stop_wq(struct enic *enic, uint16_t queue_idx);
359 void enic_start_rq(struct enic *enic, uint16_t queue_idx);
360 void enic_free_rq(void *rxq);
361 int enic_set_vnic_res(struct enic *enic);
362 int enic_init_rss_nic_cfg(struct enic *enic);
363 int enic_set_rss_reta(struct enic *enic, union vnic_rss_cpu *rss_cpu);
364 int enic_set_vlan_strip(struct enic *enic);
365 int enic_enable(struct enic *enic);
366 int enic_disable(struct enic *enic);
367 void enic_remove(struct enic *enic);
368 int enic_get_link_status(struct enic *enic);
369 void enic_dev_stats_clear(struct enic *enic);
370 void enic_add_packet_filter(struct enic *enic);
371 int enic_set_mac_address(struct enic *enic, uint8_t *mac_addr);
372 int enic_del_mac_address(struct enic *enic, int mac_index);
373 unsigned int enic_cleanup_wq(struct enic *enic, struct vnic_wq *wq);
374 
375 void enic_post_wq_index(struct vnic_wq *wq);
376 int enic_probe(struct enic *enic);
377 int enic_clsf_init(struct enic *enic);
378 void enic_clsf_destroy(struct enic *enic);
379 int enic_set_mtu(struct enic *enic, uint16_t new_mtu);
380 int enic_link_update(struct enic *enic);
381 bool enic_use_vector_rx_handler(struct enic *enic);
382 void enic_fdir_info(struct enic *enic);
383 void enic_prep_wq_for_simple_tx(struct enic *, uint16_t);
384 
385 struct enic_ring {
386 	uint64_t		paddr;
387 	caddr_t			 vaddr;
388 	struct enic_softc	*softc;
389 	uint32_t		ring_size; /* Must be a power of two */
390 	uint16_t		id;	   /* Logical ID */
391 	uint16_t		phys_id;
392 };
393 
394 struct enic_cp_ring {
395 	struct enic_ring	ring;
396 	struct if_irq		irq;
397 	uint32_t		cons;
398 	bool			v_bit;	  /* Value of valid bit */
399 	struct ctx_hw_stats	*stats;
400 	uint32_t		stats_ctx_id;
401 	uint32_t		last_idx; /* Used by RX rings only
402 					   * set to the last read pidx
403 					   */
404 };
405 
406 #endif /* _ENIC_H_ */
407