1 /*-
2  * Copyright (c) 2011-2012 Stefan Bethke.
3  * Copyright (c) 2012 Adrian Chadd.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  */
29 
30 #include <sys/param.h>
31 #include <sys/bus.h>
32 #include <sys/errno.h>
33 #include <sys/kernel.h>
34 #include <sys/malloc.h>
35 #include <sys/module.h>
36 #include <sys/socket.h>
37 #include <sys/sockio.h>
38 #include <sys/sysctl.h>
39 #include <sys/systm.h>
40 
41 #include <net/if.h>
42 #include <net/if_var.h>
43 #include <net/if_arp.h>
44 #include <net/ethernet.h>
45 #include <net/if_dl.h>
46 #include <net/if_media.h>
47 #include <net/if_types.h>
48 
49 #include <machine/bus.h>
50 #include <dev/iicbus/iic.h>
51 #include <dev/iicbus/iiconf.h>
52 #include <dev/iicbus/iicbus.h>
53 #include <dev/mii/mii.h>
54 #include <dev/mii/miivar.h>
55 #include <dev/mdio/mdio.h>
56 
57 #include <dev/etherswitch/etherswitch.h>
58 
59 #include <dev/etherswitch/arswitch/arswitchreg.h>
60 #include <dev/etherswitch/arswitch/arswitchvar.h>
61 #include <dev/etherswitch/arswitch/arswitch_reg.h>
62 #include <dev/etherswitch/arswitch/arswitch_phy.h>
63 #include <dev/etherswitch/arswitch/arswitch_vlans.h>
64 
65 #include <dev/etherswitch/arswitch/arswitch_7240.h>
66 #include <dev/etherswitch/arswitch/arswitch_8216.h>
67 #include <dev/etherswitch/arswitch/arswitch_8226.h>
68 #include <dev/etherswitch/arswitch/arswitch_8316.h>
69 #include <dev/etherswitch/arswitch/arswitch_8327.h>
70 #include <dev/etherswitch/arswitch/arswitch_9340.h>
71 
72 #include "mdio_if.h"
73 #include "miibus_if.h"
74 #include "etherswitch_if.h"
75 
76 /* Map ETHERSWITCH_PORT_LED_* to Atheros pattern codes */
77 static int led_pattern_table[] = {
78 	[ETHERSWITCH_PORT_LED_DEFAULT] = 0x3,
79 	[ETHERSWITCH_PORT_LED_ON] = 0x2,
80 	[ETHERSWITCH_PORT_LED_OFF] = 0x0,
81 	[ETHERSWITCH_PORT_LED_BLINK] = 0x1
82 };
83 
84 static inline int arswitch_portforphy(int phy);
85 static void arswitch_tick(void *arg);
86 static int arswitch_ifmedia_upd(struct ifnet *);
87 static void arswitch_ifmedia_sts(struct ifnet *, struct ifmediareq *);
88 static int ar8xxx_port_vlan_setup(struct arswitch_softc *sc,
89     etherswitch_port_t *p);
90 static int ar8xxx_port_vlan_get(struct arswitch_softc *sc,
91     etherswitch_port_t *p);
92 static int arswitch_setled(struct arswitch_softc *sc, int phy, int led,
93     int style);
94 
95 static int
96 arswitch_probe(device_t dev)
97 {
98 	struct arswitch_softc *sc;
99 	uint32_t id;
100 	char *chipname, desc[256];
101 
102 	sc = device_get_softc(dev);
103 	bzero(sc, sizeof(*sc));
104 	sc->page = -1;
105 
106 	/* AR7240 probe */
107 	if (ar7240_probe(dev) == 0) {
108 		chipname = "AR7240";
109 		sc->sc_switchtype = AR8X16_SWITCH_AR7240;
110 		sc->is_internal_switch = 1;
111 		id = 0;
112 		goto done;
113 	}
114 
115 	/* AR9340 probe */
116 	if (ar9340_probe(dev) == 0) {
117 		chipname = "AR9340";
118 		sc->sc_switchtype = AR8X16_SWITCH_AR9340;
119 		sc->is_internal_switch = 1;
120 		id = 0;
121 		goto done;
122 	}
123 
124 	/* AR8xxx probe */
125 	id = arswitch_readreg(dev, AR8X16_REG_MASK_CTRL);
126 	sc->chip_rev = (id & AR8X16_MASK_CTRL_REV_MASK);
127 	sc->chip_ver = (id & AR8X16_MASK_CTRL_VER_MASK) > AR8X16_MASK_CTRL_VER_SHIFT;
128 	switch (id & (AR8X16_MASK_CTRL_VER_MASK | AR8X16_MASK_CTRL_REV_MASK)) {
129 	case 0x0101:
130 		chipname = "AR8216";
131 		sc->sc_switchtype = AR8X16_SWITCH_AR8216;
132 		break;
133 	case 0x0201:
134 		chipname = "AR8226";
135 		sc->sc_switchtype = AR8X16_SWITCH_AR8226;
136 		break;
137 	/* 0x0301 - AR8236 */
138 	case 0x1000:
139 	case 0x1001:
140 		chipname = "AR8316";
141 		sc->sc_switchtype = AR8X16_SWITCH_AR8316;
142 		break;
143 	case 0x1202:
144 	case 0x1204:
145 		chipname = "AR8327";
146 		sc->sc_switchtype = AR8X16_SWITCH_AR8327;
147 		sc->mii_lo_first = 1;
148 		break;
149 	default:
150 		chipname = NULL;
151 	}
152 
153 done:
154 
155 	DPRINTF(sc, ARSWITCH_DBG_ANY, "chipname=%s, id=%08x\n", chipname, id);
156 	if (chipname != NULL) {
157 		snprintf(desc, sizeof(desc),
158 		    "Atheros %s Ethernet Switch (ver %d rev %d)",
159 		    chipname,
160 		    sc->chip_ver,
161 		    sc->chip_rev);
162 		device_set_desc_copy(dev, desc);
163 		return (BUS_PROBE_DEFAULT);
164 	}
165 	return (ENXIO);
166 }
167 
168 static int
169 arswitch_attach_phys(struct arswitch_softc *sc)
170 {
171 	int phy, err = 0;
172 	char name[IFNAMSIZ];
173 
174 	/* PHYs need an interface, so we generate a dummy one */
175 	snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->sc_dev));
176 	for (phy = 0; phy < sc->numphys; phy++) {
177 		sc->ifp[phy] = if_alloc(IFT_ETHER);
178 		sc->ifp[phy]->if_softc = sc;
179 		sc->ifp[phy]->if_flags |= IFF_UP | IFF_BROADCAST |
180 		    IFF_DRV_RUNNING | IFF_SIMPLEX;
181 		sc->ifname[phy] = malloc(strlen(name)+1, M_DEVBUF, M_WAITOK);
182 		bcopy(name, sc->ifname[phy], strlen(name)+1);
183 		if_initname(sc->ifp[phy], sc->ifname[phy],
184 		    arswitch_portforphy(phy));
185 		err = mii_attach(sc->sc_dev, &sc->miibus[phy], sc->ifp[phy],
186 		    arswitch_ifmedia_upd, arswitch_ifmedia_sts, \
187 		    BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0);
188 #if 0
189 		DPRINTF(sc->sc_dev, "%s attached to pseudo interface %s\n",
190 		    device_get_nameunit(sc->miibus[phy]),
191 		    sc->ifp[phy]->if_xname);
192 #endif
193 		if (err != 0) {
194 			device_printf(sc->sc_dev,
195 			    "attaching PHY %d failed\n",
196 			    phy);
197 			return (err);
198 		}
199 
200 		if (AR8X16_IS_SWITCH(sc, AR8327)) {
201 			int led;
202 			char ledname[IFNAMSIZ+4];
203 
204 			for (led = 0; led < 3; led++) {
205 				sprintf(ledname, "%s%dled%d", name,
206 				    arswitch_portforphy(phy), led+1);
207 				sc->dev_led[phy][led].sc = sc;
208 				sc->dev_led[phy][led].phy = phy;
209 				sc->dev_led[phy][led].lednum = led;
210 			}
211 		}
212 	}
213 	return (0);
214 }
215 
216 static int
217 arswitch_reset(device_t dev)
218 {
219 
220 	arswitch_writereg(dev, AR8X16_REG_MASK_CTRL,
221 	    AR8X16_MASK_CTRL_SOFT_RESET);
222 	DELAY(1000);
223 	if (arswitch_readreg(dev, AR8X16_REG_MASK_CTRL) &
224 	    AR8X16_MASK_CTRL_SOFT_RESET) {
225 		device_printf(dev, "unable to reset switch\n");
226 		return (-1);
227 	}
228 	return (0);
229 }
230 
231 static int
232 arswitch_set_vlan_mode(struct arswitch_softc *sc, uint32_t mode)
233 {
234 
235 	/* Check for invalid modes. */
236 	if ((mode & sc->info.es_vlan_caps) != mode)
237 		return (EINVAL);
238 
239 	switch (mode) {
240 	case ETHERSWITCH_VLAN_DOT1Q:
241 		sc->vlan_mode = ETHERSWITCH_VLAN_DOT1Q;
242 		break;
243 	case ETHERSWITCH_VLAN_PORT:
244 		sc->vlan_mode = ETHERSWITCH_VLAN_PORT;
245 		break;
246 	default:
247 		sc->vlan_mode = 0;
248 	}
249 
250 	/* Reset VLANs. */
251 	sc->hal.arswitch_vlan_init_hw(sc);
252 
253 	return (0);
254 }
255 
256 static void
257 ar8xxx_port_init(struct arswitch_softc *sc, int port)
258 {
259 
260 	/* Port0 - CPU */
261 	if (port == AR8X16_PORT_CPU) {
262 		arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_STS(0),
263 		    (AR8X16_IS_SWITCH(sc, AR8216) ?
264 		    AR8X16_PORT_STS_SPEED_100 : AR8X16_PORT_STS_SPEED_1000) |
265 		    (AR8X16_IS_SWITCH(sc, AR8216) ? 0 : AR8X16_PORT_STS_RXFLOW) |
266 		    (AR8X16_IS_SWITCH(sc, AR8216) ? 0 : AR8X16_PORT_STS_TXFLOW) |
267 		    AR8X16_PORT_STS_RXMAC |
268 		    AR8X16_PORT_STS_TXMAC |
269 		    AR8X16_PORT_STS_DUPLEX);
270 		arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_CTRL(0),
271 		    arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(0)) &
272 		    ~AR8X16_PORT_CTRL_HEADER);
273 	} else {
274 		/* Set ports to auto negotiation. */
275 		arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_STS(port),
276 		    AR8X16_PORT_STS_LINK_AUTO);
277 		arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_CTRL(port),
278 		    arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(port)) &
279 		    ~AR8X16_PORT_CTRL_HEADER);
280 	}
281 }
282 
283 static int
284 ar8xxx_atu_flush(struct arswitch_softc *sc)
285 {
286 	int ret;
287 
288 	ret = arswitch_waitreg(sc->sc_dev,
289 	    AR8216_REG_ATU,
290 	    AR8216_ATU_ACTIVE,
291 	    0,
292 	    1000);
293 
294 	if (ret)
295 		device_printf(sc->sc_dev, "%s: waitreg failed\n", __func__);
296 
297 	if (!ret)
298 		arswitch_writereg(sc->sc_dev,
299 		    AR8216_REG_ATU,
300 		    AR8216_ATU_OP_FLUSH);
301 
302 	return (ret);
303 }
304 
305 static int
306 arswitch_attach(device_t dev)
307 {
308 	struct arswitch_softc *sc = device_get_softc(dev);
309 	struct sysctl_ctx_list *ctx;
310 	struct sysctl_oid *tree;
311 	int err = 0;
312 	int port;
313 
314 	/* sc->sc_switchtype is already decided in arswitch_probe() */
315 	sc->sc_dev = dev;
316 	mtx_init(&sc->sc_mtx, "arswitch", NULL, MTX_DEF);
317 	sc->page = -1;
318 	strlcpy(sc->info.es_name, device_get_desc(dev),
319 	    sizeof(sc->info.es_name));
320 
321 	/* Debugging */
322 	ctx = device_get_sysctl_ctx(sc->sc_dev);
323 	tree = device_get_sysctl_tree(sc->sc_dev);
324 	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
325 	    "debug", CTLFLAG_RW, &sc->sc_debug, 0,
326 	    "control debugging printfs");
327 
328 	/* Default HAL methods */
329 	sc->hal.arswitch_port_init = ar8xxx_port_init;
330 	sc->hal.arswitch_port_vlan_setup = ar8xxx_port_vlan_setup;
331 	sc->hal.arswitch_port_vlan_get = ar8xxx_port_vlan_get;
332 	sc->hal.arswitch_vlan_init_hw = ar8xxx_reset_vlans;
333 
334 	sc->hal.arswitch_vlan_getvgroup = ar8xxx_getvgroup;
335 	sc->hal.arswitch_vlan_setvgroup = ar8xxx_setvgroup;
336 
337 	sc->hal.arswitch_vlan_get_pvid = ar8xxx_get_pvid;
338 	sc->hal.arswitch_vlan_set_pvid = ar8xxx_set_pvid;
339 
340 	sc->hal.arswitch_get_dot1q_vlan = ar8xxx_get_dot1q_vlan;
341 	sc->hal.arswitch_set_dot1q_vlan = ar8xxx_set_dot1q_vlan;
342 	sc->hal.arswitch_flush_dot1q_vlan = ar8xxx_flush_dot1q_vlan;
343 	sc->hal.arswitch_purge_dot1q_vlan = ar8xxx_purge_dot1q_vlan;
344 	sc->hal.arswitch_get_port_vlan = ar8xxx_get_port_vlan;
345 	sc->hal.arswitch_set_port_vlan = ar8xxx_set_port_vlan;
346 
347 	sc->hal.arswitch_atu_flush = ar8xxx_atu_flush;
348 
349 	sc->hal.arswitch_phy_read = arswitch_readphy_internal;
350 	sc->hal.arswitch_phy_write = arswitch_writephy_internal;
351 
352 
353 	/*
354 	 * Attach switch related functions
355 	 */
356 	if (AR8X16_IS_SWITCH(sc, AR7240))
357 		ar7240_attach(sc);
358 	else if (AR8X16_IS_SWITCH(sc, AR9340))
359 		ar9340_attach(sc);
360 	else if (AR8X16_IS_SWITCH(sc, AR8216))
361 		ar8216_attach(sc);
362 	else if (AR8X16_IS_SWITCH(sc, AR8226))
363 		ar8226_attach(sc);
364 	else if (AR8X16_IS_SWITCH(sc, AR8316))
365 		ar8316_attach(sc);
366 	else if (AR8X16_IS_SWITCH(sc, AR8327))
367 		ar8327_attach(sc);
368 	else {
369 		DPRINTF(sc, ARSWITCH_DBG_ANY,
370 		    "%s: unknown switch (%d)?\n", __func__, sc->sc_switchtype);
371 		return (ENXIO);
372 	}
373 
374 	/* Common defaults. */
375 	sc->info.es_nports = 5; /* XXX technically 6, but 6th not used */
376 
377 	/* XXX Defaults for externally connected AR8316 */
378 	sc->numphys = 4;
379 	sc->phy4cpu = 1;
380 	sc->is_rgmii = 1;
381 	sc->is_gmii = 0;
382 	sc->is_mii = 0;
383 
384 	(void) resource_int_value(device_get_name(dev), device_get_unit(dev),
385 	    "numphys", &sc->numphys);
386 	(void) resource_int_value(device_get_name(dev), device_get_unit(dev),
387 	    "phy4cpu", &sc->phy4cpu);
388 	(void) resource_int_value(device_get_name(dev), device_get_unit(dev),
389 	    "is_rgmii", &sc->is_rgmii);
390 	(void) resource_int_value(device_get_name(dev), device_get_unit(dev),
391 	    "is_gmii", &sc->is_gmii);
392 	(void) resource_int_value(device_get_name(dev), device_get_unit(dev),
393 	    "is_mii", &sc->is_mii);
394 
395 	if (sc->numphys > AR8X16_NUM_PHYS)
396 		sc->numphys = AR8X16_NUM_PHYS;
397 
398 	/* Reset the switch. */
399 	if (arswitch_reset(dev)) {
400 		DPRINTF(sc, ARSWITCH_DBG_ANY,
401 		    "%s: arswitch_reset: failed\n", __func__);
402 		return (ENXIO);
403 	}
404 
405 	err = sc->hal.arswitch_hw_setup(sc);
406 	if (err != 0) {
407 		DPRINTF(sc, ARSWITCH_DBG_ANY,
408 		    "%s: hw_setup: err=%d\n", __func__, err);
409 		return (err);
410 	}
411 
412 	err = sc->hal.arswitch_hw_global_setup(sc);
413 	if (err != 0) {
414 		DPRINTF(sc, ARSWITCH_DBG_ANY,
415 		    "%s: hw_global_setup: err=%d\n", __func__, err);
416 		return (err);
417 	}
418 
419 	/* Initialize the switch ports. */
420 	for (port = 0; port <= sc->numphys; port++) {
421 		sc->hal.arswitch_port_init(sc, port);
422 	}
423 
424 	/*
425 	 * Attach the PHYs and complete the bus enumeration.
426 	 */
427 	err = arswitch_attach_phys(sc);
428 	if (err != 0) {
429 		DPRINTF(sc, ARSWITCH_DBG_ANY,
430 		    "%s: attach_phys: err=%d\n", __func__, err);
431 		return (err);
432 	}
433 
434 	/* Default to ingress filters off. */
435 	err = arswitch_set_vlan_mode(sc, 0);
436 	if (err != 0) {
437 		DPRINTF(sc, ARSWITCH_DBG_ANY,
438 		    "%s: set_vlan_mode: err=%d\n", __func__, err);
439 		return (err);
440 	}
441 
442 	bus_generic_probe(dev);
443 	bus_enumerate_hinted_children(dev);
444 	err = bus_generic_attach(dev);
445 	if (err != 0) {
446 		DPRINTF(sc, ARSWITCH_DBG_ANY,
447 		    "%s: bus_generic_attach: err=%d\n", __func__, err);
448 		return (err);
449 	}
450 
451 	callout_init_mtx(&sc->callout_tick, &sc->sc_mtx, 0);
452 
453 	ARSWITCH_LOCK(sc);
454 	arswitch_tick(sc);
455 	ARSWITCH_UNLOCK(sc);
456 
457 	return (err);
458 }
459 
460 static int
461 arswitch_detach(device_t dev)
462 {
463 	struct arswitch_softc *sc = device_get_softc(dev);
464 	int i;
465 
466 	callout_drain(&sc->callout_tick);
467 
468 	for (i=0; i < sc->numphys; i++) {
469 		if (sc->miibus[i] != NULL)
470 			device_delete_child(dev, sc->miibus[i]);
471 		if (sc->ifp[i] != NULL)
472 			if_free(sc->ifp[i]);
473 		free(sc->ifname[i], M_DEVBUF);
474 	}
475 
476 	bus_generic_detach(dev);
477 	mtx_destroy(&sc->sc_mtx);
478 
479 	return (0);
480 }
481 
482 /*
483  * Convert PHY number to port number. PHY0 is connected to port 1, PHY1 to
484  * port 2, etc.
485  */
486 static inline int
487 arswitch_portforphy(int phy)
488 {
489 	return (phy+1);
490 }
491 
492 static inline struct mii_data *
493 arswitch_miiforport(struct arswitch_softc *sc, int port)
494 {
495 	int phy = port-1;
496 
497 	if (phy < 0 || phy >= sc->numphys)
498 		return (NULL);
499 	return (device_get_softc(sc->miibus[phy]));
500 }
501 
502 static inline struct ifnet *
503 arswitch_ifpforport(struct arswitch_softc *sc, int port)
504 {
505 	int phy = port-1;
506 
507 	if (phy < 0 || phy >= sc->numphys)
508 		return (NULL);
509 	return (sc->ifp[phy]);
510 }
511 
512 /*
513  * Convert port status to ifmedia.
514  */
515 static void
516 arswitch_update_ifmedia(int portstatus, u_int *media_status, u_int *media_active)
517 {
518 	*media_active = IFM_ETHER;
519 	*media_status = IFM_AVALID;
520 
521 	if ((portstatus & AR8X16_PORT_STS_LINK_UP) != 0)
522 		*media_status |= IFM_ACTIVE;
523 	else {
524 		*media_active |= IFM_NONE;
525 		return;
526 	}
527 	switch (portstatus & AR8X16_PORT_STS_SPEED_MASK) {
528 	case AR8X16_PORT_STS_SPEED_10:
529 		*media_active |= IFM_10_T;
530 		break;
531 	case AR8X16_PORT_STS_SPEED_100:
532 		*media_active |= IFM_100_TX;
533 		break;
534 	case AR8X16_PORT_STS_SPEED_1000:
535 		*media_active |= IFM_1000_T;
536 		break;
537 	}
538 	if ((portstatus & AR8X16_PORT_STS_DUPLEX) == 0)
539 		*media_active |= IFM_FDX;
540 	else
541 		*media_active |= IFM_HDX;
542 	if ((portstatus & AR8X16_PORT_STS_TXFLOW) != 0)
543 		*media_active |= IFM_ETH_TXPAUSE;
544 	if ((portstatus & AR8X16_PORT_STS_RXFLOW) != 0)
545 		*media_active |= IFM_ETH_RXPAUSE;
546 }
547 
548 /*
549  * Poll the status for all PHYs.  We're using the switch port status because
550  * thats a lot quicker to read than talking to all the PHYs.  Care must be
551  * taken that the resulting ifmedia_active is identical to what the PHY will
552  * compute, or gratuitous link status changes will occur whenever the PHYs
553  * update function is called.
554  */
555 static void
556 arswitch_miipollstat(struct arswitch_softc *sc)
557 {
558 	int i;
559 	struct mii_data *mii;
560 	struct mii_softc *miisc;
561 	int portstatus;
562 	int port_flap = 0;
563 
564 	ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
565 
566 	for (i = 0; i < sc->numphys; i++) {
567 		if (sc->miibus[i] == NULL)
568 			continue;
569 		mii = device_get_softc(sc->miibus[i]);
570 		/* XXX This would be nice to have abstracted out to be per-chip */
571 		/* AR8327/AR8337 has a different register base */
572 		if (AR8X16_IS_SWITCH(sc, AR8327))
573 			portstatus = arswitch_readreg(sc->sc_dev,
574 			    AR8327_REG_PORT_STATUS(arswitch_portforphy(i)));
575 		else
576 			portstatus = arswitch_readreg(sc->sc_dev,
577 			    AR8X16_REG_PORT_STS(arswitch_portforphy(i)));
578 #if 1
579 		DPRINTF(sc, ARSWITCH_DBG_POLL, "p[%d]=0x%08x (%b)\n",
580 		    i,
581 		    portstatus,
582 		    portstatus,
583 		    "\20\3TXMAC\4RXMAC\5TXFLOW\6RXFLOW\7"
584 		    "DUPLEX\11LINK_UP\12LINK_AUTO\13LINK_PAUSE");
585 #endif
586 		/*
587 		 * If the current status is down, but we have a link
588 		 * status showing up, we need to do an ATU flush.
589 		 */
590 		if ((mii->mii_media_status & IFM_ACTIVE) == 0 &&
591 		    (portstatus & AR8X16_PORT_STS_LINK_UP) != 0) {
592 			device_printf(sc->sc_dev, "%s: port %d: port -> UP\n",
593 			    __func__,
594 			    i);
595 			port_flap = 1;
596 		}
597 		/*
598 		 * and maybe if a port goes up->down?
599 		 */
600 		if ((mii->mii_media_status & IFM_ACTIVE) != 0 &&
601 		    (portstatus & AR8X16_PORT_STS_LINK_UP) == 0) {
602 			device_printf(sc->sc_dev, "%s: port %d: port -> DOWN\n",
603 			    __func__,
604 			    i);
605 			port_flap = 1;
606 		}
607 		arswitch_update_ifmedia(portstatus, &mii->mii_media_status,
608 		    &mii->mii_media_active);
609 		LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
610 			if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) !=
611 			    miisc->mii_inst)
612 				continue;
613 			mii_phy_update(miisc, MII_POLLSTAT);
614 		}
615 	}
616 
617 	/* If a port went from down->up, flush the ATU */
618 	if (port_flap)
619 		sc->hal.arswitch_atu_flush(sc);
620 }
621 
622 static void
623 arswitch_tick(void *arg)
624 {
625 	struct arswitch_softc *sc = arg;
626 
627 	arswitch_miipollstat(sc);
628 	callout_reset(&sc->callout_tick, hz, arswitch_tick, sc);
629 }
630 
631 static void
632 arswitch_lock(device_t dev)
633 {
634 	struct arswitch_softc *sc = device_get_softc(dev);
635 
636 	ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
637 	ARSWITCH_LOCK(sc);
638 }
639 
640 static void
641 arswitch_unlock(device_t dev)
642 {
643 	struct arswitch_softc *sc = device_get_softc(dev);
644 
645 	ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
646 	ARSWITCH_UNLOCK(sc);
647 }
648 
649 static etherswitch_info_t *
650 arswitch_getinfo(device_t dev)
651 {
652 	struct arswitch_softc *sc = device_get_softc(dev);
653 
654 	return (&sc->info);
655 }
656 
657 static int
658 ar8xxx_port_vlan_get(struct arswitch_softc *sc, etherswitch_port_t *p)
659 {
660 	uint32_t reg;
661 
662 	ARSWITCH_LOCK(sc);
663 
664 	/* Retrieve the PVID. */
665 	sc->hal.arswitch_vlan_get_pvid(sc, p->es_port, &p->es_pvid);
666 
667 	/* Port flags. */
668 	reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(p->es_port));
669 	if (reg & AR8X16_PORT_CTRL_DOUBLE_TAG)
670 		p->es_flags |= ETHERSWITCH_PORT_DOUBLE_TAG;
671 	reg >>= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT;
672 	if ((reg & 0x3) == AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_ADD)
673 		p->es_flags |= ETHERSWITCH_PORT_ADDTAG;
674 	if ((reg & 0x3) == AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_STRIP)
675 		p->es_flags |= ETHERSWITCH_PORT_STRIPTAG;
676 	ARSWITCH_UNLOCK(sc);
677 
678 	return (0);
679 }
680 
681 static int
682 arswitch_is_cpuport(struct arswitch_softc *sc, int port)
683 {
684 
685 	return ((port == AR8X16_PORT_CPU) ||
686 	    ((AR8X16_IS_SWITCH(sc, AR8327) &&
687 	      port == AR8327_PORT_GMAC6)));
688 }
689 
690 static int
691 arswitch_getport(device_t dev, etherswitch_port_t *p)
692 {
693 	struct arswitch_softc *sc;
694 	struct mii_data *mii;
695 	struct ifmediareq *ifmr;
696 	int err;
697 
698 	sc = device_get_softc(dev);
699 	/* XXX +1 is for AR8327; should make this configurable! */
700 	if (p->es_port < 0 || p->es_port > sc->info.es_nports)
701 		return (ENXIO);
702 
703 	err = sc->hal.arswitch_port_vlan_get(sc, p);
704 	if (err != 0)
705 		return (err);
706 
707 	mii = arswitch_miiforport(sc, p->es_port);
708 	if (arswitch_is_cpuport(sc, p->es_port)) {
709 		/* fill in fixed values for CPU port */
710 		/* XXX is this valid in all cases? */
711 		p->es_flags |= ETHERSWITCH_PORT_CPU;
712 		ifmr = &p->es_ifmr;
713 		ifmr->ifm_count = 0;
714 		ifmr->ifm_current = ifmr->ifm_active =
715 		    IFM_ETHER | IFM_1000_T | IFM_FDX;
716 		ifmr->ifm_mask = 0;
717 		ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
718 	} else if (mii != NULL) {
719 		err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
720 		    &mii->mii_media, SIOCGIFMEDIA);
721 		if (err)
722 			return (err);
723 	} else {
724 		return (ENXIO);
725 	}
726 
727 	if (!arswitch_is_cpuport(sc, p->es_port) &&
728 	    AR8X16_IS_SWITCH(sc, AR8327)) {
729 		int led;
730 		p->es_nleds = 3;
731 
732 		for (led = 0; led < p->es_nleds; led++)
733 		{
734 			int style;
735 			uint32_t val;
736 
737 			/* Find the right style enum for our pattern */
738 			val = arswitch_readreg(dev,
739 			    ar8327_led_mapping[p->es_port-1][led].reg);
740 			val = (val>>ar8327_led_mapping[p->es_port-1][led].shift)&0x03;
741 
742 			for (style = 0; style < ETHERSWITCH_PORT_LED_MAX; style++)
743 			{
744 				if (led_pattern_table[style] == val) break;
745 			}
746 
747 			/* can't happen */
748 			if (style == ETHERSWITCH_PORT_LED_MAX)
749 				style = ETHERSWITCH_PORT_LED_DEFAULT;
750 
751 			p->es_led[led] = style;
752 		}
753 	} else
754 	{
755 		p->es_nleds = 0;
756 	}
757 
758 	return (0);
759 }
760 
761 static int
762 ar8xxx_port_vlan_setup(struct arswitch_softc *sc, etherswitch_port_t *p)
763 {
764 	uint32_t reg;
765 	int err;
766 
767 	ARSWITCH_LOCK(sc);
768 
769 	/* Set the PVID. */
770 	if (p->es_pvid != 0)
771 		sc->hal.arswitch_vlan_set_pvid(sc, p->es_port, p->es_pvid);
772 
773 	/* Mutually exclusive. */
774 	if (p->es_flags & ETHERSWITCH_PORT_ADDTAG &&
775 	    p->es_flags & ETHERSWITCH_PORT_STRIPTAG) {
776 		ARSWITCH_UNLOCK(sc);
777 		return (EINVAL);
778 	}
779 
780 	reg = 0;
781 	if (p->es_flags & ETHERSWITCH_PORT_DOUBLE_TAG)
782 		reg |= AR8X16_PORT_CTRL_DOUBLE_TAG;
783 	if (p->es_flags & ETHERSWITCH_PORT_ADDTAG)
784 		reg |= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_ADD <<
785 		    AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT;
786 	if (p->es_flags & ETHERSWITCH_PORT_STRIPTAG)
787 		reg |= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_STRIP <<
788 		    AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT;
789 
790 	err = arswitch_modifyreg(sc->sc_dev,
791 	    AR8X16_REG_PORT_CTRL(p->es_port),
792 	    0x3 << AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT |
793 	    AR8X16_PORT_CTRL_DOUBLE_TAG, reg);
794 
795 	ARSWITCH_UNLOCK(sc);
796 	return (err);
797 }
798 
799 static int
800 arswitch_setport(device_t dev, etherswitch_port_t *p)
801 {
802 	int err, i;
803 	struct arswitch_softc *sc;
804 	struct ifmedia *ifm;
805 	struct mii_data *mii;
806 	struct ifnet *ifp;
807 
808 	sc = device_get_softc(dev);
809 	if (p->es_port < 0 || p->es_port > sc->info.es_nports)
810 		return (ENXIO);
811 
812 	/* Port flags. */
813 	if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
814 		err = sc->hal.arswitch_port_vlan_setup(sc, p);
815 		if (err)
816 			return (err);
817 	}
818 
819 	/* Do not allow media or led changes on CPU port. */
820 	if (arswitch_is_cpuport(sc, p->es_port))
821 		return (0);
822 
823 	if (AR8X16_IS_SWITCH(sc, AR8327))
824 	{
825 		for (i = 0; i < 3; i++)
826 		{
827 			int err;
828 			err = arswitch_setled(sc, p->es_port-1, i, p->es_led[i]);
829 			if (err)
830 				return (err);
831 		}
832 	}
833 
834 	mii = arswitch_miiforport(sc, p->es_port);
835 	if (mii == NULL)
836 		return (ENXIO);
837 
838 	ifp = arswitch_ifpforport(sc, p->es_port);
839 
840 	ifm = &mii->mii_media;
841 	return (ifmedia_ioctl(ifp, &p->es_ifr, ifm, SIOCSIFMEDIA));
842 }
843 
844 static int
845 arswitch_setled(struct arswitch_softc *sc, int phy, int led, int style)
846 {
847 	int shift;
848 	int err;
849 
850 	if (phy < 0 || phy > sc->numphys)
851 		return EINVAL;
852 
853 	if (style < 0 || style > ETHERSWITCH_PORT_LED_MAX)
854 		return (EINVAL);
855 
856 	ARSWITCH_LOCK(sc);
857 
858 	shift = ar8327_led_mapping[phy][led].shift;
859 	err = (arswitch_modifyreg(sc->sc_dev,
860 	    ar8327_led_mapping[phy][led].reg,
861 	    0x03 << shift, led_pattern_table[style] << shift));
862 	ARSWITCH_UNLOCK(sc);
863 
864 	return (err);
865 }
866 
867 static void
868 arswitch_statchg(device_t dev)
869 {
870 	struct arswitch_softc *sc = device_get_softc(dev);
871 
872 	DPRINTF(sc, ARSWITCH_DBG_POLL, "%s\n", __func__);
873 }
874 
875 static int
876 arswitch_ifmedia_upd(struct ifnet *ifp)
877 {
878 	struct arswitch_softc *sc = ifp->if_softc;
879 	struct mii_data *mii = arswitch_miiforport(sc, ifp->if_dunit);
880 
881 	if (mii == NULL)
882 		return (ENXIO);
883 	mii_mediachg(mii);
884 	return (0);
885 }
886 
887 static void
888 arswitch_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
889 {
890 	struct arswitch_softc *sc = ifp->if_softc;
891 	struct mii_data *mii = arswitch_miiforport(sc, ifp->if_dunit);
892 
893 	DPRINTF(sc, ARSWITCH_DBG_POLL, "%s\n", __func__);
894 
895 	if (mii == NULL)
896 		return;
897 	mii_pollstat(mii);
898 	ifmr->ifm_active = mii->mii_media_active;
899 	ifmr->ifm_status = mii->mii_media_status;
900 }
901 
902 static int
903 arswitch_getconf(device_t dev, etherswitch_conf_t *conf)
904 {
905 	struct arswitch_softc *sc;
906 
907 	sc = device_get_softc(dev);
908 
909 	/* Return the VLAN mode. */
910 	conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
911 	conf->vlan_mode = sc->vlan_mode;
912 
913 	return (0);
914 }
915 
916 static int
917 arswitch_setconf(device_t dev, etherswitch_conf_t *conf)
918 {
919 	struct arswitch_softc *sc;
920 	int err;
921 
922 	sc = device_get_softc(dev);
923 
924 	/* Set the VLAN mode. */
925 	if (conf->cmd & ETHERSWITCH_CONF_VLAN_MODE) {
926 		err = arswitch_set_vlan_mode(sc, conf->vlan_mode);
927 		if (err != 0)
928 			return (err);
929 	}
930 
931 	return (0);
932 }
933 
934 static int
935 arswitch_getvgroup(device_t dev, etherswitch_vlangroup_t *e)
936 {
937 	struct arswitch_softc *sc = device_get_softc(dev);
938 
939 	return (sc->hal.arswitch_vlan_getvgroup(sc, e));
940 }
941 
942 static int
943 arswitch_setvgroup(device_t dev, etherswitch_vlangroup_t *e)
944 {
945 	struct arswitch_softc *sc = device_get_softc(dev);
946 
947 	return (sc->hal.arswitch_vlan_setvgroup(sc, e));
948 }
949 
950 static int
951 arswitch_readphy(device_t dev, int phy, int reg)
952 {
953 	struct arswitch_softc *sc = device_get_softc(dev);
954 
955 	return (sc->hal.arswitch_phy_read(dev, phy, reg));
956 }
957 
958 static int
959 arswitch_writephy(device_t dev, int phy, int reg, int val)
960 {
961 	struct arswitch_softc *sc = device_get_softc(dev);
962 
963 	return (sc->hal.arswitch_phy_write(dev, phy, reg, val));
964 }
965 
966 static device_method_t arswitch_methods[] = {
967 	/* Device interface */
968 	DEVMETHOD(device_probe,		arswitch_probe),
969 	DEVMETHOD(device_attach,	arswitch_attach),
970 	DEVMETHOD(device_detach,	arswitch_detach),
971 
972 	/* bus interface */
973 	DEVMETHOD(bus_add_child,	device_add_child_ordered),
974 
975 	/* MII interface */
976 	DEVMETHOD(miibus_readreg,	arswitch_readphy),
977 	DEVMETHOD(miibus_writereg,	arswitch_writephy),
978 	DEVMETHOD(miibus_statchg,	arswitch_statchg),
979 
980 	/* MDIO interface */
981 	DEVMETHOD(mdio_readreg,		arswitch_readphy),
982 	DEVMETHOD(mdio_writereg,	arswitch_writephy),
983 
984 	/* etherswitch interface */
985 	DEVMETHOD(etherswitch_lock,	arswitch_lock),
986 	DEVMETHOD(etherswitch_unlock,	arswitch_unlock),
987 	DEVMETHOD(etherswitch_getinfo,	arswitch_getinfo),
988 	DEVMETHOD(etherswitch_readreg,	arswitch_readreg),
989 	DEVMETHOD(etherswitch_writereg,	arswitch_writereg),
990 	DEVMETHOD(etherswitch_readphyreg,	arswitch_readphy),
991 	DEVMETHOD(etherswitch_writephyreg,	arswitch_writephy),
992 	DEVMETHOD(etherswitch_getport,	arswitch_getport),
993 	DEVMETHOD(etherswitch_setport,	arswitch_setport),
994 	DEVMETHOD(etherswitch_getvgroup,	arswitch_getvgroup),
995 	DEVMETHOD(etherswitch_setvgroup,	arswitch_setvgroup),
996 	DEVMETHOD(etherswitch_getconf,	arswitch_getconf),
997 	DEVMETHOD(etherswitch_setconf,	arswitch_setconf),
998 
999 	DEVMETHOD_END
1000 };
1001 
1002 DEFINE_CLASS_0(arswitch, arswitch_driver, arswitch_methods,
1003     sizeof(struct arswitch_softc));
1004 static devclass_t arswitch_devclass;
1005 
1006 DRIVER_MODULE(arswitch, mdio, arswitch_driver, arswitch_devclass, 0, 0);
1007 DRIVER_MODULE(miibus, arswitch, miibus_driver, miibus_devclass, 0, 0);
1008 DRIVER_MODULE(mdio, arswitch, mdio_driver, mdio_devclass, 0, 0);
1009 DRIVER_MODULE(etherswitch, arswitch, etherswitch_driver, etherswitch_devclass, 0, 0);
1010 MODULE_VERSION(arswitch, 1);
1011 MODULE_DEPEND(arswitch, miibus, 1, 1, 1); /* XXX which versions? */
1012 MODULE_DEPEND(arswitch, etherswitch, 1, 1, 1); /* XXX which versions? */
1013