1 /*- 2 * Copyright (c) 2011-2012 Stefan Bethke. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <sys/param.h> 30 #include <sys/bus.h> 31 #include <sys/errno.h> 32 #include <sys/kernel.h> 33 #include <sys/module.h> 34 #include <sys/socket.h> 35 #include <sys/sockio.h> 36 #include <sys/sysctl.h> 37 #include <sys/systm.h> 38 39 #include <net/if.h> 40 #include <net/if_arp.h> 41 #include <net/ethernet.h> 42 #include <net/if_dl.h> 43 #include <net/if_media.h> 44 #include <net/if_types.h> 45 46 #include <machine/bus.h> 47 #include <dev/iicbus/iic.h> 48 #include <dev/iicbus/iiconf.h> 49 #include <dev/iicbus/iicbus.h> 50 #include <dev/mii/mii.h> 51 #include <dev/mii/miivar.h> 52 #include <dev/etherswitch/mdio.h> 53 54 #include <dev/etherswitch/etherswitch.h> 55 56 #include <dev/etherswitch/arswitch/arswitchreg.h> 57 #include <dev/etherswitch/arswitch/arswitchvar.h> 58 #include <dev/etherswitch/arswitch/arswitch_reg.h> 59 60 #include "mdio_if.h" 61 #include "miibus_if.h" 62 #include "etherswitch_if.h" 63 64 static inline void 65 arswitch_split_setpage(device_t dev, uint32_t addr, uint16_t *phy, 66 uint16_t *reg) 67 { 68 struct arswitch_softc *sc = device_get_softc(dev); 69 uint16_t page; 70 71 page = ((addr) >> 9) & 0xffff; 72 *phy = (((addr) >> 6) & 0x07) | 0x10; 73 *reg = ((addr) >> 1) & 0x1f; 74 75 /* 76 * The earlier code would only switch the page 77 * over if the page were different. Experiments have 78 * shown that this is unstable. 79 * 80 * Hence, the page is always set here. 81 * 82 * See PR kern/172968 83 */ 84 MDIO_WRITEREG(device_get_parent(dev), 0x18, 0, page); 85 sc->page = page; 86 } 87 88 /* 89 * Read half a register. Some of the registers define control bits, and 90 * the sequence of half-word accesses matters. The register addresses 91 * are word-even (mod 4). 92 */ 93 static inline int 94 arswitch_readreg16(device_t dev, int addr) 95 { 96 uint16_t phy, reg; 97 98 arswitch_split_setpage(dev, addr, &phy, ®); 99 return (MDIO_READREG(device_get_parent(dev), phy, reg)); 100 } 101 102 /* 103 * XXX NOTE: 104 * 105 * This may not work for AR7240 series embedded switches - 106 * the per-PHY register space doesn't seem to be exposed. 107 * 108 * In that instance, it may be required to speak via 109 * the internal switch PHY MDIO bus indirection. 110 */ 111 void 112 arswitch_writedbg(device_t dev, int phy, uint16_t dbg_addr, 113 uint16_t dbg_data) 114 { 115 (void) MDIO_WRITEREG(device_get_parent(dev), phy, 116 MII_ATH_DBG_ADDR, dbg_addr); 117 (void) MDIO_WRITEREG(device_get_parent(dev), phy, 118 MII_ATH_DBG_DATA, dbg_data); 119 } 120 121 /* 122 * Write half a register 123 */ 124 static inline int 125 arswitch_writereg16(device_t dev, int addr, int data) 126 { 127 uint16_t phy, reg; 128 129 arswitch_split_setpage(dev, addr, &phy, ®); 130 return (MDIO_WRITEREG(device_get_parent(dev), phy, reg, data)); 131 } 132 133 int 134 arswitch_readreg_lsb(device_t dev, int addr) 135 { 136 137 return (arswitch_readreg16(dev, addr)); 138 } 139 140 int 141 arswitch_readreg_msb(device_t dev, int addr) 142 { 143 144 return (arswitch_readreg16(dev, addr + 2) << 16); 145 } 146 147 int 148 arswitch_writereg_lsb(device_t dev, int addr, int data) 149 { 150 151 return (arswitch_writereg16(dev, addr, data & 0xffff)); 152 } 153 154 int 155 arswitch_writereg_msb(device_t dev, int addr, int data) 156 { 157 158 return (arswitch_writereg16(dev, addr + 2, (data >> 16) & 0xffff)); 159 } 160 161 int 162 arswitch_readreg(device_t dev, int addr) 163 { 164 165 return (arswitch_readreg_lsb(dev, addr) | 166 arswitch_readreg_msb(dev, addr)); 167 } 168 169 int 170 arswitch_writereg(device_t dev, int addr, int value) 171 { 172 173 /* XXX Check the first write too? */ 174 arswitch_writereg_lsb(dev, addr, value); 175 return (arswitch_writereg_msb(dev, addr, value)); 176 } 177 178 int 179 arswitch_modifyreg(device_t dev, int addr, int mask, int set) 180 { 181 int value; 182 183 value = arswitch_readreg(dev, addr); 184 value &= ~mask; 185 value |= set; 186 return (arswitch_writereg(dev, addr, value)); 187 } 188