1 /*-
2  * Copyright (c) 2016 Stanislav Galabov.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 #ifndef	__MTKSWITCH_RT3050_H__
28 #define	__MTKSWITCH_RT3050_H__
29 
30 #define	MTKSWITCH_PVID(p)	((((p) >> 1) * 4) + 0x40)
31 #define		PVID_OFF(p)	(((p) & 1) ? 12 : 0)
32 #define		PVID_MASK	0xfff
33 
34 #define	MTKSWITCH_VLANI(v)	((((v) >> 1) * 4) + 0x50)
35 #define		VLANI_OFF(v)	(((v) & 1) ? 12 : 0)
36 #define		VLANI_MASK	0xfff
37 
38 #define MTKSWITCH_VMSC(x)	((((x) >> 2) * 4) + 0x70)
39 #define		VMSC_OFF(x)	((x & 3) * 8)
40 #define		VMSC_MASK	0xff
41 
42 #define	MTKSWITCH_POA		0x0080
43 #define		POA_PRT_DPX(x)	((1<<9)<<(x))
44 #define		POA_FE_SPEED(x) ((1<<0)<<(x))
45 #define		POA_GE_SPEED(v, x)	((((v)>>5)>>(((x)-5)*2)) & 0x3)
46 #define		POA_FE_XFC(x)	((1<<16)<<(x))
47 #define		POA_GE_XFC(v, x)	((((v)>>21)>>(((x)-5)*2)) & 0x3)
48 #define		POA_PRT_LINK(x)	((1<<25)<<(x))
49 #define		POA_GE_XFC_TX_MSK	0x2
50 #define		POA_GE_XFC_RX_MSK	0x1
51 #define		POA_GE_SPEED_10		0x0
52 #define		POA_GE_SPEED_100	0x1
53 #define		POA_GE_SPEED_1000	0x2
54 
55 #define	MTKSWITCH_FPA		0x0084
56 #define		FPA_ALL_AUTO	0x00000000
57 
58 #define	MTKSWITCH_POC2		0x0098
59 #define		POC2_UNTAG_PORT(x)	(1 << (x))
60 #define		POC2_UNTAG_VLAN		(1 << 15)
61 
62 #define	MTKSWITCH_STRT		0x00a0
63 #define		STRT_RESET	0xffffffff
64 
65 #define	MTKSWITCH_PCR0		0x00c0
66 #define		PCR0_WRITE	(1<<13)
67 #define		PCR0_READ	(1<<14)
68 #define		PCR0_ACTIVE	(PCR0_WRITE | PCR0_READ)
69 #define		PCR0_REG(x)	(((x) & 0x1f) << 8)
70 #define		PCR0_PHY(x)	((x) & 0x1f)
71 #define		PCR0_DATA(x)	(((x) & 0xffff) << 16)
72 
73 #define	MTKSWITCH_PCR1		0x00c4
74 #define		PCR1_DATA_OFF	16
75 #define		PCR1_DATA_MASK	0xffff
76 
77 #define	MTKSWITCH_SGC2		0x00e4
78 #define		SGC2_DOUBLE_TAG_PORT(x)	(1 << (x))
79 
80 #define	MTKSWITCH_VUB(x)	((((x) >> 2) * 4) + 0x100)
81 #define		VUB_OFF(x)	((x & 3) * 7)
82 #define		VUB_MASK	0x7f
83 
84 #define	MTKSWITCH_PORT_IS_100M(x)	((x) < 5)
85 
86 #endif	/* __MTKSWITCH_RT3050_H__ */
87