xref: /freebsd/sys/dev/fxp/rcvbundl.h (revision 315ee00f)
1 /*-
2 SPDX-License-Identifier: BSD-3-Clause
3 
4 Copyright (c) 1999-2001, Intel Corporation
5 
6 All rights reserved.
7 
8 Redistribution and use in source and binary forms, with or without
9 modification, are permitted provided that the following conditions are met:
10 
11  1. Redistributions of source code must retain the above copyright notice,
12     this list of conditions and the following disclaimer.
13 
14  2. Redistributions in binary form must reproduce the above copyright notice,
15     this list of conditions and the following disclaimer in the documentation
16     and/or other materials provided with the distribution.
17 
18  3. Neither the name of Intel Corporation nor the names of its contributors
19     may be used to endorse or promote products derived from this software
20     without specific prior written permission.
21 
22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 DISCLAIMED. IN NO EVENT SHALL CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
28 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
29 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
30 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
31 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33 /*
34  */
35 /*
36 rcvbundl.h
37 
38 Author:  Patrick J Luhmann (PJL)
39 Date:    05/30/2000
40 Version: 3.28
41 
42 This file contains the loadable micro code arrays to implement receive bundling on the
43 D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step,
44 D102 B-step with TCO work around, D102 C-step and D102 E-step.
45 
46 Each controller has its own specific micro code array.  The array for one controller
47 is totally incompatible with any other controller, and if used will most likely
48 cause the controller to lock up and stop responding to the driver.  Each micro
49 code array has its own parameter offsets (described below), and they each have
50 their own version number (which should not be confused with the version of the
51 rcvbundl.h file given above).
52 
53 */
54 
55 
56 
57 /*************************************************************************
58 *  CPUSaver parameters
59 *
60 *  All CPUSaver parameters are 16-bit literals that are part of a
61 *  "move immediate value" instruction.  By changing the value of
62 *  the literal in the instruction before the code is loaded, the
63 *  driver can change algorithm.
64 *
65 *  CPUSAVER_DWORD - This is the location of the instruction that loads
66 *    the dead-man timer with its initial value.  By writing a 16-bit
67 *    value to the low word of this instruction, the driver can change
68 *    the timer value.  The current default is either x600 or x800;
69 *    experiments show that the value probably should stay within the
70 *    range of x200 - x1000.
71 *
72 *  CPUSAVER_BUNDLE_MAX_DWORD - This is the location of the instruction
73 *    that sets the maximum number of frames that will be bundled.  In
74 *    some situations, such as the TCP windowing algorithm, it may be
75 *    better to limit the growth of the bundle size than let it go as
76 *    high as it can, because that could cause too much added latency.
77 *    The default is six, because this is the number of packets in the
78 *    default TCP window size.  A value of 1 would make CPUSaver indicate
79 *    an interrupt for every frame received.  If you do not want to put
80 *    a limit on the bundle size, set this value to xFFFF.
81 *
82 *  CPUSAVER_MIN_SIZE_DWORD - This is the location of the instruction
83 *    that contains a bit-mask describing the minimum size frame that
84 *    will be bundled.  The default masks the lower 7 bits, which means
85 *    that any frame less than 128 bytes in length will not be bundled,
86 *    but will instead immediately generate an interrupt.  This does
87 *    not affect the current bundle in any way.  Any frame that is 128
88 *    bytes or large will be bundled normally.  This feature is meant
89 *    to provide immediate indication of ACK frames in a TCP environment.
90 *    Customers were seeing poor performance when a machine with CPUSaver
91 *    enabled was sending but not receiving.  The delay introduced when
92 *    the ACKs were received was enough to reduce total throughput, because
93 *    the sender would sit idle until the ACK was finally seen.
94 *
95 *    The current default is 0xFF80, which masks out the lower 7 bits.
96 *    This means that any frame which is x7F (127) bytes or smaller
97 *    will cause an immediate interrupt.  Because this value must be a
98 *    bit mask, there are only a few valid values that can be used.  To
99 *    turn this feature off, the driver can write the value xFFFF to the
100 *    lower word of this instruction (in the same way that the other
101 *    parameters are used).  Likewise, a value of 0xF800 (2047) would
102 *    cause an interrupt to be generated for every frame, because all
103 *    standard Ethernet frames are <= 2047 bytes in length.
104 *************************************************************************/
105 
106 
107 
108 /********************************************************/
109 /*  CPUSaver micro code for the D101A                   */
110 /********************************************************/
111 
112 /*  Version 2.0  */
113 
114 /*  This value is the same for both A and B step of 558.  */
115 #define D101_CPUSAVER_DWORD         72
116 
117 
118 #define     D101_A_RCVBUNDLE_UCODE \
119 {\
120 0x03B301BB, \
121 0x0046FFFF, \
122 0xFFFFFFFF, \
123 0x051DFFFF, \
124 0xFFFFFFFF, \
125 0xFFFFFFFF, \
126 0x000C0001, \
127 0x00101212, \
128 0x000C0008, \
129 0x003801BC, \
130 0x00000000, \
131 0x00124818, \
132 0x000C1000, \
133 0x00220809, \
134 0x00010200, \
135 0x00124818, \
136 0x000CFFFC, \
137 0x003803B5, \
138 0x00000000, \
139 0x00000000, \
140 0x00000000, \
141 0x00000000, \
142 0x0010009C, \
143 0x0024B81D, \
144 0x00130836, \
145 0x000C0001, \
146 0x0026081C, \
147 0x0020C81B, \
148 0x00130824, \
149 0x00222819, \
150 0x00101213, \
151 0x00041000, \
152 0x003A03B3, \
153 0x00010200, \
154 0x00101B13, \
155 0x00238081, \
156 0x00213049, \
157 0x0038003B, \
158 0x00000000, \
159 0x00000000, \
160 0x00000000, \
161 0x00000000, \
162 0x00000000, \
163 0x00000000, \
164 0x00000000, \
165 0x00000000, \
166 0x00000000, \
167 0x00000000, \
168 0x00000000, \
169 0x00000000, \
170 0x00000000, \
171 0x00000000, \
172 0x00000000, \
173 0x00000000, \
174 0x0010009C, \
175 0x0024B83E, \
176 0x00130826, \
177 0x000C0001, \
178 0x0026083B, \
179 0x00010200, \
180 0x00134824, \
181 0x000C0001, \
182 0x00101213, \
183 0x00041000, \
184 0x0038051E, \
185 0x00101313, \
186 0x00010400, \
187 0x00380521, \
188 0x00050600, \
189 0x00100824, \
190 0x00101310, \
191 0x00041000, \
192 0x00080600, \
193 0x00101B10, \
194 0x0038051E, \
195 0x00000000, \
196 0x00000000, \
197 0x00000000, \
198 0x00000000, \
199 0x00000000, \
200 0x00000000, \
201 0x00000000, \
202 0x00000000, \
203 0x00000000, \
204 0x00000000, \
205 0x00000000, \
206 0x00000000, \
207 0x00000000, \
208 0x00000000, \
209 0x00000000, \
210 0x00000000, \
211 0x00000000, \
212 0x00000000, \
213 0x00000000, \
214 0x00000000, \
215 0x00000000, \
216 0x00000000, \
217 0x00000000, \
218 0x00000000, \
219 0x00000000, \
220 0x00000000, \
221 0x00000000, \
222 }
223 
224 
225 /********************************************************/
226 /*  CPUSaver micro code for the D101B                   */
227 /********************************************************/
228 
229 /*  Version 2.0  */
230 
231 #define     D101_B0_RCVBUNDLE_UCODE \
232 {\
233 0x03B401BC, \
234 0x0047FFFF, \
235 0xFFFFFFFF, \
236 0x051EFFFF, \
237 0xFFFFFFFF, \
238 0xFFFFFFFF, \
239 0x000C0001, \
240 0x00101B92, \
241 0x000C0008, \
242 0x003801BD, \
243 0x00000000, \
244 0x00124818, \
245 0x000C1000, \
246 0x00220809, \
247 0x00010200, \
248 0x00124818, \
249 0x000CFFFC, \
250 0x003803B6, \
251 0x00000000, \
252 0x00000000, \
253 0x00000000, \
254 0x00000000, \
255 0x0010009C, \
256 0x0024B81D, \
257 0x0013082F, \
258 0x000C0001, \
259 0x0026081C, \
260 0x0020C81B, \
261 0x00130837, \
262 0x00222819, \
263 0x00101B93, \
264 0x00041000, \
265 0x003A03B4, \
266 0x00010200, \
267 0x00101793, \
268 0x00238082, \
269 0x0021304A, \
270 0x0038003C, \
271 0x00000000, \
272 0x00000000, \
273 0x00000000, \
274 0x00000000, \
275 0x00000000, \
276 0x00000000, \
277 0x00000000, \
278 0x00000000, \
279 0x00000000, \
280 0x00000000, \
281 0x00000000, \
282 0x00000000, \
283 0x00000000, \
284 0x00000000, \
285 0x00000000, \
286 0x00000000, \
287 0x0010009C, \
288 0x0024B83E, \
289 0x00130826, \
290 0x000C0001, \
291 0x0026083B, \
292 0x00010200, \
293 0x00134837, \
294 0x000C0001, \
295 0x00101B93, \
296 0x00041000, \
297 0x0038051F, \
298 0x00101313, \
299 0x00010400, \
300 0x00380522, \
301 0x00050600, \
302 0x00100837, \
303 0x00101310, \
304 0x00041000, \
305 0x00080600, \
306 0x00101790, \
307 0x0038051F, \
308 0x00000000, \
309 0x00000000, \
310 0x00000000, \
311 0x00000000, \
312 0x00000000, \
313 0x00000000, \
314 0x00000000, \
315 0x00000000, \
316 0x00000000, \
317 0x00000000, \
318 0x00000000, \
319 0x00000000, \
320 0x00000000, \
321 0x00000000, \
322 0x00000000, \
323 0x00000000, \
324 0x00000000, \
325 0x00000000, \
326 0x00000000, \
327 0x00000000, \
328 0x00000000, \
329 0x00000000, \
330 0x00000000, \
331 0x00000000, \
332 0x00000000, \
333 0x00000000, \
334 0x00000000, \
335 }
336 
337 
338 /********************************************************/
339 /*  CPUSaver micro code for the D101M (B-step only)     */
340 /********************************************************/
341 
342 /*  Version 2.10  */
343 
344 /*  Parameter values for the D101M B-step  */
345 #define D101M_CPUSAVER_DWORD                78
346 #define D101M_CPUSAVER_BUNDLE_MAX_DWORD     65
347 #define D101M_CPUSAVER_MIN_SIZE_DWORD       126
348 
349 
350 #define D101M_B_RCVBUNDLE_UCODE \
351 {\
352 0x00550215, \
353 0xFFFF0437, \
354 0xFFFFFFFF, \
355 0x06A70789, \
356 0xFFFFFFFF, \
357 0x0558FFFF, \
358 0x000C0001, \
359 0x00101312, \
360 0x000C0008, \
361 0x00380216, \
362 0x0010009C, \
363 0x00204056, \
364 0x002380CC, \
365 0x00380056, \
366 0x0010009C, \
367 0x00244C0B, \
368 0x00000800, \
369 0x00124818, \
370 0x00380438, \
371 0x00000000, \
372 0x00140000, \
373 0x00380555, \
374 0x00308000, \
375 0x00100662, \
376 0x00100561, \
377 0x000E0408, \
378 0x00134861, \
379 0x000C0002, \
380 0x00103093, \
381 0x00308000, \
382 0x00100624, \
383 0x00100561, \
384 0x000E0408, \
385 0x00100861, \
386 0x000C007E, \
387 0x00222C21, \
388 0x000C0002, \
389 0x00103093, \
390 0x00380C7A, \
391 0x00080000, \
392 0x00103090, \
393 0x00380C7A, \
394 0x00000000, \
395 0x00000000, \
396 0x00000000, \
397 0x00000000, \
398 0x0010009C, \
399 0x00244C2D, \
400 0x00010004, \
401 0x00041000, \
402 0x003A0437, \
403 0x00044010, \
404 0x0038078A, \
405 0x00000000, \
406 0x00100099, \
407 0x00206C7A, \
408 0x0010009C, \
409 0x00244C48, \
410 0x00130824, \
411 0x000C0001, \
412 0x00101213, \
413 0x00260C75, \
414 0x00041000, \
415 0x00010004, \
416 0x00130826, \
417 0x000C0006, \
418 0x002206A8, \
419 0x0013C926, \
420 0x00101313, \
421 0x003806A8, \
422 0x00000000, \
423 0x00000000, \
424 0x00000000, \
425 0x00000000, \
426 0x00000000, \
427 0x00000000, \
428 0x00000000, \
429 0x00000000, \
430 0x00080600, \
431 0x00101B10, \
432 0x00050004, \
433 0x00100826, \
434 0x00101210, \
435 0x00380C34, \
436 0x00000000, \
437 0x00000000, \
438 0x0021155B, \
439 0x00100099, \
440 0x00206559, \
441 0x0010009C, \
442 0x00244559, \
443 0x00130836, \
444 0x000C0000, \
445 0x00220C62, \
446 0x000C0001, \
447 0x00101B13, \
448 0x00229C0E, \
449 0x00210C0E, \
450 0x00226C0E, \
451 0x00216C0E, \
452 0x0022FC0E, \
453 0x00215C0E, \
454 0x00214C0E, \
455 0x00380555, \
456 0x00010004, \
457 0x00041000, \
458 0x00278C67, \
459 0x00040800, \
460 0x00018100, \
461 0x003A0437, \
462 0x00130826, \
463 0x000C0001, \
464 0x00220559, \
465 0x00101313, \
466 0x00380559, \
467 0x00000000, \
468 0x00000000, \
469 0x00000000, \
470 0x00000000, \
471 0x00000000, \
472 0x00000000, \
473 0x00000000, \
474 0x00000000, \
475 0x00130831, \
476 0x0010090B, \
477 0x00124813, \
478 0x000CFF80, \
479 0x002606AB, \
480 0x00041000, \
481 0x003806A8, \
482 0x00000000, \
483 0x00000000, \
484 0x00000000, \
485 0x00000000, \
486 }
487 
488 
489 /********************************************************/
490 /*  CPUSaver micro code for the D101S                   */
491 /********************************************************/
492 
493 /*  Version 1.20  */
494 
495 /*  Parameter values for the D101S  */
496 #define D101S_CPUSAVER_DWORD                78
497 #define D101S_CPUSAVER_BUNDLE_MAX_DWORD     67
498 #define D101S_CPUSAVER_MIN_SIZE_DWORD       129
499 
500 
501 #define D101S_RCVBUNDLE_UCODE \
502 {\
503 0x00550242, \
504 0xFFFF047E, \
505 0xFFFFFFFF, \
506 0x06FF0818, \
507 0xFFFFFFFF, \
508 0x05A6FFFF, \
509 0x000C0001, \
510 0x00101312, \
511 0x000C0008, \
512 0x00380243, \
513 0x0010009C, \
514 0x00204056, \
515 0x002380D0, \
516 0x00380056, \
517 0x0010009C, \
518 0x00244F8B, \
519 0x00000800, \
520 0x00124818, \
521 0x0038047F, \
522 0x00000000, \
523 0x00140000, \
524 0x003805A3, \
525 0x00308000, \
526 0x00100610, \
527 0x00100561, \
528 0x000E0408, \
529 0x00134861, \
530 0x000C0002, \
531 0x00103093, \
532 0x00308000, \
533 0x00100624, \
534 0x00100561, \
535 0x000E0408, \
536 0x00100861, \
537 0x000C007E, \
538 0x00222FA1, \
539 0x000C0002, \
540 0x00103093, \
541 0x00380F90, \
542 0x00080000, \
543 0x00103090, \
544 0x00380F90, \
545 0x00000000, \
546 0x00000000, \
547 0x00000000, \
548 0x00000000, \
549 0x0010009C, \
550 0x00244FAD, \
551 0x00010004, \
552 0x00041000, \
553 0x003A047E, \
554 0x00044010, \
555 0x00380819, \
556 0x00000000, \
557 0x00100099, \
558 0x00206FFD, \
559 0x0010009A, \
560 0x0020AFFD, \
561 0x0010009C, \
562 0x00244FC8, \
563 0x00130824, \
564 0x000C0001, \
565 0x00101213, \
566 0x00260FF8, \
567 0x00041000, \
568 0x00010004, \
569 0x00130826, \
570 0x000C0006, \
571 0x00220700, \
572 0x0013C926, \
573 0x00101313, \
574 0x00380700, \
575 0x00000000, \
576 0x00000000, \
577 0x00000000, \
578 0x00000000, \
579 0x00000000, \
580 0x00000000, \
581 0x00080600, \
582 0x00101B10, \
583 0x00050004, \
584 0x00100826, \
585 0x00101210, \
586 0x00380FB6, \
587 0x00000000, \
588 0x00000000, \
589 0x002115A9, \
590 0x00100099, \
591 0x002065A7, \
592 0x0010009A, \
593 0x0020A5A7, \
594 0x0010009C, \
595 0x002445A7, \
596 0x00130836, \
597 0x000C0000, \
598 0x00220FE4, \
599 0x000C0001, \
600 0x00101B13, \
601 0x00229F8E, \
602 0x00210F8E, \
603 0x00226F8E, \
604 0x00216F8E, \
605 0x0022FF8E, \
606 0x00215F8E, \
607 0x00214F8E, \
608 0x003805A3, \
609 0x00010004, \
610 0x00041000, \
611 0x00278FE9, \
612 0x00040800, \
613 0x00018100, \
614 0x003A047E, \
615 0x00130826, \
616 0x000C0001, \
617 0x002205A7, \
618 0x00101313, \
619 0x003805A7, \
620 0x00000000, \
621 0x00000000, \
622 0x00000000, \
623 0x00000000, \
624 0x00000000, \
625 0x00000000, \
626 0x00000000, \
627 0x00000000, \
628 0x00000000, \
629 0x00130831, \
630 0x0010090B, \
631 0x00124813, \
632 0x000CFF80, \
633 0x00260703, \
634 0x00041000, \
635 0x00380700, \
636 0x00000000, \
637 }
638 
639 
640 /********************************************************/
641 /*  CPUSaver micro code for the D102 B-step             */
642 /********************************************************/
643 
644 /*  Version 2.0  */
645 
646 /*
647     This version of CPUSaver is different from all others in
648     a different way.  It combines the CPUSaver algorithm with
649     fixes for bugs in the B-step hardware (specifically, bugs
650     with Inline Receive).
651     Thus, when CPUSaver is disabled, this micro code image will
652     still need to be loaded.  Before this happens, the hit addresses
653     for the CPUSaver algorithm must be set to 0x1FFFF.  The hit
654     addresses for CPUSaver are (starting with 0, and remember that
655 
656 */
657 
658 /*  Parameter values for the D102 B-step  */
659 #define D102_B_CPUSAVER_DWORD                91
660 #define D102_B_CPUSAVER_BUNDLE_MAX_DWORD     115
661 #define D102_B_CPUSAVER_MIN_SIZE_DWORD       70
662 
663 
664 #define     D102_B_RCVBUNDLE_UCODE \
665 {\
666 0x006F0276, \
667 0x02BF0E93, \
668 0x1FFF0ED9, \
669 0x0D2508FA, \
670 0x04D21FFF, \
671 0x0EA10892, \
672 0x00300001, \
673 0x0140D871, \
674 0x00300008, \
675 0x00E00277, \
676 0x01406C57, \
677 0x00816073, \
678 0x008700FA, \
679 0x00E00070, \
680 0x00E00E94, \
681 0x00200004, \
682 0x01410000, \
683 0x014B6F6F, \
684 0x0030FFFF, \
685 0x01486F72, \
686 0x00E81F9B, \
687 0x00E00EA3, \
688 0x003C0040, \
689 0x00380920, \
690 0x00C02000, \
691 0x0150ED38, \
692 0x0150EE39, \
693 0x0150EF3A, \
694 0x003C0040, \
695 0x01506F0D, \
696 0x01600E72, \
697 0x00380AE0, \
698 0x00E002C0, \
699 0x00300001, \
700 0x014C0000, \
701 0x008404DC, \
702 0x014C6F72, \
703 0x00E01F9D, \
704 0x01406C51, \
705 0x0080DFC2, \
706 0x01406C52, \
707 0x00815FC2, \
708 0x01406C57, \
709 0x00917FD5, \
710 0x00E01FE6, \
711 0x00000000, \
712 0x01406C57, \
713 0x00919FAD, \
714 0x00038800, \
715 0x00300000, \
716 0x00E81FF2, \
717 0x014D6FC4, \
718 0x00E008FB, \
719 0x00000000, \
720 0x00822D30, \
721 0x01406C51, \
722 0x0080CD26, \
723 0x01406C52, \
724 0x00814D26, \
725 0x01406C57, \
726 0x00916D26, \
727 0x014C6FD7, \
728 0x00300000, \
729 0x00841FDB, \
730 0x00300001, \
731 0x0140D772, \
732 0x00E012B3, \
733 0x014C6F91, \
734 0x0150710B, \
735 0x01496F72, \
736 0x0030FF80, \
737 0x00940EDD, \
738 0x00102000, \
739 0x00E00EDA, \
740 0x01406C57, \
741 0x00917FFD, \
742 0x00001000, \
743 0x00E01FFD, \
744 0x00138800, \
745 0x00300001, \
746 0x00E81FF2, \
747 0x00202500, \
748 0x00E81F9B, \
749 0x01600EC5, \
750 0x00E00893, \
751 0x00000000, \
752 0x01406CD5, \
753 0x0091EEA3, \
754 0x00904EA3, \
755 0x00901F89, \
756 0x00E00EA3, \
757 0x00200600, \
758 0x0140D76F, \
759 0x00138400, \
760 0x01406FD8, \
761 0x0140D96F, \
762 0x00E01FE6, \
763 0x00038400, \
764 0x00102000, \
765 0x00971FE0, \
766 0x00101000, \
767 0x00050200, \
768 0x00E804D2, \
769 0x014C6FD8, \
770 0x00300001, \
771 0x00840D26, \
772 0x0140D872, \
773 0x00E00D26, \
774 0x014C6FD9, \
775 0x00300001, \
776 0x0140D972, \
777 0x00941FBD, \
778 0x00102000, \
779 0x00038400, \
780 0x014C6FD8, \
781 0x00300006, \
782 0x00840EDA, \
783 0x014F71D8, \
784 0x0140D872, \
785 0x00E00EDA, \
786 0x00340020, \
787 0x014C6FED, \
788 0x01603472, \
789 0x016035EE, \
790 0x016036EF, \
791 0x00300004, \
792 0x01611C71, \
793 0x00300014, \
794 0x00200A00, \
795 0x00E810B9, \
796 0x00600000, \
797 0x01496F50, \
798 0x00E004D3, \
799 0x00000000, \
800 }
801 
802 
803 
804 
805 /********************************************************/
806 /*  TCO micro code for the D102 B-step             */
807 /********************************************************/
808 
809 /*  Version 2.0  */
810 
811 /*
812     This version is a fix to TCO bug. This version can be loaded instead
813     the CPUSaver version by modifing the registry key "LoadTcoUCodeInsteadOfCpuSaver"
814 
815 */
816 
817 
818 #define     D102_B_TCO_UCODE \
819 {\
820 0x1FFF0ED3, \
821 0x02BF0E93, \
822 0x1FFF1FFF, \
823 0x1FFF08FA, \
824 0x1FFF1FFF, \
825 0x0EA10892, \
826 0x00906ED8, \
827 0x01406C55, \
828 0x00E00ED4, \
829 0x00000000, \
830 0x00000000, \
831 0x00000000, \
832 0x00000000, \
833 0x00000000, \
834 0x00E00E94, \
835 0x00200004, \
836 0x01410000, \
837 0x014B6F6F, \
838 0x0030FFFF, \
839 0x01486F72, \
840 0x00E81F9B, \
841 0x00E00EA3, \
842 0x003C0040, \
843 0x00380920, \
844 0x00C02000, \
845 0x0150ED38, \
846 0x0150EE39, \
847 0x0150EF3A, \
848 0x003C0040, \
849 0x01506F0D, \
850 0x01600E72, \
851 0x00380AE0, \
852 0x00E002C0, \
853 0x00300001, \
854 0x014C0000, \
855 0x008404DC, \
856 0x014C6F72, \
857 0x00E01F9D, \
858 0x00000000, \
859 0x00000000, \
860 0x00000000, \
861 0x00000000, \
862 0x00000000, \
863 0x00000000, \
864 0x00000000, \
865 0x00000000, \
866 0x01406C57, \
867 0x00919FAD, \
868 0x00038800, \
869 0x00300000, \
870 0x00E81FD5, \
871 0x014D6FC4, \
872 0x00E008FB, \
873 0x00000000, \
874 0x00000000, \
875 0x00000000, \
876 0x00000000, \
877 0x00000000, \
878 0x00000000, \
879 0x00000000, \
880 0x00000000, \
881 0x00000000, \
882 0x00000000, \
883 0x00000000, \
884 0x00000000, \
885 0x00000000, \
886 0x00000000, \
887 0x00000000, \
888 0x00000000, \
889 0x00000000, \
890 0x00000000, \
891 0x00000000, \
892 0x00000000, \
893 0x00000000, \
894 0x00000000, \
895 0x00000000, \
896 0x00000000, \
897 0x00000000, \
898 0x00138800, \
899 0x00300001, \
900 0x00E81FD5, \
901 0x00202500, \
902 0x00E81F9B, \
903 0x01600EC5, \
904 0x00E00893, \
905 0x00000000, \
906 0x01406CD5, \
907 0x0091EEA3, \
908 0x00904EA3, \
909 0x00901F89, \
910 0x00E00EA3, \
911 0x00340020, \
912 0x014C6FED, \
913 0x01603472, \
914 0x016035EE, \
915 0x016036EF, \
916 0x00300004, \
917 0x01611C71, \
918 0x00300014, \
919 0x00200A00, \
920 0x00E810B9, \
921 0x00600000, \
922 0x00000000, \
923 0x00000000, \
924 0x00000000, \
925 0x00000000, \
926 0x00000000, \
927 0x00000000, \
928 0x00000000, \
929 0x00000000, \
930 0x00000000, \
931 0x00000000, \
932 0x00000000, \
933 0x00000000, \
934 0x00000000, \
935 0x00000000, \
936 0x00000000, \
937 0x00000000, \
938 0x00000000, \
939 0x00000000, \
940 0x00000000, \
941 0x00000000, \
942 0x00000000, \
943 0x00000000, \
944 0x00000000, \
945 0x00000000, \
946 0x00000000, \
947 0x00000000, \
948 0x00000000, \
949 0x00000000, \
950 0x00000000, \
951 0x00000000, \
952 0x00000000, \
953 0x00000000, \
954 }
955 
956 
957 
958 /********************************************************/
959 /*  Micro code for the D102 C-step                      */
960 /********************************************************/
961 
962 /*  Parameter values for the D102 C-step  */
963 #define D102_C_CPUSAVER_DWORD                46
964 #define D102_C_CPUSAVER_BUNDLE_MAX_DWORD     54
965 #define D102_C_CPUSAVER_MIN_SIZE_DWORD      133 /* not implemented */
966 
967 
968 
969 
970 
971 #if 0
972 // this uCode include the CPU Saver and the TCO work around
973 //for IP fregments.
974 #endif
975 #define     D102_C_RCVBUNDLE_UCODE \
976 { \
977 0x00700279, \
978 0x0E6104E2, \
979 0x02BF0CAE, \
980 0x1519150C, \
981 0x1FFF0E5B, \
982 0x1FFF1FFF, \
983 0x00E014D8, \
984 0x00000000, \
985 0x00000000, \
986 0x00000000, \
987 0x00E014DC, \
988 0x00000000, \
989 0x00000000, \
990 0x00000000, \
991 0x00E014F4, \
992 0x00000000, \
993 0x00000000, \
994 0x00000000, \
995 0x00000000, \
996 0x00000000, \
997 0x00000000, \
998 0x00000000, \
999 0x00E014E0, \
1000 0x00000000, \
1001 0x00000000, \
1002 0x00000000, \
1003 0x00000000, \
1004 0x00000000, \
1005 0x00000000, \
1006 0x00000000, \
1007 0x00000000, \
1008 0x00000000, \
1009 0x00000000, \
1010 0x00000000, \
1011 0x00000000, \
1012 0x00000000, \
1013 0x00000000, \
1014 0x00000000, \
1015 0x00E014E7, \
1016 0x00000000, \
1017 0x00000000, \
1018 0x00000000, \
1019 0x00141000, \
1020 0x015D6F0D, \
1021 0x00E002C0, \
1022 0x00000000, \
1023 0x00200600, \
1024 0x00E0150D, \
1025 0x00000000, \
1026 0x00000000, \
1027 0x00000000, \
1028 0x00000000, \
1029 0x00000000, \
1030 0x00000000, \
1031 0x00300006, \
1032 0x00E0151A, \
1033 0x00000000, \
1034 0x00000000, \
1035 0x00000000, \
1036 0x00000000, \
1037 0x00000000, \
1038 0x00000000, \
1039 0x00000000, \
1040 0x00000000, \
1041 0x00000000, \
1042 0x00000000, \
1043 0x00000000, \
1044 0x00000000, \
1045 0x00000000, \
1046 0x00000000, \
1047 0x00906E65, \
1048 0x00800E60, \
1049 0x00E00E5D, \
1050 0x00000000, \
1051 0x00000000, \
1052 0x00000000, \
1053 0x00000000, \
1054 0x00000000, \
1055 0x00000000, \
1056 0x00000000, \
1057 0x00000000, \
1058 0x00000000, \
1059 0x00000000, \
1060 0x00000000, \
1061 0x00000000, \
1062 0x00000000, \
1063 0x00000000, \
1064 0x00000000, \
1065 0x00000000, \
1066 0x00000000, \
1067 0x00000000, \
1068 0x00000000, \
1069 0x00000000, \
1070 0x00000000, \
1071 0x00000000, \
1072 0x00000000, \
1073 0x00000000, \
1074 0x00000000, \
1075 0x00000000, \
1076 0x00000000, \
1077 0x00000000, \
1078 0x00000000, \
1079 0x00000000, \
1080 0x00000000, \
1081 0x00000000, \
1082 0x00000000, \
1083 0x00000000, \
1084 0x00000000, \
1085 0x00000000, \
1086 0x00000000, \
1087 0x00000000, \
1088 0x00000000, \
1089 0x00000000, \
1090 0x00000000, \
1091 0x00000000, \
1092 0x00000000, \
1093 0x00000000, \
1094 0x00000000, \
1095 0x00000000, \
1096 0x00000000, \
1097 0x00000000, \
1098 0x00000000, \
1099 0x00000000, \
1100 0x00000000, \
1101 0x00000000, \
1102 0x00000000, \
1103 0x00000000, \
1104 0x00000000, \
1105 0x00000000, \
1106 0x00000000, \
1107 0x00000000, \
1108 0x00000000, \
1109 0x00000000, \
1110 0x00000000, \
1111 }
1112 
1113 /********************************************************/
1114 /*  Micro code for the D102 E-step                      */
1115 /********************************************************/
1116 
1117 /*  Parameter values for the D102 E-step  */
1118 #define D102_E_CPUSAVER_DWORD			42
1119 #define D102_E_CPUSAVER_BUNDLE_MAX_DWORD	54
1120 #define D102_E_CPUSAVER_MIN_SIZE_DWORD		46
1121 
1122 #define     D102_E_RCVBUNDLE_UCODE \
1123 {\
1124 0x007D028F, \
1125 0x0E4204F9, \
1126 0x14ED0C85, \
1127 0x14FA14E9, \
1128 0x0EF70E36, \
1129 0x1FFF1FFF, \
1130 0x00E014B9, \
1131 0x00000000, \
1132 0x00000000, \
1133 0x00000000, \
1134 0x00E014BD, \
1135 0x00000000, \
1136 0x00000000, \
1137 0x00000000, \
1138 0x00E014D5, \
1139 0x00000000, \
1140 0x00000000, \
1141 0x00000000, \
1142 0x00000000, \
1143 0x00000000, \
1144 0x00000000, \
1145 0x00000000, \
1146 0x00E014C1, \
1147 0x00000000, \
1148 0x00000000, \
1149 0x00000000, \
1150 0x00000000, \
1151 0x00000000, \
1152 0x00000000, \
1153 0x00000000, \
1154 0x00000000, \
1155 0x00000000, \
1156 0x00000000, \
1157 0x00000000, \
1158 0x00000000, \
1159 0x00000000, \
1160 0x00000000, \
1161 0x00000000, \
1162 0x00E014C8, \
1163 0x00000000, \
1164 0x00000000, \
1165 0x00000000, \
1166 0x00200600, \
1167 0x00E014EE, \
1168 0x00000000, \
1169 0x00000000, \
1170 0x0030FF80, \
1171 0x00940E46, \
1172 0x00038200, \
1173 0x00102000, \
1174 0x00E00E43, \
1175 0x00000000, \
1176 0x00000000, \
1177 0x00000000, \
1178 0x00300006, \
1179 0x00E014FB, \
1180 0x00000000, \
1181 0x00000000, \
1182 0x00000000, \
1183 0x00000000, \
1184 0x00000000, \
1185 0x00000000, \
1186 0x00000000, \
1187 0x00000000, \
1188 0x00000000, \
1189 0x00000000, \
1190 0x00000000, \
1191 0x00000000, \
1192 0x00000000, \
1193 0x00000000, \
1194 0x00906E41, \
1195 0x00800E3C, \
1196 0x00E00E39, \
1197 0x00000000, \
1198 0x00906EFD, \
1199 0x00900EFD, \
1200 0x00E00EF8, \
1201 0x00000000, \
1202 0x00000000, \
1203 0x00000000, \
1204 0x00000000, \
1205 0x00000000, \
1206 0x00000000, \
1207 0x00000000, \
1208 0x00000000, \
1209 0x00000000, \
1210 0x00000000, \
1211 0x00000000, \
1212 0x00000000, \
1213 0x00000000, \
1214 0x00000000, \
1215 0x00000000, \
1216 0x00000000, \
1217 0x00000000, \
1218 0x00000000, \
1219 0x00000000, \
1220 0x00000000, \
1221 0x00000000, \
1222 0x00000000, \
1223 0x00000000, \
1224 0x00000000, \
1225 0x00000000, \
1226 0x00000000, \
1227 0x00000000, \
1228 0x00000000, \
1229 0x00000000, \
1230 0x00000000, \
1231 0x00000000, \
1232 0x00000000, \
1233 0x00000000, \
1234 0x00000000, \
1235 0x00000000, \
1236 0x00000000, \
1237 0x00000000, \
1238 0x00000000, \
1239 0x00000000, \
1240 0x00000000, \
1241 0x00000000, \
1242 0x00000000, \
1243 0x00000000, \
1244 0x00000000, \
1245 0x00000000, \
1246 0x00000000, \
1247 0x00000000, \
1248 0x00000000, \
1249 0x00000000, \
1250 0x00000000, \
1251 0x00000000, \
1252 0x00000000, \
1253 0x00000000, \
1254 0x00000000, \
1255 0x00000000, \
1256 0x00000000, \
1257 0x00000000, \
1258 }
1259