1 /*- 2 * Copyright (C) 2001 Eduardo Horvath. 3 * Copyright (c) 2007 Marius Strobl <marius@FreeBSD.org> 4 * All rights reserved. 5 * 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 /* 35 * PCI bindings for Apple GMAC, Sun ERI and Sun GEM Ethernet controllers 36 */ 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/bus.h> 41 #include <sys/kernel.h> 42 #include <sys/lock.h> 43 #include <sys/malloc.h> 44 #include <sys/module.h> 45 #include <sys/mutex.h> 46 #include <sys/resource.h> 47 #include <sys/rman.h> 48 #include <sys/socket.h> 49 50 #include <net/ethernet.h> 51 #include <net/if.h> 52 53 #include <machine/bus.h> 54 #if defined(__powerpc__) || defined(__sparc64__) 55 #include <dev/ofw/openfirm.h> 56 #include <machine/ofw_machdep.h> 57 #endif 58 #include <machine/resource.h> 59 60 #include <dev/gem/if_gemreg.h> 61 #include <dev/gem/if_gemvar.h> 62 63 #include <dev/pci/pcireg.h> 64 #include <dev/pci/pcivar.h> 65 66 #include "miibus_if.h" 67 68 static int gem_pci_attach(device_t dev); 69 static int gem_pci_detach(device_t dev); 70 static int gem_pci_probe(device_t dev); 71 static int gem_pci_resume(device_t dev); 72 static int gem_pci_suspend(device_t dev); 73 74 static device_method_t gem_pci_methods[] = { 75 /* Device interface */ 76 DEVMETHOD(device_probe, gem_pci_probe), 77 DEVMETHOD(device_attach, gem_pci_attach), 78 DEVMETHOD(device_detach, gem_pci_detach), 79 DEVMETHOD(device_suspend, gem_pci_suspend), 80 DEVMETHOD(device_resume, gem_pci_resume), 81 /* Use the suspend handler here, it is all that is required. */ 82 DEVMETHOD(device_shutdown, gem_pci_suspend), 83 84 /* bus interface */ 85 DEVMETHOD(bus_print_child, bus_generic_print_child), 86 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 87 88 /* MII interface */ 89 DEVMETHOD(miibus_readreg, gem_mii_readreg), 90 DEVMETHOD(miibus_writereg, gem_mii_writereg), 91 DEVMETHOD(miibus_statchg, gem_mii_statchg), 92 93 { 0, 0 } 94 }; 95 96 static driver_t gem_pci_driver = { 97 "gem", 98 gem_pci_methods, 99 sizeof(struct gem_softc) 100 }; 101 102 DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0); 103 MODULE_DEPEND(gem, pci, 1, 1, 1); 104 MODULE_DEPEND(gem, ether, 1, 1, 1); 105 106 static const struct gem_pci_dev { 107 uint32_t gpd_devid; 108 int gpd_variant; 109 const char *gpd_desc; 110 } gem_pci_devlist[] = { 111 { 0x1101108e, GEM_SUN_ERI, "Sun ERI 10/100 Ethernet" }, 112 { 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet" }, 113 { 0x0021106b, GEM_APPLE_GMAC, "Apple UniNorth GMAC Ethernet" }, 114 { 0x0024106b, GEM_APPLE_GMAC, "Apple Pangea GMAC Ethernet" }, 115 { 0x0032106b, GEM_APPLE_GMAC, "Apple UniNorth2 GMAC Ethernet" }, 116 { 0x004c106b, GEM_APPLE_K2_GMAC,"Apple K2 GMAC Ethernet" }, 117 { 0x0051106b, GEM_APPLE_GMAC, "Apple Shasta GMAC Ethernet" }, 118 { 0x006b106b, GEM_APPLE_GMAC, "Apple Intrepid 2 GMAC Ethernet" }, 119 { 0, 0, NULL } 120 }; 121 122 static int 123 gem_pci_probe(device_t dev) 124 { 125 int i; 126 127 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) { 128 if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) { 129 device_set_desc(dev, gem_pci_devlist[i].gpd_desc); 130 return (BUS_PROBE_DEFAULT); 131 } 132 } 133 134 return (ENXIO); 135 } 136 137 static struct resource_spec gem_pci_res_spec[] = { 138 { SYS_RES_IRQ, 0, RF_SHAREABLE | RF_ACTIVE }, /* GEM_RES_INTR */ 139 { SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE }, /* GEM_RES_BANK1 */ 140 { -1, 0 } 141 }; 142 143 static int 144 gem_pci_attach(device_t dev) 145 { 146 struct gem_softc *sc; 147 int i; 148 #if !(defined(__powerpc__) || defined(__sparc64__)) 149 int j; 150 #endif 151 152 sc = device_get_softc(dev); 153 sc->sc_variant = GEM_UNKNOWN; 154 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) { 155 if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) { 156 sc->sc_variant = gem_pci_devlist[i].gpd_variant; 157 break; 158 } 159 } 160 if (sc->sc_variant == GEM_UNKNOWN) { 161 device_printf(dev, "unknown adaptor\n"); 162 return (ENXIO); 163 } 164 165 pci_enable_busmaster(dev); 166 167 /* 168 * Some Sun GEMs/ERIs do have their intpin register bogusly set to 0, 169 * although it should be 1. Correct that. 170 */ 171 if (pci_get_intpin(dev) == 0) 172 pci_set_intpin(dev, 1); 173 174 sc->sc_dev = dev; 175 sc->sc_flags |= GEM_PCI; 176 177 if (bus_alloc_resources(dev, gem_pci_res_spec, sc->sc_res)) { 178 device_printf(dev, "failed to allocate resources\n"); 179 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res); 180 return (ENXIO); 181 } 182 183 GEM_LOCK_INIT(sc, device_get_nameunit(dev)); 184 185 /* 186 * Derive GEM_RES_BANK2 from GEM_RES_BANK1. This seemed cleaner 187 * with the old way of using copies of the bus tag and handle in 188 * the softc along with bus_space_*()... 189 */ 190 sc->sc_res[GEM_RES_BANK2] = malloc(sizeof(*sc->sc_res[GEM_RES_BANK2]), 191 M_DEVBUF, M_NOWAIT | M_ZERO); 192 if (sc->sc_res[GEM_RES_BANK2] == NULL) { 193 device_printf(dev, "failed to allocate bank2 resource\n"); 194 goto fail; 195 } 196 rman_set_bustag(sc->sc_res[GEM_RES_BANK2], 197 rman_get_bustag(sc->sc_res[GEM_RES_BANK1])); 198 bus_space_subregion(rman_get_bustag(sc->sc_res[GEM_RES_BANK1]), 199 rman_get_bushandle(sc->sc_res[GEM_RES_BANK1]), 200 GEM_PCI_BANK2_OFFSET, GEM_PCI_BANK2_SIZE, 201 &sc->sc_res[GEM_RES_BANK2]->r_bushandle); 202 203 #if defined(__powerpc__) || defined(__sparc64__) 204 OF_getetheraddr(dev, sc->sc_enaddr); 205 #else 206 /* 207 * Dig out VPD (vital product data) and read NA (network address). 208 * The VPD of GEM resides in the PCI Expansion ROM (PCI FCode) and 209 * can't be accessed via the PCI capability pointer. 210 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later) 211 * chapter 2 describes the data structure. 212 */ 213 214 #define PCI_ROMHDR_SIZE 0x1c 215 #define PCI_ROMHDR_SIG 0x00 216 #define PCI_ROMHDR_SIG_MAGIC 0xaa55 /* little endian */ 217 #define PCI_ROMHDR_PTR_DATA 0x18 218 #define PCI_ROM_SIZE 0x18 219 #define PCI_ROM_SIG 0x00 220 #define PCI_ROM_SIG_MAGIC 0x52494350 /* "PCIR", endian */ 221 /* reversed */ 222 #define PCI_ROM_VENDOR 0x04 223 #define PCI_ROM_DEVICE 0x06 224 #define PCI_ROM_PTR_VPD 0x08 225 #define PCI_VPDRES_BYTE0 0x00 226 #define PCI_VPDRES_ISLARGE(x) ((x) & 0x80) 227 #define PCI_VPDRES_LARGE_NAME(x) ((x) & 0x7f) 228 #define PCI_VPDRES_TYPE_VPD 0x10 /* large */ 229 #define PCI_VPDRES_LARGE_LEN_LSB 0x01 230 #define PCI_VPDRES_LARGE_LEN_MSB 0x02 231 #define PCI_VPDRES_LARGE_DATA 0x03 232 #define PCI_VPD_SIZE 0x03 233 #define PCI_VPD_KEY0 0x00 234 #define PCI_VPD_KEY1 0x01 235 #define PCI_VPD_LEN 0x02 236 #define PCI_VPD_DATA 0x03 237 238 #define GEM_ROM_READ_1(sc, offs) \ 239 GEM_BANK1_READ_1((sc), GEM_PCI_ROM_OFFSET + (offs)) 240 #define GEM_ROM_READ_2(sc, offs) \ 241 GEM_BANK1_READ_2((sc), GEM_PCI_ROM_OFFSET + (offs)) 242 #define GEM_ROM_READ_4(sc, offs) \ 243 GEM_BANK1_READ_4((sc), GEM_PCI_ROM_OFFSET + (offs)) 244 245 /* Read PCI Expansion ROM header. */ 246 if (GEM_ROM_READ_2(sc, PCI_ROMHDR_SIG) != PCI_ROMHDR_SIG_MAGIC || 247 (i = GEM_ROM_READ_2(sc, PCI_ROMHDR_PTR_DATA)) < 248 PCI_ROMHDR_SIZE) { 249 device_printf(dev, "unexpected PCI Expansion ROM header\n"); 250 goto fail; 251 } 252 253 /* Read PCI Expansion ROM data. */ 254 if (GEM_ROM_READ_4(sc, i + PCI_ROM_SIG) != PCI_ROM_SIG_MAGIC || 255 GEM_ROM_READ_2(sc, i + PCI_ROM_VENDOR) != pci_get_vendor(dev) || 256 GEM_ROM_READ_2(sc, i + PCI_ROM_DEVICE) != pci_get_device(dev) || 257 (j = GEM_ROM_READ_2(sc, i + PCI_ROM_PTR_VPD)) < 258 i + PCI_ROM_SIZE) { 259 device_printf(dev, "unexpected PCI Expansion ROM data\n"); 260 goto fail; 261 } 262 263 /* 264 * Read PCI VPD. 265 * SUNW,pci-gem cards have a single large resource VPD-R tag 266 * containing one NA. The VPD used is not in PCI 2.2 standard 267 * format however. The length in the resource header is in big 268 * endian and the end tag is non-standard (0x79) and followed 269 * by an all-zero "checksum" byte. Sun calls this a "Fresh 270 * Choice Ethernet" VPD... 271 */ 272 if (PCI_VPDRES_ISLARGE(GEM_ROM_READ_1(sc, 273 j + PCI_VPDRES_BYTE0)) == 0 || 274 PCI_VPDRES_LARGE_NAME(GEM_ROM_READ_1(sc, 275 j + PCI_VPDRES_BYTE0)) != PCI_VPDRES_TYPE_VPD || 276 (GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_LSB) << 8 | 277 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_MSB)) != 278 PCI_VPD_SIZE + ETHER_ADDR_LEN || 279 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_DATA + PCI_VPD_KEY0) != 280 0x4e /* N */ || 281 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_DATA + PCI_VPD_KEY1) != 282 0x41 /* A */ || 283 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_DATA + PCI_VPD_LEN) != 284 ETHER_ADDR_LEN || 285 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_DATA + PCI_VPD_DATA + 286 ETHER_ADDR_LEN) != 0x79) { 287 device_printf(dev, "unexpected PCI VPD\n"); 288 goto fail; 289 } 290 bus_read_region_1(sc->sc_res[GEM_RES_BANK1], 291 GEM_PCI_ROM_OFFSET + j + PCI_VPDRES_LARGE_DATA + PCI_VPD_DATA, 292 sc->sc_enaddr, ETHER_ADDR_LEN); 293 #endif 294 295 if (gem_attach(sc) != 0) { 296 device_printf(dev, "could not be attached\n"); 297 goto fail; 298 } 299 300 if (bus_setup_intr(dev, sc->sc_res[GEM_RES_INTR], INTR_TYPE_NET | 301 INTR_MPSAFE, NULL, gem_intr, sc, &sc->sc_ih) != 0) { 302 device_printf(dev, "failed to set up interrupt\n"); 303 gem_detach(sc); 304 goto fail; 305 } 306 return (0); 307 308 fail: 309 if (sc->sc_res[GEM_RES_BANK2] != NULL) 310 free(sc->sc_res[GEM_RES_BANK2], M_DEVBUF); 311 GEM_LOCK_DESTROY(sc); 312 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res); 313 return (ENXIO); 314 } 315 316 static int 317 gem_pci_detach(device_t dev) 318 { 319 struct gem_softc *sc; 320 321 sc = device_get_softc(dev); 322 bus_teardown_intr(dev, sc->sc_res[GEM_RES_INTR], sc->sc_ih); 323 gem_detach(sc); 324 free(sc->sc_res[GEM_RES_BANK2], M_DEVBUF); 325 GEM_LOCK_DESTROY(sc); 326 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res); 327 return (0); 328 } 329 330 static int 331 gem_pci_suspend(device_t dev) 332 { 333 struct gem_softc *sc; 334 335 sc = device_get_softc(dev); 336 gem_suspend(sc); 337 return (0); 338 } 339 340 static int 341 gem_pci_resume(device_t dev) 342 { 343 struct gem_softc *sc; 344 345 sc = device_get_softc(dev); 346 gem_resume(sc); 347 return (0); 348 } 349