1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2021, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /*$FreeBSD$*/ 32 33 #ifndef _ICE_COMMON_H_ 34 #define _ICE_COMMON_H_ 35 36 #include "ice_type.h" 37 #include "ice_nvm.h" 38 #include "ice_flex_pipe.h" 39 #include "virtchnl.h" 40 #include "ice_switch.h" 41 42 #define ICE_SQ_SEND_DELAY_TIME_MS 10 43 #define ICE_SQ_SEND_MAX_EXECUTE 3 44 45 enum ice_fw_modes { 46 ICE_FW_MODE_NORMAL, 47 ICE_FW_MODE_DBG, 48 ICE_FW_MODE_REC, 49 ICE_FW_MODE_ROLLBACK 50 }; 51 52 void ice_idle_aq(struct ice_hw *hw, struct ice_ctl_q_info *cq); 53 bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq); 54 55 enum ice_status ice_init_hw(struct ice_hw *hw); 56 void ice_deinit_hw(struct ice_hw *hw); 57 enum ice_status ice_check_reset(struct ice_hw *hw); 58 enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req); 59 60 enum ice_status ice_create_all_ctrlq(struct ice_hw *hw); 61 enum ice_status ice_init_all_ctrlq(struct ice_hw *hw); 62 void ice_shutdown_all_ctrlq(struct ice_hw *hw); 63 void ice_destroy_all_ctrlq(struct ice_hw *hw); 64 enum ice_status 65 ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq, 66 struct ice_rq_event_info *e, u16 *pending); 67 enum ice_status 68 ice_get_link_status(struct ice_port_info *pi, bool *link_up); 69 enum ice_status ice_update_link_info(struct ice_port_info *pi); 70 enum ice_status 71 ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res, 72 enum ice_aq_res_access_type access, u32 timeout); 73 void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res); 74 enum ice_status 75 ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res); 76 enum ice_status 77 ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res); 78 enum ice_status 79 ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries, 80 struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size, 81 enum ice_adminq_opc opc, struct ice_sq_cd *cd); 82 enum ice_status 83 ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq, 84 struct ice_aq_desc *desc, void *buf, u16 buf_size, 85 struct ice_sq_cd *cd); 86 void ice_clear_pxe_mode(struct ice_hw *hw); 87 88 enum ice_status ice_get_caps(struct ice_hw *hw); 89 90 void ice_set_safe_mode_caps(struct ice_hw *hw); 91 92 enum ice_status ice_set_mac_type(struct ice_hw *hw); 93 94 /* Define a macro that will align a pointer to point to the next memory address 95 * that falls on the given power of 2 (i.e., 2, 4, 8, 16, 32, 64...). For 96 * example, given the variable pointer = 0x1006, then after the following call: 97 * 98 * pointer = ICE_ALIGN(pointer, 4) 99 * 100 * ... the value of pointer would equal 0x1008, since 0x1008 is the next 101 * address after 0x1006 which is divisible by 4. 102 */ 103 #define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1)) 104 105 enum ice_status 106 ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, 107 u32 rxq_index); 108 enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index); 109 enum ice_status 110 ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index); 111 enum ice_status 112 ice_write_tx_cmpltnq_ctx(struct ice_hw *hw, 113 struct ice_tx_cmpltnq_ctx *tx_cmpltnq_ctx, 114 u32 tx_cmpltnq_index); 115 enum ice_status 116 ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index); 117 enum ice_status 118 ice_write_tx_drbell_q_ctx(struct ice_hw *hw, 119 struct ice_tx_drbell_q_ctx *tx_drbell_q_ctx, 120 u32 tx_drbell_q_index); 121 122 enum ice_status 123 ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params); 124 enum ice_status 125 ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params); 126 enum ice_status 127 ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle, 128 struct ice_aqc_get_set_rss_keys *keys); 129 enum ice_status 130 ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle, 131 struct ice_aqc_get_set_rss_keys *keys); 132 enum ice_status 133 ice_aq_add_lan_txq(struct ice_hw *hw, u8 count, 134 struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size, 135 struct ice_sq_cd *cd); 136 enum ice_status 137 ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move, 138 bool is_tc_change, bool subseq_call, bool flush_pipe, 139 u8 timeout, u32 *blocked_cgds, 140 struct ice_aqc_move_txqs_data *buf, u16 buf_size, 141 u8 *txqs_moved, struct ice_sq_cd *cd); 142 143 bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq); 144 enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading); 145 void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode); 146 extern const struct ice_ctx_ele ice_tlan_ctx_info[]; 147 enum ice_status 148 ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, 149 const struct ice_ctx_ele *ce_info); 150 151 enum ice_status 152 ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, 153 void *buf, u16 buf_size, struct ice_sq_cd *cd); 154 enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd); 155 156 enum ice_status 157 ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv, 158 struct ice_sq_cd *cd); 159 enum ice_status 160 ice_aq_set_port_params(struct ice_port_info *pi, u16 bad_frame_vsi, 161 bool save_bad_pac, bool pad_short_pac, bool double_vlan, 162 struct ice_sq_cd *cd); 163 enum ice_status 164 ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, 165 struct ice_aqc_get_phy_caps_data *caps, 166 struct ice_sq_cd *cd); 167 void 168 ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high, 169 u16 link_speeds_bitmap); 170 enum ice_status 171 ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size, 172 struct ice_sq_cd *cd); 173 enum ice_status 174 ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags, 175 struct ice_sq_cd *cd); 176 177 enum ice_status ice_clear_pf_cfg(struct ice_hw *hw); 178 enum ice_status 179 ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi, 180 struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd); 181 bool ice_fw_supports_link_override(struct ice_hw *hw); 182 enum ice_status 183 ice_get_link_default_override(struct ice_link_default_override_tlv *ldo, 184 struct ice_port_info *pi); 185 bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps); 186 187 enum ice_fc_mode ice_caps_to_fc_mode(u8 caps); 188 enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options); 189 enum ice_status 190 ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, 191 bool ena_auto_link_update); 192 bool 193 ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *caps, 194 struct ice_aqc_set_phy_cfg_data *cfg); 195 void 196 ice_copy_phy_caps_to_cfg(struct ice_port_info *pi, 197 struct ice_aqc_get_phy_caps_data *caps, 198 struct ice_aqc_set_phy_cfg_data *cfg); 199 enum ice_status 200 ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg, 201 enum ice_fec_mode fec); 202 enum ice_status 203 ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link, 204 struct ice_sq_cd *cd); 205 enum ice_status 206 ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd); 207 enum ice_status 208 ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, 209 struct ice_link_status *link, struct ice_sq_cd *cd); 210 enum ice_status 211 ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask, 212 struct ice_sq_cd *cd); 213 enum ice_status 214 ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd); 215 216 enum ice_status 217 ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, 218 struct ice_sq_cd *cd); 219 enum ice_status 220 ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr, 221 u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length, 222 bool write, struct ice_sq_cd *cd); 223 224 enum ice_status 225 ice_aq_get_port_options(struct ice_hw *hw, 226 struct ice_aqc_get_port_options_elem *options, 227 u8 *option_count, u8 lport, bool lport_valid, 228 u8 *active_option_idx, bool *active_option_valid); 229 enum ice_status 230 ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info); 231 enum ice_status 232 __ice_write_sr_word(struct ice_hw *hw, u32 offset, const u16 *data); 233 enum ice_status 234 __ice_write_sr_buf(struct ice_hw *hw, u32 offset, u16 words, const u16 *data); 235 enum ice_status 236 ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues, 237 u16 *q_handle, u16 *q_ids, u32 *q_teids, 238 enum ice_disq_rst_src rst_src, u16 vmvf_num, 239 struct ice_sq_cd *cd); 240 enum ice_status 241 ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap, 242 u16 *max_lanqs); 243 enum ice_status 244 ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle, 245 u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size, 246 struct ice_sq_cd *cd); 247 enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle); 248 void ice_replay_post(struct ice_hw *hw); 249 struct ice_q_ctx * 250 ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle); 251 void 252 ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, 253 u64 *prev_stat, u64 *cur_stat); 254 void 255 ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, 256 u64 *prev_stat, u64 *cur_stat); 257 void 258 ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded, 259 struct ice_eth_stats *cur_stats); 260 enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw); 261 void ice_print_rollback_msg(struct ice_hw *hw); 262 enum ice_status 263 ice_aq_alternate_write(struct ice_hw *hw, u32 reg_addr0, u32 reg_val0, 264 u32 reg_addr1, u32 reg_val1); 265 enum ice_status 266 ice_aq_alternate_read(struct ice_hw *hw, u32 reg_addr0, u32 *reg_val0, 267 u32 reg_addr1, u32 *reg_val1); 268 enum ice_status 269 ice_aq_alternate_write_done(struct ice_hw *hw, u8 bios_mode, 270 bool *reset_needed); 271 enum ice_status ice_aq_alternate_clear(struct ice_hw *hw); 272 enum ice_status 273 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid, 274 struct ice_aqc_txsched_elem_data *buf); 275 enum ice_status 276 ice_get_cur_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status); 277 enum ice_status 278 ice_get_dflt_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status); 279 enum ice_status ice_get_netlist_ver_info(struct ice_hw *hw, struct ice_netlist_info *netlist); 280 enum ice_status 281 ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size, 282 struct ice_sq_cd *cd); 283 bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw); 284 enum ice_status 285 ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add); 286 enum ice_status 287 ice_aq_set_health_status_config(struct ice_hw *hw, u8 event_source, 288 struct ice_sq_cd *cd); 289 bool ice_is_fw_health_report_supported(struct ice_hw *hw); 290 bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw); 291 #endif /* _ICE_COMMON_H_ */ 292