1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2022, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /*$FreeBSD$*/ 32 33 #ifndef _ICE_FLEX_TYPE_H_ 34 #define _ICE_FLEX_TYPE_H_ 35 36 #define ICE_FV_OFFSET_INVAL 0x1FF 37 38 #pragma pack(1) 39 /* Extraction Sequence (Field Vector) Table */ 40 struct ice_fv_word { 41 u8 prot_id; 42 u16 off; /* Offset within the protocol header */ 43 u8 resvrd; 44 }; 45 46 #pragma pack() 47 48 #define ICE_MAX_NUM_PROFILES 256 49 50 #define ICE_MAX_FV_WORDS 48 51 struct ice_fv { 52 struct ice_fv_word ew[ICE_MAX_FV_WORDS]; 53 }; 54 55 /* Packet Type (PTYPE) values */ 56 #define ICE_PTYPE_MAC_PAY 1 57 #define ICE_PTYPE_IPV4FRAG_PAY 22 58 #define ICE_PTYPE_IPV4_PAY 23 59 #define ICE_PTYPE_IPV4_UDP_PAY 24 60 #define ICE_PTYPE_IPV4_TCP_PAY 26 61 #define ICE_PTYPE_IPV4_SCTP_PAY 27 62 #define ICE_PTYPE_IPV4_ICMP_PAY 28 63 #define ICE_PTYPE_IPV6FRAG_PAY 88 64 #define ICE_PTYPE_IPV6_PAY 89 65 #define ICE_PTYPE_IPV6_UDP_PAY 90 66 #define ICE_PTYPE_IPV6_TCP_PAY 92 67 #define ICE_PTYPE_IPV6_SCTP_PAY 93 68 #define ICE_PTYPE_IPV6_ICMP_PAY 94 69 70 struct ice_meta_sect { 71 struct ice_pkg_ver ver; 72 #define ICE_META_SECT_NAME_SIZE 28 73 char name[ICE_META_SECT_NAME_SIZE]; 74 __le32 track_id; 75 }; 76 77 /* Packet Type Groups (PTG) - Inner Most fields (IM) */ 78 #define ICE_PTG_IM_IPV4_TCP 16 79 #define ICE_PTG_IM_IPV4_UDP 17 80 #define ICE_PTG_IM_IPV4_SCTP 18 81 #define ICE_PTG_IM_IPV4_PAY 20 82 #define ICE_PTG_IM_IPV4_OTHER 21 83 #define ICE_PTG_IM_IPV6_TCP 32 84 #define ICE_PTG_IM_IPV6_UDP 33 85 #define ICE_PTG_IM_IPV6_SCTP 34 86 #define ICE_PTG_IM_IPV6_OTHER 37 87 #define ICE_PTG_IM_L2_OTHER 67 88 89 struct ice_flex_fields { 90 union { 91 struct { 92 u8 src_ip; 93 u8 dst_ip; 94 u8 flow_label; /* valid for IPv6 only */ 95 } ip_fields; 96 97 struct { 98 u8 src_prt; 99 u8 dst_prt; 100 } tcp_udp_fields; 101 102 struct { 103 u8 src_ip; 104 u8 dst_ip; 105 u8 src_prt; 106 u8 dst_prt; 107 } ip_tcp_udp_fields; 108 109 struct { 110 u8 src_prt; 111 u8 dst_prt; 112 u8 flow_label; /* valid for IPv6 only */ 113 u8 spi; 114 } ip_esp_fields; 115 116 struct { 117 u32 offset; 118 u32 length; 119 } off_len; 120 } fields; 121 }; 122 123 #define ICE_XLT1_DFLT_GRP 0 124 #define ICE_XLT1_TABLE_SIZE 1024 125 126 /* package labels */ 127 struct ice_label { 128 __le16 value; 129 #define ICE_PKG_LABEL_SIZE 64 130 char name[ICE_PKG_LABEL_SIZE]; 131 }; 132 133 struct ice_label_section { 134 __le16 count; 135 struct ice_label label[STRUCT_HACK_VAR_LEN]; 136 }; 137 138 #define ICE_MAX_LABELS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \ 139 ice_struct_size((struct ice_label_section *)0, label, 1) - \ 140 sizeof(struct ice_label), sizeof(struct ice_label)) 141 142 struct ice_sw_fv_section { 143 __le16 count; 144 __le16 base_offset; 145 struct ice_fv fv[STRUCT_HACK_VAR_LEN]; 146 }; 147 148 struct ice_sw_fv_list_entry { 149 struct LIST_ENTRY_TYPE list_entry; 150 u32 profile_id; 151 struct ice_fv *fv_ptr; 152 }; 153 154 #pragma pack(1) 155 /* The BOOST TCAM stores the match packet header in reverse order, meaning 156 * the fields are reversed; in addition, this means that the normally big endian 157 * fields of the packet are now little endian. 158 */ 159 struct ice_boost_key_value { 160 #define ICE_BOOST_REMAINING_HV_KEY 15 161 u8 remaining_hv_key[ICE_BOOST_REMAINING_HV_KEY]; 162 union { 163 struct { 164 __le16 hv_dst_port_key; 165 __le16 hv_src_port_key; 166 } /* udp_tunnel */; 167 struct { 168 __le16 hv_vlan_id_key; 169 __le16 hv_etype_key; 170 } vlan; 171 }; 172 u8 tcam_search_key; 173 }; 174 #pragma pack() 175 176 struct ice_boost_key { 177 struct ice_boost_key_value key; 178 struct ice_boost_key_value key2; 179 }; 180 181 /* package Boost TCAM entry */ 182 struct ice_boost_tcam_entry { 183 __le16 addr; 184 __le16 reserved; 185 /* break up the 40 bytes of key into different fields */ 186 struct ice_boost_key key; 187 u8 boost_hit_index_group; 188 /* The following contains bitfields which are not on byte boundaries. 189 * These fields are currently unused by driver software. 190 */ 191 #define ICE_BOOST_BIT_FIELDS 43 192 u8 bit_fields[ICE_BOOST_BIT_FIELDS]; 193 }; 194 195 struct ice_boost_tcam_section { 196 __le16 count; 197 __le16 reserved; 198 struct ice_boost_tcam_entry tcam[STRUCT_HACK_VAR_LEN]; 199 }; 200 201 #define ICE_MAX_BST_TCAMS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \ 202 ice_struct_size((struct ice_boost_tcam_section *)0, tcam, 1) - \ 203 sizeof(struct ice_boost_tcam_entry), \ 204 sizeof(struct ice_boost_tcam_entry)) 205 206 struct ice_xlt1_section { 207 __le16 count; 208 __le16 offset; 209 u8 value[STRUCT_HACK_VAR_LEN]; 210 }; 211 212 struct ice_xlt2_section { 213 __le16 count; 214 __le16 offset; 215 __le16 value[STRUCT_HACK_VAR_LEN]; 216 }; 217 218 struct ice_prof_redir_section { 219 __le16 count; 220 __le16 offset; 221 u8 redir_value[STRUCT_HACK_VAR_LEN]; 222 }; 223 224 /* Tunnel enabling */ 225 226 enum ice_tunnel_type { 227 TNL_VXLAN = 0, 228 TNL_GENEVE, 229 TNL_GRETAP, 230 TNL_GTP, 231 TNL_GTPC, 232 TNL_GTPU, 233 TNL_LAST = 0xFF, 234 TNL_ALL = 0xFF, 235 }; 236 237 struct ice_tunnel_type_scan { 238 enum ice_tunnel_type type; 239 const char *label_prefix; 240 }; 241 242 struct ice_tunnel_entry { 243 enum ice_tunnel_type type; 244 u16 boost_addr; 245 u16 port; 246 u16 ref; 247 struct ice_boost_tcam_entry *boost_entry; 248 u8 valid; 249 u8 in_use; 250 u8 marked; 251 }; 252 253 #define ICE_TUNNEL_MAX_ENTRIES 16 254 255 struct ice_tunnel_table { 256 struct ice_tunnel_entry tbl[ICE_TUNNEL_MAX_ENTRIES]; 257 u16 count; 258 }; 259 260 struct ice_pkg_es { 261 __le16 count; 262 __le16 offset; 263 struct ice_fv_word es[STRUCT_HACK_VAR_LEN]; 264 }; 265 266 struct ice_es { 267 u32 sid; 268 u16 count; 269 u16 fvw; 270 u16 *ref_count; 271 struct LIST_HEAD_TYPE prof_map; 272 struct ice_fv_word *t; 273 struct ice_lock prof_map_lock; /* protect access to profiles list */ 274 u8 *written; 275 u8 reverse; /* set to true to reverse FV order */ 276 }; 277 278 /* PTYPE Group management */ 279 280 /* Note: XLT1 table takes 13-bit as input, and results in an 8-bit packet type 281 * group (PTG) ID as output. 282 * 283 * Note: PTG 0 is the default packet type group and it is assumed that all PTYPE 284 * are a part of this group until moved to a new PTG. 285 */ 286 #define ICE_DEFAULT_PTG 0 287 288 struct ice_ptg_entry { 289 struct ice_ptg_ptype *first_ptype; 290 u8 in_use; 291 }; 292 293 struct ice_ptg_ptype { 294 struct ice_ptg_ptype *next_ptype; 295 u8 ptg; 296 }; 297 298 #define ICE_MAX_TCAM_PER_PROFILE 32 299 #define ICE_MAX_PTG_PER_PROFILE 32 300 301 struct ice_prof_map { 302 struct LIST_ENTRY_TYPE list; 303 u64 profile_cookie; 304 u64 context; 305 u8 prof_id; 306 u8 ptg_cnt; 307 u8 ptg[ICE_MAX_PTG_PER_PROFILE]; 308 }; 309 310 #define ICE_INVALID_TCAM 0xFFFF 311 312 struct ice_tcam_inf { 313 u16 tcam_idx; 314 u8 ptg; 315 u8 prof_id; 316 u8 in_use; 317 }; 318 319 struct ice_vsig_prof { 320 struct LIST_ENTRY_TYPE list; 321 u64 profile_cookie; 322 u8 prof_id; 323 u8 tcam_count; 324 struct ice_tcam_inf tcam[ICE_MAX_TCAM_PER_PROFILE]; 325 }; 326 327 struct ice_vsig_entry { 328 struct LIST_HEAD_TYPE prop_lst; 329 struct ice_vsig_vsi *first_vsi; 330 u8 in_use; 331 }; 332 333 struct ice_vsig_vsi { 334 struct ice_vsig_vsi *next_vsi; 335 u32 prop_mask; 336 u16 changed; 337 u16 vsig; 338 }; 339 340 #define ICE_XLT1_CNT 1024 341 #define ICE_MAX_PTGS 256 342 343 /* XLT1 Table */ 344 struct ice_xlt1 { 345 struct ice_ptg_entry *ptg_tbl; 346 struct ice_ptg_ptype *ptypes; 347 u8 *t; 348 u32 sid; 349 u16 count; 350 }; 351 352 #define ICE_XLT2_CNT 768 353 #define ICE_MAX_VSIGS 768 354 355 /* VSIG bit layout: 356 * [0:12]: incremental VSIG index 1 to ICE_MAX_VSIGS 357 * [13:15]: PF number of device 358 */ 359 #define ICE_VSIG_IDX_M (0x1FFF) 360 #define ICE_PF_NUM_S 13 361 #define ICE_PF_NUM_M (0x07 << ICE_PF_NUM_S) 362 #define ICE_VSIG_VALUE(vsig, pf_id) \ 363 ((u16)((((u16)(vsig)) & ICE_VSIG_IDX_M) | \ 364 (((u16)(pf_id) << ICE_PF_NUM_S) & ICE_PF_NUM_M))) 365 #define ICE_DEFAULT_VSIG 0 366 367 /* XLT2 Table */ 368 struct ice_xlt2 { 369 struct ice_vsig_entry *vsig_tbl; 370 struct ice_vsig_vsi *vsis; 371 u16 *t; 372 u32 sid; 373 u16 count; 374 }; 375 376 /* Extraction sequence - list of match fields: 377 * protocol ID, offset, profile length 378 */ 379 union ice_match_fld { 380 struct { 381 u8 prot_id; 382 u8 offset; 383 u8 length; 384 u8 reserved; /* must be zero */ 385 } fld; 386 u32 val; 387 }; 388 389 #define ICE_MATCH_LIST_SZ 20 390 #pragma pack(1) 391 struct ice_match { 392 u8 count; 393 union ice_match_fld list[ICE_MATCH_LIST_SZ]; 394 }; 395 396 /* Profile ID Management */ 397 struct ice_prof_id_key { 398 __le16 flags; 399 u8 xlt1; 400 __le16 xlt2_cdid; 401 }; 402 403 /* Keys are made up of two values, each one-half the size of the key. 404 * For TCAM, the entire key is 80 bits wide (or 2, 40-bit wide values) 405 */ 406 #define ICE_TCAM_KEY_VAL_SZ 5 407 #define ICE_TCAM_KEY_SZ (2 * ICE_TCAM_KEY_VAL_SZ) 408 409 struct ice_prof_tcam_entry { 410 __le16 addr; 411 u8 key[ICE_TCAM_KEY_SZ]; 412 u8 prof_id; 413 }; 414 #pragma pack() 415 416 struct ice_prof_id_section { 417 __le16 count; 418 struct ice_prof_tcam_entry entry[STRUCT_HACK_VAR_LEN]; 419 }; 420 421 struct ice_prof_tcam { 422 u32 sid; 423 u16 count; 424 u16 max_prof_id; 425 struct ice_prof_tcam_entry *t; 426 u8 cdid_bits; /* # CDID bits to use in key, 0, 2, 4, or 8 */ 427 }; 428 429 struct ice_prof_redir { 430 u8 *t; 431 u32 sid; 432 u16 count; 433 }; 434 435 /* Tables per block */ 436 struct ice_blk_info { 437 struct ice_xlt1 xlt1; 438 struct ice_xlt2 xlt2; 439 struct ice_prof_tcam prof; 440 struct ice_prof_redir prof_redir; 441 struct ice_es es; 442 u8 overwrite; /* set to true to allow overwrite of table entries */ 443 u8 is_list_init; 444 }; 445 446 enum ice_chg_type { 447 ICE_TCAM_NONE = 0, 448 ICE_PTG_ES_ADD, 449 ICE_TCAM_ADD, 450 ICE_VSIG_ADD, 451 ICE_VSIG_REM, 452 ICE_VSI_MOVE, 453 }; 454 455 struct ice_chs_chg { 456 struct LIST_ENTRY_TYPE list_entry; 457 enum ice_chg_type type; 458 459 u8 add_ptg; 460 u8 add_vsig; 461 u8 add_tcam_idx; 462 u8 add_prof; 463 u16 ptype; 464 u8 ptg; 465 u8 prof_id; 466 u16 vsi; 467 u16 vsig; 468 u16 orig_vsig; 469 u16 tcam_idx; 470 }; 471 472 #define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT 473 474 enum ice_prof_type { 475 ICE_PROF_INVALID = 0x0, 476 ICE_PROF_NON_TUN = 0x1, 477 ICE_PROF_TUN_UDP = 0x2, 478 ICE_PROF_TUN_GRE = 0x4, 479 ICE_PROF_TUN_GTPU = 0x8, 480 ICE_PROF_TUN_GTPC = 0x10, 481 ICE_PROF_TUN_ALL = 0x1E, 482 ICE_PROF_ALL = 0xFF, 483 }; 484 485 /* Number of bits/bytes contained in meta init entry. Note, this should be a 486 * multiple of 32 bits. 487 */ 488 #define ICE_META_INIT_BITS 192 489 #define ICE_META_INIT_DW_CNT (ICE_META_INIT_BITS / (sizeof(__le32) * \ 490 BITS_PER_BYTE)) 491 492 /* The meta init Flag field starts at this bit */ 493 #define ICE_META_FLAGS_ST 123 494 495 /* The entry and bit to check for Double VLAN Mode (DVM) support */ 496 #define ICE_META_VLAN_MODE_ENTRY 0 497 #define ICE_META_FLAG_VLAN_MODE 60 498 #define ICE_META_VLAN_MODE_BIT (ICE_META_FLAGS_ST + \ 499 ICE_META_FLAG_VLAN_MODE) 500 501 struct ice_meta_init_entry { 502 __le32 bm[ICE_META_INIT_DW_CNT]; 503 }; 504 505 struct ice_meta_init_section { 506 __le16 count; 507 __le16 offset; 508 struct ice_meta_init_entry entry[1]; 509 }; 510 #endif /* _ICE_FLEX_TYPE_H_ */ 511