1 /*-
2  * Copyright (c) 2016-2019 Emmanuel Vadot <manu@freebsd.org>
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  */
25 
26 #include <sys/param.h>
27 #include <sys/systm.h>
28 #include <sys/bus.h>
29 #include <sys/kernel.h>
30 #include <sys/module.h>
31 #include <sys/resource.h>
32 
33 #include <machine/bus.h>
34 #include <machine/resource.h>
35 
36 #include <sys/rman.h>
37 
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 
41 #include <dev/iicbus/iiconf.h>
42 #include <dev/iicbus/iicbus.h>
43 #include <dev/iicbus/controller/twsi/twsi.h>
44 #include <dev/ofw/ofw_bus.h>
45 #include <dev/ofw/ofw_bus_subr.h>
46 
47 #include <dev/clk/clk.h>
48 #include <dev/hwreset/hwreset.h>
49 
50 #include "iicbus_if.h"
51 
52 #define	TWI_ADDR	0x0
53 #define	TWI_XADDR	0x4
54 #define	TWI_DATA	0x8
55 #define	TWI_CNTR	0xC
56 #define	TWI_STAT	0x10
57 #define	TWI_CCR		0x14
58 #define	TWI_SRST	0x18
59 #define	TWI_EFR		0x1C
60 #define	TWI_LCR		0x20
61 
62 static struct ofw_compat_data compat_data[] = {
63 	{"allwinner,sun4i-a10-i2c", 1},
64 	{"allwinner,sun6i-a31-i2c", 1},
65 	{"allwinner,sun8i-a83t-i2c", 1},
66 	{NULL, 0},
67 };
68 
69 static int
70 a10_twsi_probe(device_t dev)
71 {
72 
73 	if (!ofw_bus_status_okay(dev))
74 		return (ENXIO);
75 
76 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
77 		return (ENXIO);
78 
79 	device_set_desc(dev, "Allwinner Integrated I2C Bus Controller");
80 	return (BUS_PROBE_DEFAULT);
81 }
82 
83 static int
84 a10_twsi_attach(device_t dev)
85 {
86 	struct twsi_softc *sc;
87 	hwreset_t rst;
88 	int error;
89 
90 	sc = device_get_softc(dev);
91 
92 	/* De-assert reset */
93 	if (hwreset_get_by_ofw_idx(dev, 0, 0, &rst) == 0) {
94 		error = hwreset_deassert(rst);
95 		if (error != 0) {
96 			device_printf(dev, "could not de-assert reset\n");
97 			return (error);
98 		}
99 	}
100 
101 	/* Activate clock */
102 	error = clk_get_by_ofw_index(dev, 0, 0, &sc->clk_core);
103 	if (error != 0) {
104 		device_printf(dev, "could not find clock\n");
105 		return (error);
106 	}
107 	error = clk_enable(sc->clk_core);
108 	if (error != 0) {
109 		device_printf(dev, "could not enable clock\n");
110 		return (error);
111 	}
112 
113 	sc->reg_data = TWI_DATA;
114 	sc->reg_slave_addr = TWI_ADDR;
115 	sc->reg_slave_ext_addr = TWI_XADDR;
116 	sc->reg_control = TWI_CNTR;
117 	sc->reg_status = TWI_STAT;
118 	sc->reg_baud_rate = TWI_CCR;
119 	sc->reg_soft_reset = TWI_SRST;
120 
121 	if (ofw_bus_is_compatible(dev, "allwinner,sun6i-a31-i2c") ||
122 	    ofw_bus_is_compatible(dev, "allwinner,sun6i-a83t-i2c"))
123 		sc->iflag_w1c = true;
124 	return (twsi_attach(dev));
125 }
126 
127 static phandle_t
128 a10_twsi_get_node(device_t bus, device_t dev)
129 {
130 	return (ofw_bus_get_node(bus));
131 }
132 
133 static device_method_t a10_twsi_methods[] = {
134 	/* device interface */
135 	DEVMETHOD(device_probe,		a10_twsi_probe),
136 	DEVMETHOD(device_attach,	a10_twsi_attach),
137 
138 	/* OFW methods */
139 	DEVMETHOD(ofw_bus_get_node,	a10_twsi_get_node),
140 
141 	{ 0, 0 }
142 };
143 
144 DEFINE_CLASS_1(iichb, a10_twsi_driver, a10_twsi_methods,
145     sizeof(struct twsi_softc), twsi_driver);
146 
147 EARLY_DRIVER_MODULE(a10_twsi, simplebus, a10_twsi_driver,
148     0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
149 EARLY_DRIVER_MODULE(iicbus, a10_twsi, iicbus_driver,
150     0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
151 MODULE_DEPEND(a10_twsi, iicbus, 1, 1, 1);
152 SIMPLEBUS_PNP_INFO(compat_data);
153