1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 /* 30 * Generic IIC eeprom support, modeled after the AT24C family of products. 31 */ 32 33 #include "opt_platform.h" 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/bus.h> 38 #include <sys/conf.h> 39 #include <sys/kernel.h> 40 #include <sys/module.h> 41 #include <sys/resource.h> 42 #include <sys/sx.h> 43 #include <sys/sysctl.h> 44 #include <sys/uio.h> 45 #include <machine/bus.h> 46 47 #ifdef FDT 48 #include <dev/ofw/ofw_bus.h> 49 #include <dev/ofw/ofw_bus_subr.h> 50 #endif 51 52 #include <dev/iicbus/iiconf.h> 53 #include <dev/iicbus/iicbus.h> 54 55 #include "iicbus_if.h" 56 57 /* 58 * AT24 parts have a "write page size" that differs per-device, and a "read page 59 * size" that is always equal to the full device size. We define maximum values 60 * here to limit how long we occupy the bus with a single transfer, and because 61 * there are temporary buffers of these sizes allocated on the stack. 62 */ 63 #define MAX_RD_SZ 256 /* Largest read size we support */ 64 #define MAX_WR_SZ 256 /* Largest write size we support */ 65 66 struct icee_softc { 67 device_t dev; /* Myself */ 68 struct cdev *cdev; /* user interface */ 69 int addr; /* Slave address on the bus */ 70 int size; /* How big am I? */ 71 int type; /* What address type 8 or 16 bit? */ 72 int wr_sz; /* What's the write page size */ 73 }; 74 75 #ifdef FDT 76 struct eeprom_desc { 77 int type; 78 int size; 79 int wr_sz; 80 const char *name; 81 }; 82 83 static struct eeprom_desc type_desc[] = { 84 { 8, 128, 8, "AT24C01"}, 85 { 8, 256, 8, "AT24C02"}, 86 { 8, 512, 16, "AT24C04"}, 87 { 8, 1024, 16, "AT24C08"}, 88 { 8, 2 * 1024, 16, "AT24C16"}, 89 {16, 4 * 1024, 32, "AT24C32"}, 90 {16, 8 * 1024, 32, "AT24C64"}, 91 {16, 16 * 1024, 64, "AT24C128"}, 92 {16, 32 * 1024, 64, "AT24C256"}, 93 {16, 64 * 1024, 128, "AT24C512"}, 94 {16, 128 * 1024, 256, "AT24CM01"}, 95 }; 96 97 static struct ofw_compat_data compat_data[] = { 98 {"atmel,24c01", (uintptr_t)(&type_desc[0])}, 99 {"atmel,24c02", (uintptr_t)(&type_desc[1])}, 100 {"atmel,24c04", (uintptr_t)(&type_desc[2])}, 101 {"atmel,24c08", (uintptr_t)(&type_desc[3])}, 102 {"atmel,24c16", (uintptr_t)(&type_desc[4])}, 103 {"atmel,24c32", (uintptr_t)(&type_desc[5])}, 104 {"atmel,24c64", (uintptr_t)(&type_desc[6])}, 105 {"atmel,24c128", (uintptr_t)(&type_desc[7])}, 106 {"atmel,24c256", (uintptr_t)(&type_desc[8])}, 107 {"atmel,24c512", (uintptr_t)(&type_desc[9])}, 108 {"atmel,24c1024", (uintptr_t)(&type_desc[10])}, 109 {NULL, (uintptr_t)NULL}, 110 }; 111 #endif 112 113 #define CDEV2SOFTC(dev) ((dev)->si_drv1) 114 115 /* cdev routines */ 116 static d_open_t icee_open; 117 static d_close_t icee_close; 118 static d_read_t icee_read; 119 static d_write_t icee_write; 120 121 static struct cdevsw icee_cdevsw = 122 { 123 .d_version = D_VERSION, 124 .d_flags = D_TRACKCLOSE, 125 .d_open = icee_open, 126 .d_close = icee_close, 127 .d_read = icee_read, 128 .d_write = icee_write 129 }; 130 131 #ifdef FDT 132 static int 133 icee_probe(device_t dev) 134 { 135 struct eeprom_desc *d; 136 137 if (!ofw_bus_status_okay(dev)) 138 return (ENXIO); 139 140 d = (struct eeprom_desc *) 141 ofw_bus_search_compatible(dev, compat_data)->ocd_data; 142 if (d == NULL) 143 return (ENXIO); 144 145 device_set_desc(dev, d->name); 146 return (BUS_PROBE_DEFAULT); 147 } 148 149 static void 150 icee_init(struct icee_softc *sc) 151 { 152 struct eeprom_desc *d; 153 154 d = (struct eeprom_desc *) 155 ofw_bus_search_compatible(sc->dev, compat_data)->ocd_data; 156 if (d == NULL) 157 return; /* attach will see sc->size == 0 and return error */ 158 159 sc->size = d->size; 160 sc->type = d->type; 161 sc->wr_sz = d->wr_sz; 162 } 163 #else /* !FDT */ 164 static int 165 icee_probe(device_t dev) 166 { 167 168 device_set_desc(dev, "I2C EEPROM"); 169 return (BUS_PROBE_NOWILDCARD); 170 } 171 172 static void 173 icee_init(struct icee_softc *sc) 174 { 175 const char *dname; 176 int dunit; 177 178 dname = device_get_name(sc->dev); 179 dunit = device_get_unit(sc->dev); 180 resource_int_value(dname, dunit, "size", &sc->size); 181 resource_int_value(dname, dunit, "type", &sc->type); 182 resource_int_value(dname, dunit, "wr_sz", &sc->wr_sz); 183 } 184 #endif /* FDT */ 185 186 static int 187 icee_attach(device_t dev) 188 { 189 struct icee_softc *sc = device_get_softc(dev); 190 struct sysctl_ctx_list *ctx; 191 struct sysctl_oid_list *tree; 192 193 sc->dev = dev; 194 sc->addr = iicbus_get_addr(dev); 195 icee_init(sc); 196 if (sc->size == 0 || sc->type == 0 || sc->wr_sz == 0) { 197 device_printf(sc->dev, "Missing config data, " 198 "these cannot be zero: size %d type %d wr_sz %d\n", 199 sc->size, sc->type, sc->wr_sz); 200 return (EINVAL); 201 } 202 if (bootverbose) 203 device_printf(dev, "size: %d bytes, addressing: %d-bits\n", 204 sc->size, sc->type); 205 sc->cdev = make_dev(&icee_cdevsw, device_get_unit(dev), UID_ROOT, 206 GID_WHEEL, 0600, "icee%d", device_get_unit(dev)); 207 if (sc->cdev == NULL) { 208 return (ENOMEM); 209 } 210 sc->cdev->si_drv1 = sc; 211 212 ctx = device_get_sysctl_ctx(dev); 213 tree = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); 214 SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "address_size", CTLFLAG_RD, 215 &sc->type, 0, "Memory array address size in bits"); 216 SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "device_size", CTLFLAG_RD, 217 &sc->size, 0, "Memory array capacity in bytes"); 218 SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "write_size", CTLFLAG_RD, 219 &sc->wr_sz, 0, "Memory array page write size in bytes"); 220 221 return (0); 222 } 223 224 static int 225 icee_detach(device_t dev) 226 { 227 struct icee_softc *sc = device_get_softc(dev); 228 229 destroy_dev(sc->cdev); 230 return (0); 231 } 232 233 static int 234 icee_open(struct cdev *dev, int oflags, int devtype, struct thread *td) 235 { 236 struct icee_softc *sc; 237 238 sc = CDEV2SOFTC(dev); 239 if (device_get_state(sc->dev) < DS_BUSY) 240 device_busy(sc->dev); 241 242 return (0); 243 } 244 245 static int 246 icee_close(struct cdev *dev, int fflag, int devtype, struct thread *td) 247 { 248 struct icee_softc *sc; 249 250 sc = CDEV2SOFTC(dev); 251 device_unbusy(sc->dev); 252 return (0); 253 } 254 255 static int 256 icee_read(struct cdev *dev, struct uio *uio, int ioflag) 257 { 258 struct icee_softc *sc; 259 uint8_t addr[2]; 260 uint8_t data[MAX_RD_SZ]; 261 int error, i, len, slave; 262 struct iic_msg msgs[2] = { 263 { 0, IIC_M_WR, 1, addr }, 264 { 0, IIC_M_RD, 0, data }, 265 }; 266 267 sc = CDEV2SOFTC(dev); 268 if (uio->uio_offset == sc->size) 269 return (0); 270 if (uio->uio_offset > sc->size) 271 return (EIO); 272 if (sc->type != 8 && sc->type != 16) 273 return (EINVAL); 274 slave = error = 0; 275 while (uio->uio_resid > 0) { 276 if (uio->uio_offset >= sc->size) 277 break; 278 len = MIN(MAX_RD_SZ - (uio->uio_offset & (MAX_RD_SZ - 1)), 279 uio->uio_resid); 280 switch (sc->type) { 281 case 8: 282 slave = (uio->uio_offset >> 7) | sc->addr; 283 msgs[0].len = 1; 284 msgs[1].len = len; 285 addr[0] = uio->uio_offset & 0xff; 286 break; 287 case 16: 288 slave = sc->addr | (uio->uio_offset >> 15); 289 msgs[0].len = 2; 290 msgs[1].len = len; 291 addr[0] = (uio->uio_offset >> 8) & 0xff; 292 addr[1] = uio->uio_offset & 0xff; 293 break; 294 } 295 for (i = 0; i < 2; i++) 296 msgs[i].slave = slave; 297 error = iicbus_transfer_excl(sc->dev, msgs, 2, IIC_INTRWAIT); 298 if (error) { 299 error = iic2errno(error); 300 break; 301 } 302 error = uiomove(data, len, uio); 303 if (error) 304 break; 305 } 306 return (error); 307 } 308 309 /* 310 * Write to the part. We use three transfers here since we're actually 311 * doing a write followed by a read to make sure that the write finished. 312 * It is easier to encode the dummy read here than to break things up 313 * into smaller chunks... 314 */ 315 static int 316 icee_write(struct cdev *dev, struct uio *uio, int ioflag) 317 { 318 struct icee_softc *sc; 319 int error, len, slave, waitlimit; 320 uint8_t data[MAX_WR_SZ + 2]; 321 struct iic_msg wr[1] = { 322 { 0, IIC_M_WR, 0, data }, 323 }; 324 struct iic_msg rd[1] = { 325 { 0, IIC_M_RD, 1, data }, 326 }; 327 328 sc = CDEV2SOFTC(dev); 329 if (uio->uio_offset >= sc->size) 330 return (EIO); 331 if (sc->type != 8 && sc->type != 16) 332 return (EINVAL); 333 334 slave = error = 0; 335 while (uio->uio_resid > 0) { 336 if (uio->uio_offset >= sc->size) 337 break; 338 len = MIN(sc->wr_sz - (uio->uio_offset & (sc->wr_sz - 1)), 339 uio->uio_resid); 340 switch (sc->type) { 341 case 8: 342 slave = (uio->uio_offset >> 7) | sc->addr; 343 wr[0].len = 1 + len; 344 data[0] = uio->uio_offset & 0xff; 345 break; 346 case 16: 347 slave = sc->addr | (uio->uio_offset >> 15); 348 wr[0].len = 2 + len; 349 data[0] = (uio->uio_offset >> 8) & 0xff; 350 data[1] = uio->uio_offset & 0xff; 351 break; 352 } 353 wr[0].slave = slave; 354 error = uiomove(data + sc->type / 8, len, uio); 355 if (error) 356 break; 357 error = iicbus_transfer_excl(sc->dev, wr, 1, IIC_INTRWAIT); 358 if (error) { 359 error = iic2errno(error); 360 break; 361 } 362 /* Read after write to wait for write-done. */ 363 waitlimit = 10000; 364 rd[0].slave = slave; 365 do { 366 error = iicbus_transfer_excl(sc->dev, rd, 1, 367 IIC_INTRWAIT); 368 } while (waitlimit-- > 0 && error != 0); 369 if (error) { 370 error = iic2errno(error); 371 break; 372 } 373 } 374 return error; 375 } 376 377 static device_method_t icee_methods[] = { 378 DEVMETHOD(device_probe, icee_probe), 379 DEVMETHOD(device_attach, icee_attach), 380 DEVMETHOD(device_detach, icee_detach), 381 382 DEVMETHOD_END 383 }; 384 385 static driver_t icee_driver = { 386 "icee", 387 icee_methods, 388 sizeof(struct icee_softc), 389 }; 390 static devclass_t icee_devclass; 391 392 DRIVER_MODULE(icee, iicbus, icee_driver, icee_devclass, 0, 0); 393 MODULE_VERSION(icee, 1); 394 MODULE_DEPEND(icee, iicbus, 1, 1, 1); 395 IICBUS_FDT_PNP_INFO(compat_data); 396