1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2018-2021 Emmanuel Vadot <manu@FreeBSD.org>
5  * Copyright (c) 2021 Bjoern A. Zeeb <bz@FreeBSD.org>
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/param.h>
30 #include <sys/bus.h>
31 #include <sys/systm.h>
32 #include <sys/clock.h>
33 
34 #include <dev/ofw/ofw_bus.h>
35 #include <dev/ofw/ofw_bus_subr.h>
36 
37 #include <dev/clk/clk.h>
38 
39 #include <dev/iicbus/pmic/rockchip/rk8xx.h>
40 
41 /* Clock class and method */
42 struct rk8xx_clk_sc {
43 	device_t		base_dev;
44 };
45 
46 #define	CLK32OUT_REG		0x20
47 #define	CLK32OUT_CLKOUT2_EN	1
48 
49 static int
50 rk8xx_clk_set_gate_1(struct clknode *clk, bool enable)
51 {
52 	struct rk8xx_clk_sc *sc;
53 	uint8_t val;
54 
55 	sc = clknode_get_softc(clk);
56 
57 	rk8xx_read(sc->base_dev, CLK32OUT_REG, &val, sizeof(val));
58 	if (enable)
59 		val |= CLK32OUT_CLKOUT2_EN;
60 	else
61 		val &= ~CLK32OUT_CLKOUT2_EN;
62 	rk8xx_write(sc->base_dev, CLK32OUT_REG, &val, 1);
63 
64 	return (0);
65 }
66 
67 static int
68 rk8xx_clk_recalc(struct clknode *clk, uint64_t *freq)
69 {
70 
71 	*freq = 32768;
72 	return (0);
73 }
74 
75 static clknode_method_t rk8xx_clk_clknode_methods_0[] = {
76 	CLKNODEMETHOD(clknode_recalc_freq,	rk8xx_clk_recalc),
77 	CLKNODEMETHOD_END
78 };
79 
80 DEFINE_CLASS_1(rk8xx_clk_clknode_0, rk8xx_clk_clknode_class_0,
81     rk8xx_clk_clknode_methods_0, sizeof(struct rk8xx_clk_sc),
82     clknode_class);
83 
84 static clknode_method_t rk8xx_clk_clknode_methods_1[] = {
85 	CLKNODEMETHOD(clknode_set_gate,		rk8xx_clk_set_gate_1),
86 	CLKNODEMETHOD_END
87 };
88 
89 DEFINE_CLASS_1(rk8xx_clk_clknode_1, rk8xx_clk_clknode_class_1,
90     rk8xx_clk_clknode_methods_1, sizeof(struct rk8xx_clk_sc),
91     rk8xx_clk_clknode_class_0);
92 
93 int
94 rk8xx_attach_clocks(struct rk8xx_softc *sc)
95 {
96 	struct clkdom *clkdom;
97 	struct clknode_init_def clkidef;
98 	struct clknode *clk;
99 	struct rk8xx_clk_sc *clksc;
100 	const char **clknames;
101 	phandle_t node;
102 	int nclks, rv;
103 
104 	node = ofw_bus_get_node(sc->dev);
105 
106 	/* clock-output-names are optional. Could use them for clkidef.name. */
107 	nclks = ofw_bus_string_list_to_array(node, "clock-output-names",
108 	    &clknames);
109 
110 	clkdom = clkdom_create(sc->dev);
111 
112 	memset(&clkidef, 0, sizeof(clkidef));
113 	clkidef.id = 0;
114 	clkidef.name = (nclks == 2) ? clknames[0] : "clk32kout1";
115 	clk = clknode_create(clkdom, &rk8xx_clk_clknode_class_0, &clkidef);
116 	if (clk == NULL) {
117 		device_printf(sc->dev, "Cannot create '%s'.\n", clkidef.name);
118 		return (ENXIO);
119 	}
120 	clksc = clknode_get_softc(clk);
121 	clksc->base_dev = sc->dev;
122 	clknode_register(clkdom, clk);
123 
124 	memset(&clkidef, 0, sizeof(clkidef));
125 	clkidef.id = 1;
126 	clkidef.name = (nclks == 2) ? clknames[1] : "clk32kout2";
127 	clk = clknode_create(clkdom, &rk8xx_clk_clknode_class_1, &clkidef);
128 	if (clk == NULL) {
129 		device_printf(sc->dev, "Cannot create '%s'.\n", clkidef.name);
130 		return (ENXIO);
131 	}
132 	clksc = clknode_get_softc(clk);
133 	clksc->base_dev = sc->dev;
134 	clknode_register(clkdom, clk);
135 
136 	rv = clkdom_finit(clkdom);
137 	if (rv != 0) {
138 		device_printf(sc->dev, "Cannot finalize clkdom initialization: "
139 		    "%d\n", rv);
140 		return (ENXIO);
141 	}
142 
143 	if (bootverbose)
144 		clkdom_dump(clkdom);
145 
146 	return (0);
147 }
148