1 /*- 2 * SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) 3 * 4 * 5 * Copyright (c) 2006 - 2022 Intel Corporation. All rights reserved. 6 * Copyright (c) 2005 Topspin Communications. All rights reserved. 7 * Copyright (c) 2005 Cisco Systems. All rights reserved. 8 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved. 9 * 10 * This software is available to you under a choice of one of two 11 * licenses. You may choose to be licensed under the terms of the GNU 12 * General Public License (GPL) Version 2, available from the file 13 * COPYING in the main directory of this source tree, or the 14 * OpenFabrics.org BSD license below: 15 * 16 * Redistribution and use in source and binary forms, with or 17 * without modification, are permitted provided that the following 18 * conditions are met: 19 * 20 * - Redistributions of source code must retain the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer. 23 * 24 * - Redistributions in binary form must reproduce the above 25 * copyright notice, this list of conditions and the following 26 * disclaimer in the documentation and/or other materials 27 * provided with the distribution. 28 * 29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 33 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 36 * SOFTWARE. 37 */ 38 39 #ifndef IRDMA_ABI_H 40 #define IRDMA_ABI_H 41 42 #include <linux/types.h> 43 44 /* irdma must support legacy GEN_1 i40iw kernel 45 * and user-space whose last ABI ver is 5 46 */ 47 #define IRDMA_ABI_VER 5 48 49 enum irdma_memreg_type { 50 IRDMA_MEMREG_TYPE_MEM = 0, 51 IRDMA_MEMREG_TYPE_QP = 1, 52 IRDMA_MEMREG_TYPE_CQ = 2, 53 }; 54 55 enum { 56 IRDMA_ALLOC_UCTX_USE_RAW_ATTR = 1 << 0, 57 }; 58 59 struct irdma_alloc_ucontext_req { 60 __u32 rsvd32; 61 __u8 userspace_ver; 62 __u8 rsvd8[3]; 63 __aligned_u64 comp_mask; 64 }; 65 66 struct irdma_alloc_ucontext_resp { 67 __u32 max_pds; 68 __u32 max_qps; 69 __u32 wq_size; /* size of the WQs (SQ+RQ) in the mmaped area */ 70 __u8 kernel_ver; 71 __u8 rsvd[3]; 72 __aligned_u64 feature_flags; 73 __aligned_u64 db_mmap_key; 74 __u32 max_hw_wq_frags; 75 __u32 max_hw_read_sges; 76 __u32 max_hw_inline; 77 __u32 max_hw_rq_quanta; 78 __u32 max_hw_wq_quanta; 79 __u32 min_hw_cq_size; 80 __u32 max_hw_cq_size; 81 __u16 max_hw_sq_chunk; 82 __u8 hw_rev; 83 __u8 rsvd2; 84 __aligned_u64 comp_mask; 85 }; 86 87 struct irdma_alloc_pd_resp { 88 __u32 pd_id; 89 __u8 rsvd[4]; 90 }; 91 92 struct irdma_resize_cq_req { 93 __aligned_u64 user_cq_buffer; 94 }; 95 96 struct irdma_create_cq_req { 97 __aligned_u64 user_cq_buf; 98 __aligned_u64 user_shadow_area; 99 }; 100 101 struct irdma_create_qp_req { 102 __aligned_u64 user_wqe_bufs; 103 __aligned_u64 user_compl_ctx; 104 }; 105 106 struct irdma_mem_reg_req { 107 __u16 reg_type; /* enum irdma_memreg_type */ 108 __u16 cq_pages; 109 __u16 rq_pages; 110 __u16 sq_pages; 111 }; 112 113 struct irdma_modify_qp_req { 114 __u8 sq_flush; 115 __u8 rq_flush; 116 __u8 rsvd[6]; 117 }; 118 119 struct irdma_create_cq_resp { 120 __u32 cq_id; 121 __u32 cq_size; 122 }; 123 124 struct irdma_create_qp_resp { 125 __u32 qp_id; 126 __u32 actual_sq_size; 127 __u32 actual_rq_size; 128 __u32 irdma_drv_opt; 129 __u16 push_idx; 130 __u8 lsmm; 131 __u8 rsvd; 132 __u32 qp_caps; 133 }; 134 135 struct irdma_modify_qp_resp { 136 __aligned_u64 push_wqe_mmap_key; 137 __aligned_u64 push_db_mmap_key; 138 __u16 push_offset; 139 __u8 push_valid; 140 __u8 rd_fence_rate; 141 __u8 rsvd[4]; 142 }; 143 144 struct irdma_create_ah_resp { 145 __u32 ah_id; 146 __u8 rsvd[4]; 147 }; 148 #endif /* IRDMA_ABI_H */ 149