xref: /freebsd/sys/dev/irdma/irdma_main.h (revision 5d3e7166)
1 /*-
2  * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
3  *
4  * Copyright (c) 2015 - 2022 Intel Corporation
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenFabrics.org BSD license below:
11  *
12  *   Redistribution and use in source and binary forms, with or
13  *   without modification, are permitted provided that the following
14  *   conditions are met:
15  *
16  *    - Redistributions of source code must retain the above
17  *	copyright notice, this list of conditions and the following
18  *	disclaimer.
19  *
20  *    - Redistributions in binary form must reproduce the above
21  *	copyright notice, this list of conditions and the following
22  *	disclaimer in the documentation and/or other materials
23  *	provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34 /*$FreeBSD$*/
35 
36 #ifndef IRDMA_MAIN_H
37 #define IRDMA_MAIN_H
38 
39 #include <linux/in.h>
40 #include <netinet/ip6.h>
41 #include <netinet/udp.h>
42 #include <netinet/tcp.h>
43 #include <sys/socket.h>
44 #include <netinet/if_ether.h>
45 #include <linux/slab.h>
46 #include <linux/rculist.h>
47 #if __FreeBSD_version >= 1400000
48 #include <rdma/uverbs_ioctl.h>
49 #endif
50 #include <rdma/ib_smi.h>
51 #include <rdma/ib_verbs.h>
52 #include <rdma/ib_pack.h>
53 #include <rdma/rdma_cm.h>
54 #include <rdma/iw_cm.h>
55 #include <rdma/ib_user_verbs.h>
56 #include <rdma/ib_umem.h>
57 #include <rdma/ib_cache.h>
58 #include "osdep.h"
59 #include "irdma_defs.h"
60 #include "irdma_hmc.h"
61 #include "irdma_type.h"
62 #include "irdma_ws.h"
63 #include "irdma_protos.h"
64 #include "irdma_pble.h"
65 #include "irdma_cm.h"
66 #include "fbsd_kcompat.h"
67 #include "irdma-abi.h"
68 #include "irdma_verbs.h"
69 #include "irdma_user.h"
70 #include "irdma_puda.h"
71 
72 extern struct list_head irdma_handlers;
73 extern spinlock_t irdma_handler_lock;
74 extern bool irdma_upload_context;
75 
76 #define IRDMA_FW_VER_DEFAULT	2
77 #define IRDMA_HW_VER	        2
78 
79 #define IRDMA_ARP_ADD		1
80 #define IRDMA_ARP_DELETE	2
81 #define IRDMA_ARP_RESOLVE	3
82 
83 #define IRDMA_MACIP_ADD		1
84 #define IRDMA_MACIP_DELETE	2
85 
86 #define IW_CCQ_SIZE	(IRDMA_CQP_SW_SQSIZE_2048 + 1)
87 #define IW_CEQ_SIZE	2048
88 #define IW_AEQ_SIZE	2048
89 
90 #define RX_BUF_SIZE	(1536 + 8)
91 #define IW_REG0_SIZE	(4 * 1024)
92 #define IW_TX_TIMEOUT	(6 * HZ)
93 #define IW_FIRST_QPN	1
94 
95 #define IW_SW_CONTEXT_ALIGN	1024
96 
97 #define MAX_DPC_ITERATIONS	128
98 
99 #define IRDMA_EVENT_TIMEOUT_MS		5000
100 #define IRDMA_VCHNL_EVENT_TIMEOUT_MS	10000
101 #define IRDMA_RST_TIMEOUT_HZ		4
102 
103 #define	IRDMA_NO_QSET	0xffff
104 
105 #define IW_CFG_FPM_QP_COUNT		32768
106 #define IRDMA_MAX_PAGES_PER_FMR		262144
107 #define IRDMA_MIN_PAGES_PER_FMR		1
108 #define IRDMA_CQP_COMPL_RQ_WQE_FLUSHED	2
109 #define IRDMA_CQP_COMPL_SQ_WQE_FLUSHED	3
110 
111 #define IRDMA_Q_TYPE_PE_AEQ	0x80
112 #define IRDMA_Q_INVALID_IDX	0xffff
113 #define IRDMA_REM_ENDPOINT_TRK_QPID	3
114 
115 #define IRDMA_DRV_OPT_ENA_MPA_VER_0		0x00000001
116 #define IRDMA_DRV_OPT_DISABLE_MPA_CRC		0x00000002
117 #define IRDMA_DRV_OPT_DISABLE_FIRST_WRITE	0x00000004
118 #define IRDMA_DRV_OPT_DISABLE_INTF		0x00000008
119 #define IRDMA_DRV_OPT_ENA_MSI			0x00000010
120 #define IRDMA_DRV_OPT_DUAL_LOGICAL_PORT		0x00000020
121 #define IRDMA_DRV_OPT_NO_INLINE_DATA		0x00000080
122 #define IRDMA_DRV_OPT_DISABLE_INT_MOD		0x00000100
123 #define IRDMA_DRV_OPT_DISABLE_VIRT_WQ		0x00000200
124 #define IRDMA_DRV_OPT_ENA_PAU			0x00000400
125 #define IRDMA_DRV_OPT_MCAST_LOGPORT_MAP		0x00000800
126 
127 #define IW_HMC_OBJ_TYPE_NUM	ARRAY_SIZE(iw_hmc_obj_types)
128 #define IRDMA_ROCE_CWND_DEFAULT			0x400
129 #define IRDMA_ROCE_ACKCREDS_DEFAULT		0x1E
130 
131 #define IRDMA_FLUSH_SQ		BIT(0)
132 #define IRDMA_FLUSH_RQ		BIT(1)
133 #define IRDMA_REFLUSH		BIT(2)
134 #define IRDMA_FLUSH_WAIT	BIT(3)
135 
136 #define IRDMA_IRQ_NAME_STR_LEN 64
137 
138 enum init_completion_state {
139 	INVALID_STATE = 0,
140 	INITIAL_STATE,
141 	CQP_CREATED,
142 	HMC_OBJS_CREATED,
143 	HW_RSRC_INITIALIZED,
144 	CCQ_CREATED,
145 	CEQ0_CREATED, /* Last state of probe */
146 	ILQ_CREATED,
147 	IEQ_CREATED,
148 	REM_ENDPOINT_TRK_CREATED,
149 	CEQS_CREATED,
150 	PBLE_CHUNK_MEM,
151 	AEQ_CREATED,
152 	IP_ADDR_REGISTERED,  /* Last state of open */
153 };
154 
155 struct irdma_rsrc_limits {
156 	u32 qplimit;
157 	u32 mrlimit;
158 	u32 cqlimit;
159 };
160 
161 struct irdma_cqp_err_info {
162 	u16 maj;
163 	u16 min;
164 	const char *desc;
165 };
166 
167 struct irdma_cqp_compl_info {
168 	u32 op_ret_val;
169 	u16 maj_err_code;
170 	u16 min_err_code;
171 	bool error;
172 	u8 op_code;
173 };
174 
175 struct irdma_cqp_request {
176 	struct cqp_cmds_info info;
177 	wait_queue_head_t waitq;
178 	struct list_head list;
179 	atomic_t refcnt;
180 	void (*callback_fcn)(struct irdma_cqp_request *cqp_request);
181 	void *param;
182 	struct irdma_cqp_compl_info compl_info;
183 	bool waiting:1;
184 	bool request_done:1;
185 	bool dynamic:1;
186 };
187 
188 struct irdma_cqp {
189 	struct irdma_sc_cqp sc_cqp;
190 	spinlock_t req_lock; /* protect CQP request list */
191 	spinlock_t compl_lock; /* protect CQP completion processing */
192 	wait_queue_head_t waitq;
193 	wait_queue_head_t remove_wq;
194 	struct irdma_dma_mem sq;
195 	struct irdma_dma_mem host_ctx;
196 	u64 *scratch_array;
197 	struct irdma_cqp_request *cqp_requests;
198 	struct list_head cqp_avail_reqs;
199 	struct list_head cqp_pending_reqs;
200 };
201 
202 struct irdma_ccq {
203 	struct irdma_sc_cq sc_cq;
204 	struct irdma_dma_mem mem_cq;
205 	struct irdma_dma_mem shadow_area;
206 };
207 
208 struct irdma_ceq {
209 	struct irdma_sc_ceq sc_ceq;
210 	struct irdma_dma_mem mem;
211 	u32 irq;
212 	u32 msix_idx;
213 	struct irdma_pci_f *rf;
214 	struct tasklet_struct dpc_tasklet;
215 	spinlock_t ce_lock; /* sync cq destroy with cq completion event notification */
216 };
217 
218 struct irdma_aeq {
219 	struct irdma_sc_aeq sc_aeq;
220 	struct irdma_dma_mem mem;
221 	struct irdma_pble_alloc palloc;
222 	bool virtual_map;
223 };
224 
225 struct irdma_arp_entry {
226 	u32 ip_addr[4];
227 	u8 mac_addr[ETH_ALEN];
228 };
229 
230 struct irdma_msix_vector {
231 	u32 idx;
232 	u32 irq;
233 	u32 cpu_affinity;
234 	u32 ceq_id;
235 	char name[IRDMA_IRQ_NAME_STR_LEN];
236 	struct resource *res;
237 	void  *tag;
238 };
239 
240 struct irdma_mc_table_info {
241 	u32 mgn;
242 	u32 dest_ip[4];
243 	bool lan_fwd:1;
244 	bool ipv4_valid:1;
245 };
246 
247 struct mc_table_list {
248 	struct list_head list;
249 	struct irdma_mc_table_info mc_info;
250 	struct irdma_mcast_grp_info mc_grp_ctx;
251 };
252 
253 struct irdma_qv_info {
254 	u32 v_idx; /* msix_vector */
255 	u16 ceq_idx;
256 	u16 aeq_idx;
257 	u8 itr_idx;
258 };
259 
260 struct irdma_qvlist_info {
261 	u32 num_vectors;
262 	struct irdma_qv_info qv_info[1];
263 };
264 
265 struct irdma_gen_ops {
266 	void (*request_reset)(struct irdma_pci_f *rf);
267 	int (*register_qset)(struct irdma_sc_vsi *vsi,
268 			     struct irdma_ws_node *tc_node);
269 	void (*unregister_qset)(struct irdma_sc_vsi *vsi,
270 				struct irdma_ws_node *tc_node);
271 };
272 
273 struct irdma_pci_f {
274 	bool reset:1;
275 	bool rsrc_created:1;
276 	bool msix_shared:1;
277 	bool ftype:1;
278 	u8 rsrc_profile;
279 	u8 *hmc_info_mem;
280 	u8 *mem_rsrc;
281 	u8 rdma_ver;
282 	u8 rst_to;
283 	/* Not used in SRIOV VF mode */
284 	u8 pf_id;
285 	enum irdma_protocol_used protocol_used;
286 	bool en_rem_endpoint_trk:1;
287 	bool dcqcn_ena:1;
288 	u32 sd_type;
289 	u32 msix_count;
290 	u32 max_mr;
291 	u32 max_qp;
292 	u32 max_cq;
293 	u32 max_ah;
294 	u32 next_ah;
295 	u32 max_mcg;
296 	u32 next_mcg;
297 	u32 max_pd;
298 	u32 next_qp;
299 	u32 next_cq;
300 	u32 next_pd;
301 	u32 max_mr_size;
302 	u32 max_cqe;
303 	u32 mr_stagmask;
304 	u32 used_pds;
305 	u32 used_cqs;
306 	u32 used_mrs;
307 	u32 used_qps;
308 	u32 arp_table_size;
309 	u32 next_arp_index;
310 	u32 ceqs_count;
311 	u32 next_ws_node_id;
312 	u32 max_ws_node_id;
313 	u32 limits_sel;
314 	unsigned long *allocated_ws_nodes;
315 	unsigned long *allocated_qps;
316 	unsigned long *allocated_cqs;
317 	unsigned long *allocated_mrs;
318 	unsigned long *allocated_pds;
319 	unsigned long *allocated_mcgs;
320 	unsigned long *allocated_ahs;
321 	unsigned long *allocated_arps;
322 	enum init_completion_state init_state;
323 	struct irdma_sc_dev sc_dev;
324 	struct irdma_dev_ctx dev_ctx;
325 	struct irdma_tunable_info tun_info;
326 	eventhandler_tag irdma_ifaddr_event;
327 	struct irdma_handler *hdl;
328 	struct pci_dev *pcidev;
329 	struct ice_rdma_peer *peer_info;
330 	struct irdma_hw hw;
331 	struct irdma_cqp cqp;
332 	struct irdma_ccq ccq;
333 	struct irdma_aeq aeq;
334 	struct irdma_ceq *ceqlist;
335 	struct irdma_hmc_pble_rsrc *pble_rsrc;
336 	struct irdma_arp_entry *arp_table;
337 	spinlock_t arp_lock; /*protect ARP table access*/
338 	spinlock_t rsrc_lock; /* protect HW resource array access */
339 	spinlock_t qptable_lock; /*protect QP table access*/
340 	spinlock_t cqtable_lock; /*protect CQ table access*/
341 	struct irdma_qp **qp_table;
342 	struct irdma_cq **cq_table;
343 	spinlock_t qh_list_lock; /* protect mc_qht_list */
344 	struct mc_table_list mc_qht_list;
345 	struct irdma_msix_vector *iw_msixtbl;
346 	struct irdma_qvlist_info *iw_qvlist;
347 	struct tasklet_struct dpc_tasklet;
348 	struct msix_entry msix_info;
349 	struct irdma_dma_mem obj_mem;
350 	struct irdma_dma_mem obj_next;
351 	atomic_t vchnl_msgs;
352 	wait_queue_head_t vchnl_waitq;
353 	struct workqueue_struct *cqp_cmpl_wq;
354 	struct work_struct cqp_cmpl_work;
355 	struct irdma_sc_vsi default_vsi;
356 	void *back_fcn;
357 	struct irdma_gen_ops gen_ops;
358 	void (*check_fc)(struct irdma_sc_vsi *vsi, struct irdma_sc_qp *sc_qp);
359 	struct irdma_dcqcn_cc_params dcqcn_params;
360 	struct irdma_device *iwdev;
361 };
362 
363 struct irdma_device {
364 	struct ib_device ibdev;
365 	struct irdma_pci_f *rf;
366 	struct ifnet *netdev;
367 	struct notifier_block nb_netdevice_event;
368 	struct irdma_handler *hdl;
369 	struct workqueue_struct *cleanup_wq;
370 	struct irdma_sc_vsi vsi;
371 	struct irdma_cm_core cm_core;
372 	u32 roce_cwnd;
373 	u32 roce_ackcreds;
374 	u32 vendor_id;
375 	u32 vendor_part_id;
376 	u32 push_mode;
377 	u32 rcv_wnd;
378 	u16 mac_ip_table_idx;
379 	u16 vsi_num;
380 	u8 rcv_wscale;
381 	u8 iw_status;
382 	u8 roce_rtomin;
383 	u8 rd_fence_rate;
384 	bool override_rcv_wnd:1;
385 	bool override_cwnd:1;
386 	bool override_ackcreds:1;
387 	bool override_ooo:1;
388 	bool override_rd_fence_rate:1;
389 	bool override_rtomin:1;
390 	bool roce_mode:1;
391 	bool roce_dcqcn_en:1;
392 	bool dcb_vlan_mode:1;
393 	bool iw_ooo:1;
394 	enum init_completion_state init_state;
395 
396 	wait_queue_head_t suspend_wq;
397 };
398 
399 struct irdma_handler {
400 	struct list_head list;
401 	struct irdma_device *iwdev;
402 	struct task deferred_task;
403 	struct taskqueue *deferred_tq;
404 	bool shared_res_created;
405 };
406 
407 static inline struct irdma_device *to_iwdev(struct ib_device *ibdev)
408 {
409 	return container_of(ibdev, struct irdma_device, ibdev);
410 }
411 
412 static inline struct irdma_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
413 {
414 	return container_of(ibucontext, struct irdma_ucontext, ibucontext);
415 }
416 
417 #if __FreeBSD_version >= 1400026
418 static inline struct irdma_user_mmap_entry *
419 to_irdma_mmap_entry(struct rdma_user_mmap_entry *rdma_entry)
420 {
421 	return container_of(rdma_entry, struct irdma_user_mmap_entry,
422 			    rdma_entry);
423 }
424 
425 #endif
426 static inline struct irdma_pd *to_iwpd(struct ib_pd *ibpd)
427 {
428 	return container_of(ibpd, struct irdma_pd, ibpd);
429 }
430 
431 static inline struct irdma_ah *to_iwah(struct ib_ah *ibah)
432 {
433 	return container_of(ibah, struct irdma_ah, ibah);
434 }
435 
436 static inline struct irdma_mr *to_iwmr(struct ib_mr *ibmr)
437 {
438 	return container_of(ibmr, struct irdma_mr, ibmr);
439 }
440 
441 static inline struct irdma_mr *to_iwmw(struct ib_mw *ibmw)
442 {
443 	return container_of(ibmw, struct irdma_mr, ibmw);
444 }
445 
446 static inline struct irdma_cq *to_iwcq(struct ib_cq *ibcq)
447 {
448 	return container_of(ibcq, struct irdma_cq, ibcq);
449 }
450 
451 static inline struct irdma_qp *to_iwqp(struct ib_qp *ibqp)
452 {
453 	return container_of(ibqp, struct irdma_qp, ibqp);
454 }
455 
456 static inline struct irdma_pci_f *dev_to_rf(struct irdma_sc_dev *dev)
457 {
458 	return container_of(dev, struct irdma_pci_f, sc_dev);
459 }
460 
461 /**
462  * irdma_alloc_resource - allocate a resource
463  * @iwdev: device pointer
464  * @resource_array: resource bit array:
465  * @max_resources: maximum resource number
466  * @req_resources_num: Allocated resource number
467  * @next: next free id
468  **/
469 static inline int irdma_alloc_rsrc(struct irdma_pci_f *rf,
470 				   unsigned long *rsrc_array, u32 max_rsrc,
471 				   u32 *req_rsrc_num, u32 *next)
472 {
473 	u32 rsrc_num;
474 	unsigned long flags;
475 
476 	spin_lock_irqsave(&rf->rsrc_lock, flags);
477 	rsrc_num = find_next_zero_bit(rsrc_array, max_rsrc, *next);
478 	if (rsrc_num >= max_rsrc) {
479 		rsrc_num = find_first_zero_bit(rsrc_array, max_rsrc);
480 		if (rsrc_num >= max_rsrc) {
481 			spin_unlock_irqrestore(&rf->rsrc_lock, flags);
482 			irdma_debug(&rf->sc_dev, IRDMA_DEBUG_ERR,
483 				    "resource [%d] allocation failed\n",
484 				    rsrc_num);
485 			return -EOVERFLOW;
486 		}
487 	}
488 	__set_bit(rsrc_num, rsrc_array);
489 	*next = rsrc_num + 1;
490 	if (*next == max_rsrc)
491 		*next = 0;
492 	*req_rsrc_num = rsrc_num;
493 	spin_unlock_irqrestore(&rf->rsrc_lock, flags);
494 
495 	return 0;
496 }
497 
498 /**
499  * irdma_free_resource - free a resource
500  * @iwdev: device pointer
501  * @resource_array: resource array for the resource_num
502  * @resource_num: resource number to free
503  **/
504 static inline void irdma_free_rsrc(struct irdma_pci_f *rf,
505 				   unsigned long *rsrc_array, u32 rsrc_num)
506 {
507 	unsigned long flags;
508 
509 	spin_lock_irqsave(&rf->rsrc_lock, flags);
510 	__clear_bit(rsrc_num, rsrc_array);
511 	spin_unlock_irqrestore(&rf->rsrc_lock, flags);
512 }
513 
514 int irdma_ctrl_init_hw(struct irdma_pci_f *rf);
515 void irdma_ctrl_deinit_hw(struct irdma_pci_f *rf);
516 int irdma_rt_init_hw(struct irdma_device *iwdev,
517 		     struct irdma_l2params *l2params);
518 void irdma_rt_deinit_hw(struct irdma_device *iwdev);
519 void irdma_qp_add_ref(struct ib_qp *ibqp);
520 void irdma_qp_rem_ref(struct ib_qp *ibqp);
521 void irdma_free_lsmm_rsrc(struct irdma_qp *iwqp);
522 struct ib_qp *irdma_get_qp(struct ib_device *ibdev, int qpn);
523 void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask);
524 void irdma_manage_arp_cache(struct irdma_pci_f *rf, const unsigned char *mac_addr,
525 			    u32 *ip_addr, u32 action);
526 struct irdma_apbvt_entry *irdma_add_apbvt(struct irdma_device *iwdev, u16 port);
527 void irdma_del_apbvt(struct irdma_device *iwdev,
528 		     struct irdma_apbvt_entry *entry);
529 struct irdma_cqp_request *irdma_alloc_and_get_cqp_request(struct irdma_cqp *cqp,
530 							  bool wait);
531 void irdma_free_cqp_request(struct irdma_cqp *cqp,
532 			    struct irdma_cqp_request *cqp_request);
533 void irdma_put_cqp_request(struct irdma_cqp *cqp,
534 			   struct irdma_cqp_request *cqp_request);
535 int irdma_alloc_local_mac_entry(struct irdma_pci_f *rf, u16 *mac_tbl_idx);
536 int irdma_add_local_mac_entry(struct irdma_pci_f *rf, const u8 *mac_addr, u16 idx);
537 void irdma_del_local_mac_entry(struct irdma_pci_f *rf, u16 idx);
538 
539 u32 irdma_initialize_hw_rsrc(struct irdma_pci_f *rf);
540 void irdma_port_ibevent(struct irdma_device *iwdev);
541 void irdma_cm_disconn(struct irdma_qp *qp);
542 
543 bool irdma_cqp_crit_err(struct irdma_sc_dev *dev, u8 cqp_cmd,
544 			u16 maj_err_code, u16 min_err_code);
545 int irdma_handle_cqp_op(struct irdma_pci_f *rf,
546 			struct irdma_cqp_request *cqp_request);
547 
548 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
549 		    struct ib_udata *udata);
550 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
551 			 int attr_mask, struct ib_udata *udata);
552 void irdma_cq_add_ref(struct ib_cq *ibcq);
553 void irdma_cq_rem_ref(struct ib_cq *ibcq);
554 void irdma_cq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
555 
556 void irdma_cleanup_pending_cqp_op(struct irdma_pci_f *rf);
557 int irdma_hw_modify_qp(struct irdma_device *iwdev, struct irdma_qp *iwqp,
558 		       struct irdma_modify_qp_info *info, bool wait);
559 int irdma_qp_suspend_resume(struct irdma_sc_qp *qp, bool suspend);
560 int irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo,
561 		       enum irdma_quad_entry_type etype,
562 		       enum irdma_quad_hash_manage_type mtype, void *cmnode,
563 		       bool wait);
564 void irdma_receive_ilq(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *rbuf);
565 void irdma_free_sqbuf(struct irdma_sc_vsi *vsi, void *bufp);
566 void irdma_free_qp_rsrc(struct irdma_qp *iwqp);
567 int irdma_setup_cm_core(struct irdma_device *iwdev, u8 ver);
568 void irdma_cleanup_cm_core(struct irdma_cm_core *cm_core);
569 void irdma_next_iw_state(struct irdma_qp *iwqp, u8 state, u8 del_hash, u8 term,
570 			 u8 term_len);
571 int irdma_send_syn(struct irdma_cm_node *cm_node, u32 sendack);
572 int irdma_send_reset(struct irdma_cm_node *cm_node);
573 struct irdma_cm_node *irdma_find_node(struct irdma_cm_core *cm_core,
574 				      u16 rem_port, u32 *rem_addr, u16 loc_port,
575 				      u32 *loc_addr, u16 vlan_id);
576 int irdma_hw_flush_wqes(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
577 			struct irdma_qp_flush_info *info, bool wait);
578 void irdma_gen_ae(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
579 		  struct irdma_gen_ae_info *info, bool wait);
580 void irdma_copy_ip_ntohl(u32 *dst, __be32 *src);
581 void irdma_copy_ip_htonl(__be32 *dst, u32 *src);
582 u16 irdma_get_vlan_ipv4(u32 *addr);
583 struct ifnet *irdma_netdev_vlan_ipv6(u32 *addr, u16 *vlan_id, u8 *mac);
584 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *ib_pd, u64 addr, u64 size,
585 				int acc, u64 *iova_start);
586 int irdma_upload_qp_context(struct irdma_qp *iwqp, bool freeze, bool raw);
587 void irdma_del_hmc_objects(struct irdma_sc_dev *dev,
588 			   struct irdma_hmc_info *hmc_info, bool privileged,
589 			   bool reset, enum irdma_vers vers);
590 void irdma_cqp_ce_handler(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
591 int irdma_ah_cqp_op(struct irdma_pci_f *rf, struct irdma_sc_ah *sc_ah, u8 cmd,
592 		    bool wait,
593 		    void (*callback_fcn)(struct irdma_cqp_request *cqp_request),
594 		    void *cb_param);
595 void irdma_gsi_ud_qp_ah_cb(struct irdma_cqp_request *cqp_request);
596 void irdma_udqp_qs_worker(struct work_struct *work);
597 bool irdma_cq_empty(struct irdma_cq *iwcq);
598 int irdma_netdevice_event(struct notifier_block *notifier, unsigned long event,
599 			  void *ptr);
600 void irdma_unregister_notifiers(struct irdma_device *iwdev);
601 int irdma_register_notifiers(struct irdma_device *iwdev);
602 void irdma_set_rf_user_cfg_params(struct irdma_pci_f *rf);
603 void irdma_add_ip(struct irdma_device *iwdev);
604 void irdma_add_handler(struct irdma_handler *hdl);
605 void irdma_del_handler(struct irdma_handler *hdl);
606 void cqp_compl_worker(struct work_struct *work);
607 void irdma_cleanup_dead_qps(struct irdma_sc_vsi *vsi);
608 #endif /* IRDMA_MAIN_H */
609