1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
3  *
4  * This file is provided under a dual BSD/GPLv2 license.  When using or
5  * redistributing this file, you may do so under either license.
6  *
7  * GPL LICENSE SUMMARY
8  *
9  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of version 2 of the GNU General Public License as
13  * published by the Free Software Foundation.
14  *
15  * This program is distributed in the hope that it will be useful, but
16  * WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18  * General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
23  * The full GNU General Public License is included in this distribution
24  * in the file called LICENSE.GPL.
25  *
26  * BSD LICENSE
27  *
28  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
29  * All rights reserved.
30  *
31  * Redistribution and use in source and binary forms, with or without
32  * modification, are permitted provided that the following conditions
33  * are met:
34  *
35  *   * Redistributions of source code must retain the above copyright
36  *     notice, this list of conditions and the following disclaimer.
37  *   * Redistributions in binary form must reproduce the above copyright
38  *     notice, this list of conditions and the following disclaimer in
39  *     the documentation and/or other materials provided with the
40  *     distribution.
41  *
42  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
43  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
44  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
45  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
46  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
47  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
48  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
49  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
51  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53  */
54 #ifndef _SCIC_SDS_PHY_REGISTERS_H_
55 #define _SCIC_SDS_PHY_REGISTERS_H_
56 
57 /**
58  * @file
59  *
60  * @brief This file contains the macros used by the phy object to read/write
61  *        to the SCU link layer registers.
62  */
63 
64 #ifdef __cplusplus
65 extern "C" {
66 #endif // __cplusplus
67 
68 #include <dev/isci/scil/scic_sds_controller.h>
69 
70 //*****************************************************************************
71 //* SCU LINK LAYER REGISTER OPERATIONS
72 //*****************************************************************************
73 
74 /**
75  * Macro to read the transport layer register associated with this phy
76  * object.
77  */
78 #define scu_transport_layer_read(phy, reg) \
79    scu_register_read( \
80       scic_sds_phy_get_controller(phy), \
81       (phy)->transport_layer_registers->reg \
82    )
83 
84 /**
85  * Macro to write the transport layer register associated with this phy
86  * object.
87  */
88 #define scu_transport_layer_write(phy, reg, value) \
89    scu_register_write( \
90       scic_sds_phy_get_controller(phy), \
91       (phy)->transport_layer_registers->reg, \
92       (value) \
93    )
94 
95 //****************************************************************************
96 //* Transport Layer registers controlled by the phy object
97 //****************************************************************************
98 
99 /**
100  * This macro reads the Transport layer control register
101  */
102 #define SCU_TLCR_READ(phy) \
103    scu_transport_layer_read(phy, control)
104 
105 /**
106  * This macro writes the Transport layer control register
107  */
108 #define SCU_TLCR_WRITE(phy, value) \
109    scu_transport_layer_write(phy, control, value)
110 
111 /**
112  * This macro reads the Transport layer address translation register
113  */
114 #define SCU_TLADTR_READ(phy) \
115    scu_transport_layer_read(phy, address_translation)
116 
117 /**
118  * This macro writes the Transport layer address translation register
119  */
120 #define SCU_TLADTR_WRITE(phy) \
121    scu_transport_layer_write(phy, address_translation, value)
122 
123 /**
124  * This macro writes the STP Transport Layer Direct Attached RNi register.
125  */
126 #define SCU_STPTLDARNI_WRITE(phy, index) \
127    scu_transport_layer_write(phy, stp_rni, index)
128 
129 /**
130  * This macro reads the STP Transport Layer Direct Attached RNi register.
131  */
132 #define SCU_STPTLDARNI_READ(phy) \
133    scu_transport_layer_read(phy, stp_rni)
134 
135 //*****************************************************************************
136 //* SCU LINK LAYER REGISTER OPERATIONS
137 //*****************************************************************************
138 
139 /**
140  * THis macro requests the SCU register write for the specified link layer
141  * register.
142  */
143 #define scu_link_layer_register_read(phy, reg) \
144    scu_register_read( \
145       scic_sds_phy_get_controller(phy), \
146       (phy)->link_layer_registers->reg \
147    )
148 
149 /**
150  * This macro requests the SCU register read for the specified link layer
151  * register.
152  */
153 #define scu_link_layer_register_write(phy, reg, value) \
154    scu_register_write( \
155       scic_sds_phy_get_controller(phy), \
156       (phy)->link_layer_registers->reg, \
157       (value) \
158    )
159 
160 //*****************************************************************************
161 //* SCU LINK LAYER REGISTERS
162 //*****************************************************************************
163 
164 /// This macro reads from the SAS Identify Frame PHY Identifier register
165 #define SCU_SAS_TIPID_READ(phy) \
166     scu_link_layer_register_read(phy, identify_frame_phy_id)
167 
168 /// This macro writes to the SAS Identify Frame PHY Identifier register
169 #define SCU_SAS_TIPID_WRITE(phy, value) \
170     scu_link_layer_register_write(phy, identify_frame_phy_id, value)
171 
172 /// This macro reads from the SAS Identification register
173 #define SCU_SAS_TIID_READ(phy) \
174     scu_link_layer_register_read(phy, transmit_identification)
175 
176 /// This macro writes to the SAS Identification register
177 #define SCU_SAS_TIID_WRITE(phy, value) \
178     scu_link_layer_register_write(phy, transmit_identification, value)
179 
180 /// This macro reads the SAS Device Name High register
181 #define SCU_SAS_TIDNH_READ(phy) \
182     scu_link_layer_register_read(phy, sas_device_name_high)
183 
184 /// This macro writes the SAS Device Name High register
185 #define SCU_SAS_TIDNH_WRITE(phy, value) \
186     scu_link_layer_register_write(phy, sas_device_name_high, value)
187 
188 /// This macro reads the SAS Device Name Low register
189 #define SCU_SAS_TIDNL_READ(phy) \
190     scu_link_layer_register_read(phy, sas_device_name_low)
191 
192 /// This macro writes the SAS Device Name Low register
193 #define SCU_SAS_TIDNL_WRITE(phy, value) \
194     scu_link_layer_register_write(phy, sas_device_name_low, value)
195 
196 /// This macro reads the Source SAS Address High register
197 #define SCU_SAS_TISSAH_READ(phy) \
198     scu_link_layer_register_read(phy, source_sas_address_high)
199 
200 /// This macro writes the Source SAS Address High register
201 #define SCU_SAS_TISSAH_WRITE(phy, value) \
202     scu_link_layer_register_write(phy, source_sas_address_high, value)
203 
204 /// This macro reads the Source SAS Address Low register
205 #define SCU_SAS_TISSAL_READ(phy) \
206     scu_link_layer_register_read(phy, source_sas_address_low)
207 
208 /// This macro writes the Source SAS Address Low register
209 #define SCU_SAS_TISSAL_WRITE(phy, value) \
210     scu_link_layer_register_write(phy, source_sas_address_low, value)
211 
212 /// This macro reads the PHY Configuration register
213 #define SCU_SAS_PCFG_READ(phy) \
214     scu_link_layer_register_read(phy, phy_configuration);
215 
216 /// This macro writes the PHY Configuration register
217 #define SCU_SAS_PCFG_WRITE(phy, value) \
218     scu_link_layer_register_write(phy, phy_configuration, value)
219 
220 /// This macro reads the PHY Enable Spinup register
221 #define SCU_SAS_ENSPINUP_READ(phy) \
222     scu_link_layer_register_read(phy, notify_enable_spinup_control)
223 
224 /// This macro writes the PHY Enable Spinup register
225 #define SCU_SAS_ENSPINUP_WRITE(phy, value) \
226     scu_link_layer_register_write(phy, notify_enable_spinup_control, value)
227 
228 /// This macro reads the CLKSM register
229 #define SCU_SAS_CLKSM_READ(phy) \
230     scu_link_layer_register_read(phy, clock_skew_management)
231 
232 /// This macro writes the CLKSM register
233 #define SCU_SAS_CLKSM_WRITE(phy, value) \
234     scu_link_layer_register_write(phy, clock_skew_management, value)
235 
236 /// This macro reads the PHY Capacity register
237 #define SCU_SAS_PHYCAP_READ(phy) \
238     scu_link_layer_register_read(phy, phy_capabilities)
239 
240 /// This macro writes the PHY Capacity register
241 #define SCU_SAS_PHYCAP_WRITE(phy, value) \
242     scu_link_layer_register_write(phy, phy_capabilities, value)
243 
244 /// This macro reads the Received PHY Capacity register
245 #define SCU_SAS_RECPHYCAP_READ(phy) \
246     scu_link_layer_register_read(phy, receive_phycap)
247 
248 /// This macro reads the link layer control register
249 #define SCU_SAS_LLCTL_READ(phy) \
250     scu_link_layer_register_read(phy, link_layer_control);
251 
252 /// This macro writes the link layer control register
253 #define SCU_SAS_LLCTL_WRITE(phy, value) \
254     scu_link_layer_register_write(phy, link_layer_control, value);
255 
256 /// This macro reads the link layer status register
257 #define SCU_SAS_LLSTA_READ(phy) \
258     scu_link_layer_register_read(phy, link_layer_status);
259 
260 #define SCU_SAS_ECENCR_READ(phy) \
261     scu_link_layer_register_read(phy, error_counter_event_notification_control)
262 
263 #define SCU_SAS_ECENCR_WRITE(phy, value) \
264     scu_link_layer_register_write(phy, error_counter_event_notification_control, value)
265 
266 #ifdef __cplusplus
267 }
268 #endif // __cplusplus
269 
270 #endif // _SCIC_SDS_PHY_REGISTERS_H_
271