1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-2-Clause 3 * 4 * Copyright (c) 2006 IronPort Systems 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 /*- 29 * Copyright (c) 2007 LSI Corp. 30 * Copyright (c) 2007 Rajesh Prabhakaran. 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 42 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 43 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 44 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 45 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 46 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 47 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 48 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 49 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 50 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 51 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 52 * SUCH DAMAGE. 53 */ 54 55 #include <sys/cdefs.h> 56 __FBSDID("$FreeBSD$"); 57 58 /* PCI/PCI-X/PCIe bus interface for the LSI MegaSAS controllers */ 59 60 #include "opt_mfi.h" 61 62 #include <sys/param.h> 63 #include <sys/bio.h> 64 #include <sys/bus.h> 65 #include <sys/conf.h> 66 #include <sys/eventhandler.h> 67 #include <sys/kernel.h> 68 #include <sys/lock.h> 69 #include <sys/module.h> 70 #include <sys/malloc.h> 71 #include <sys/mutex.h> 72 #include <sys/selinfo.h> 73 #include <sys/sysctl.h> 74 #include <sys/systm.h> 75 #include <sys/uio.h> 76 77 #include <machine/bus.h> 78 #include <machine/resource.h> 79 #include <sys/rman.h> 80 81 #include <dev/pci/pcireg.h> 82 #include <dev/pci/pcivar.h> 83 84 #include <dev/mfi/mfireg.h> 85 #include <dev/mfi/mfi_ioctl.h> 86 #include <dev/mfi/mfivar.h> 87 88 static int mfi_pci_probe(device_t); 89 static int mfi_pci_attach(device_t); 90 static int mfi_pci_detach(device_t); 91 static int mfi_pci_suspend(device_t); 92 static int mfi_pci_resume(device_t); 93 static void mfi_pci_free(struct mfi_softc *); 94 95 static device_method_t mfi_methods[] = { 96 DEVMETHOD(device_probe, mfi_pci_probe), 97 DEVMETHOD(device_attach, mfi_pci_attach), 98 DEVMETHOD(device_detach, mfi_pci_detach), 99 DEVMETHOD(device_suspend, mfi_pci_suspend), 100 DEVMETHOD(device_resume, mfi_pci_resume), 101 102 DEVMETHOD_END 103 }; 104 105 static driver_t mfi_pci_driver = { 106 "mfi", 107 mfi_methods, 108 sizeof(struct mfi_softc) 109 }; 110 111 static int mfi_msi = 1; 112 SYSCTL_INT(_hw_mfi, OID_AUTO, msi, CTLFLAG_RDTUN, &mfi_msi, 0, 113 "Enable use of MSI interrupts"); 114 115 static int mfi_mrsas_enable; 116 SYSCTL_INT(_hw_mfi, OID_AUTO, mrsas_enable, CTLFLAG_RDTUN, &mfi_mrsas_enable, 117 0, "Allow mrasas to take newer cards"); 118 119 struct mfi_ident { 120 uint16_t vendor; 121 uint16_t device; 122 uint16_t subvendor; 123 uint16_t subdevice; 124 int flags; 125 const char *desc; 126 } mfi_identifiers[] = { 127 {0x1000, 0x005b, 0x1028, 0x1fc9, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H840 Adapter"}, 128 {0x1000, 0x005b, 0x1028, 0x1f2d, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H810 Adapter"}, 129 {0x1000, 0x005b, 0x1028, 0x1f30, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Embedded"}, 130 {0x1000, 0x005b, 0x1028, 0x1f31, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Adapter"}, 131 {0x1000, 0x005b, 0x1028, 0x1f33, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Mini (blades)"}, 132 {0x1000, 0x005b, 0x1028, 0x1f34, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710P Mini (monolithics)"}, 133 {0x1000, 0x005b, 0x1028, 0x1f35, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Adapter"}, 134 {0x1000, 0x005b, 0x1028, 0x1f37, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (blades)"}, 135 {0x1000, 0x005b, 0x1028, 0x1f38, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Dell PERC H710 Mini (monolithics)"}, 136 {0x1000, 0x005b, 0x8086, 0x9265, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25DB080"}, 137 {0x1000, 0x005b, 0x8086, 0x9285, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "Intel (R) RAID Controller RS25NB008"}, 138 {0x1000, 0x005b, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS, "ThunderBolt"}, 139 {0x1000, 0x005d, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS| MFI_FLAGS_INVADER, "Invader"}, 140 {0x1000, 0x005f, 0xffff, 0xffff, MFI_FLAGS_SKINNY| MFI_FLAGS_TBOLT| MFI_FLAGS_MRSAS| MFI_FLAGS_FURY, "Fury"}, 141 {0x1000, 0x0060, 0x1028, 0xffff, MFI_FLAGS_1078, "Dell PERC 6"}, 142 {0x1000, 0x0060, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"}, 143 {0x1000, 0x0071, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"}, 144 {0x1000, 0x0073, 0xffff, 0xffff, MFI_FLAGS_SKINNY, "Drake Skinny"}, 145 {0x1000, 0x0078, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"}, 146 {0x1000, 0x0079, 0x1028, 0x1f15, MFI_FLAGS_GEN2, "Dell PERC H800 Adapter"}, 147 {0x1000, 0x0079, 0x1028, 0x1f16, MFI_FLAGS_GEN2, "Dell PERC H700 Adapter"}, 148 {0x1000, 0x0079, 0x1028, 0x1f17, MFI_FLAGS_GEN2, "Dell PERC H700 Integrated"}, 149 {0x1000, 0x0079, 0x1028, 0x1f18, MFI_FLAGS_GEN2, "Dell PERC H700 Modular"}, 150 {0x1000, 0x0079, 0x1028, 0x1f19, MFI_FLAGS_GEN2, "Dell PERC H700"}, 151 {0x1000, 0x0079, 0x1028, 0x1f1a, MFI_FLAGS_GEN2, "Dell PERC H800 Proto Adapter"}, 152 {0x1000, 0x0079, 0x1028, 0x1f1b, MFI_FLAGS_GEN2, "Dell PERC H800"}, 153 {0x1000, 0x0079, 0x1028, 0xffff, MFI_FLAGS_GEN2, "Dell PERC Gen2"}, 154 {0x1000, 0x0079, 0xffff, 0xffff, MFI_FLAGS_GEN2, "LSI MegaSAS Gen2"}, 155 {0x1000, 0x007c, 0xffff, 0xffff, MFI_FLAGS_1078, "LSI MegaSAS 1078"}, 156 {0x1000, 0x0411, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Brocton IOP */ 157 {0x1000, 0x0413, 0xffff, 0xffff, MFI_FLAGS_1064R, "LSI MegaSAS 1064R"}, /* Verde ZCR */ 158 {0x1028, 0x0015, 0xffff, 0xffff, MFI_FLAGS_1064R, "Dell PERC 5/i"}, 159 {0, 0, 0, 0, 0, NULL} 160 }; 161 162 DRIVER_MODULE(mfi, pci, mfi_pci_driver, 0, 0); 163 MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice", pci, mfi, 164 mfi_identifiers, nitems(mfi_identifiers) - 1); 165 MODULE_VERSION(mfi, 1); 166 167 static struct mfi_ident * 168 mfi_find_ident(device_t dev) 169 { 170 struct mfi_ident *m; 171 172 for (m = mfi_identifiers; m->vendor != 0; m++) { 173 if ((m->vendor == pci_get_vendor(dev)) && 174 (m->device == pci_get_device(dev)) && 175 ((m->subvendor == pci_get_subvendor(dev)) || 176 (m->subvendor == 0xffff)) && 177 ((m->subdevice == pci_get_subdevice(dev)) || 178 (m->subdevice == 0xffff))) 179 return (m); 180 } 181 182 return (NULL); 183 } 184 185 static int 186 mfi_pci_probe(device_t dev) 187 { 188 struct mfi_ident *id; 189 190 if ((id = mfi_find_ident(dev)) != NULL) { 191 device_set_desc(dev, id->desc); 192 193 /* give priority to mrsas if tunable set */ 194 if ((id->flags & MFI_FLAGS_MRSAS) && mfi_mrsas_enable) 195 return (BUS_PROBE_LOW_PRIORITY); 196 else 197 return (BUS_PROBE_DEFAULT); 198 } 199 return (ENXIO); 200 } 201 202 static int 203 mfi_pci_attach(device_t dev) 204 { 205 struct mfi_softc *sc; 206 struct mfi_ident *m; 207 int count, error; 208 209 sc = device_get_softc(dev); 210 bzero(sc, sizeof(*sc)); 211 sc->mfi_dev = dev; 212 m = mfi_find_ident(dev); 213 sc->mfi_flags = m->flags; 214 215 /* Ensure busmastering is enabled */ 216 pci_enable_busmaster(dev); 217 218 /* Allocate PCI registers */ 219 if ((sc->mfi_flags & MFI_FLAGS_1064R) || 220 (sc->mfi_flags & MFI_FLAGS_1078)) { 221 /* 1068/1078: Memory mapped BAR is at offset 0x10 */ 222 sc->mfi_regs_rid = PCIR_BAR(0); 223 } 224 else if ((sc->mfi_flags & MFI_FLAGS_GEN2) || 225 (sc->mfi_flags & MFI_FLAGS_SKINNY) || 226 (sc->mfi_flags & MFI_FLAGS_TBOLT)) { 227 /* Gen2/Skinny: Memory mapped BAR is at offset 0x14 */ 228 sc->mfi_regs_rid = PCIR_BAR(1); 229 } 230 if ((sc->mfi_regs_resource = bus_alloc_resource_any(sc->mfi_dev, 231 SYS_RES_MEMORY, &sc->mfi_regs_rid, RF_ACTIVE)) == NULL) { 232 device_printf(dev, "Cannot allocate PCI registers\n"); 233 return (ENXIO); 234 } 235 sc->mfi_btag = rman_get_bustag(sc->mfi_regs_resource); 236 sc->mfi_bhandle = rman_get_bushandle(sc->mfi_regs_resource); 237 238 error = ENOMEM; 239 240 /* Allocate parent DMA tag */ 241 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* PCI parent */ 242 1, 0, /* algnmnt, boundary */ 243 BUS_SPACE_MAXADDR, /* lowaddr */ 244 BUS_SPACE_MAXADDR, /* highaddr */ 245 NULL, NULL, /* filter, filterarg */ 246 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 247 BUS_SPACE_UNRESTRICTED, /* nsegments */ 248 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 249 0, /* flags */ 250 NULL, NULL, /* lockfunc, lockarg */ 251 &sc->mfi_parent_dmat)) { 252 device_printf(dev, "Cannot allocate parent DMA tag\n"); 253 goto out; 254 } 255 256 /* Allocate IRQ resource. */ 257 sc->mfi_irq_rid = 0; 258 count = 1; 259 if (mfi_msi && pci_alloc_msi(sc->mfi_dev, &count) == 0) { 260 device_printf(sc->mfi_dev, "Using MSI\n"); 261 sc->mfi_irq_rid = 1; 262 } 263 if ((sc->mfi_irq = bus_alloc_resource_any(sc->mfi_dev, SYS_RES_IRQ, 264 &sc->mfi_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) { 265 device_printf(sc->mfi_dev, "Cannot allocate interrupt\n"); 266 error = EINVAL; 267 goto out; 268 } 269 270 error = mfi_attach(sc); 271 out: 272 if (error) { 273 mfi_free(sc); 274 mfi_pci_free(sc); 275 } 276 277 return (error); 278 } 279 280 static int 281 mfi_pci_detach(device_t dev) 282 { 283 struct mfi_softc *sc; 284 int error, devcount, i; 285 device_t *devlist; 286 287 sc = device_get_softc(dev); 288 289 sx_xlock(&sc->mfi_config_lock); 290 mtx_lock(&sc->mfi_io_lock); 291 if ((sc->mfi_flags & MFI_FLAGS_OPEN) != 0) { 292 mtx_unlock(&sc->mfi_io_lock); 293 sx_xunlock(&sc->mfi_config_lock); 294 return (EBUSY); 295 } 296 sc->mfi_detaching = 1; 297 mtx_unlock(&sc->mfi_io_lock); 298 299 if ((error = device_get_children(sc->mfi_dev, &devlist, &devcount)) != 0) { 300 sx_xunlock(&sc->mfi_config_lock); 301 return error; 302 } 303 for (i = 0; i < devcount; i++) 304 device_delete_child(sc->mfi_dev, devlist[i]); 305 free(devlist, M_TEMP); 306 sx_xunlock(&sc->mfi_config_lock); 307 308 EVENTHANDLER_DEREGISTER(shutdown_final, sc->mfi_eh); 309 310 mfi_shutdown(sc); 311 mfi_free(sc); 312 mfi_pci_free(sc); 313 return (0); 314 } 315 316 static void 317 mfi_pci_free(struct mfi_softc *sc) 318 { 319 320 if (sc->mfi_regs_resource != NULL) { 321 bus_release_resource(sc->mfi_dev, SYS_RES_MEMORY, 322 sc->mfi_regs_rid, sc->mfi_regs_resource); 323 } 324 if (sc->mfi_irq_rid != 0) 325 pci_release_msi(sc->mfi_dev); 326 327 return; 328 } 329 330 static int 331 mfi_pci_suspend(device_t dev) 332 { 333 334 return (EINVAL); 335 } 336 337 static int 338 mfi_pci_resume(device_t dev) 339 { 340 341 return (EINVAL); 342 } 343