1 /*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 /*- 27 * Copyright (c) 2007 LSI Corp. 28 * Copyright (c) 2007 Rajesh Prabhakaran. 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 50 * SUCH DAMAGE. 51 */ 52 53 #ifndef _MFIVAR_H 54 #define _MFIVAR_H 55 56 #include <sys/cdefs.h> 57 __FBSDID("$FreeBSD$"); 58 59 #include <sys/lock.h> 60 #include <sys/sx.h> 61 62 #include <sys/types.h> 63 #include <sys/taskqueue.h> 64 65 /* 66 * SCSI structures and definitions are used from here, but no linking 67 * requirements are made to CAM. 68 */ 69 #include <cam/scsi/scsi_all.h> 70 71 struct mfi_hwcomms { 72 uint32_t hw_pi; 73 uint32_t hw_ci; 74 uint32_t hw_reply_q[1]; 75 }; 76 #define MEGASAS_MAX_NAME 32 77 #define MEGASAS_VERSION "4.23" 78 79 struct mfi_softc; 80 struct disk; 81 struct ccb_hdr; 82 83 struct mfi_command { 84 TAILQ_ENTRY(mfi_command) cm_link; 85 time_t cm_timestamp; 86 struct mfi_softc *cm_sc; 87 union mfi_frame *cm_frame; 88 bus_addr_t cm_frame_busaddr; 89 struct mfi_sense *cm_sense; 90 bus_addr_t cm_sense_busaddr; 91 bus_dmamap_t cm_dmamap; 92 union mfi_sgl *cm_sg; 93 void *cm_data; 94 int cm_len; 95 int cm_stp_len; 96 int cm_total_frame_size; 97 int cm_extra_frames; 98 int cm_flags; 99 #define MFI_CMD_MAPPED (1<<0) 100 #define MFI_CMD_DATAIN (1<<1) 101 #define MFI_CMD_DATAOUT (1<<2) 102 #define MFI_CMD_COMPLETED (1<<3) 103 #define MFI_CMD_POLLED (1<<4) 104 #define MFI_ON_MFIQ_FREE (1<<5) 105 #define MFI_ON_MFIQ_READY (1<<6) 106 #define MFI_ON_MFIQ_BUSY (1<<7) 107 #define MFI_ON_MFIQ_MASK ((1<<5)|(1<<6)|(1<<7)) 108 uint8_t retry_for_fw_reset; 109 void (* cm_complete)(struct mfi_command *cm); 110 void *cm_private; 111 int cm_index; 112 int cm_error; 113 }; 114 115 struct mfi_disk { 116 TAILQ_ENTRY(mfi_disk) ld_link; 117 device_t ld_dev; 118 int ld_id; 119 int ld_unit; 120 struct mfi_softc *ld_controller; 121 struct mfi_ld_info *ld_info; 122 struct disk *ld_disk; 123 int ld_flags; 124 #define MFI_DISK_FLAGS_OPEN 0x01 125 #define MFI_DISK_FLAGS_DISABLED 0x02 126 }; 127 128 struct mfi_system_pd { 129 TAILQ_ENTRY(mfi_system_pd) pd_link; 130 device_t pd_dev; 131 int pd_id; 132 int pd_unit; 133 struct mfi_softc *pd_controller; 134 struct mfi_pd_info *pd_info; 135 struct disk *pd_disk; 136 int pd_flags; 137 }; 138 139 struct mfi_evt_queue_elm { 140 TAILQ_ENTRY(mfi_evt_queue_elm) link; 141 struct mfi_evt_detail detail; 142 }; 143 144 struct mfi_aen { 145 TAILQ_ENTRY(mfi_aen) aen_link; 146 struct proc *p; 147 }; 148 149 struct mfi_skinny_dma_info { 150 bus_dma_tag_t dmat[514]; 151 bus_dmamap_t dmamap[514]; 152 uint32_t mem[514]; 153 int noofmaps; 154 }; 155 156 struct megasas_sge 157 { 158 bus_addr_t phys_addr; 159 uint32_t length; 160 }; 161 162 struct mfi_cmd_tbolt; 163 164 struct mfi_softc { 165 device_t mfi_dev; 166 int mfi_flags; 167 #define MFI_FLAGS_SG64 (1<<0) 168 #define MFI_FLAGS_QFRZN (1<<1) 169 #define MFI_FLAGS_OPEN (1<<2) 170 #define MFI_FLAGS_STOP (1<<3) 171 #define MFI_FLAGS_1064R (1<<4) 172 #define MFI_FLAGS_1078 (1<<5) 173 #define MFI_FLAGS_GEN2 (1<<6) 174 #define MFI_FLAGS_SKINNY (1<<7) 175 #define MFI_FLAGS_TBOLT (1<<8) 176 // Start: LSIP200113393 177 bus_dma_tag_t verbuf_h_dmat; 178 bus_dmamap_t verbuf_h_dmamap; 179 bus_addr_t verbuf_h_busaddr; 180 uint32_t *verbuf; 181 void *kbuff_arr[MAX_IOCTL_SGE]; 182 bus_dma_tag_t mfi_kbuff_arr_dmat[2]; 183 bus_dmamap_t mfi_kbuff_arr_dmamap[2]; 184 bus_addr_t mfi_kbuff_arr_busaddr[2]; 185 186 struct mfi_hwcomms *mfi_comms; 187 TAILQ_HEAD(,mfi_command) mfi_free; 188 TAILQ_HEAD(,mfi_command) mfi_ready; 189 TAILQ_HEAD(BUSYQ,mfi_command) mfi_busy; 190 struct bio_queue_head mfi_bioq; 191 struct mfi_qstat mfi_qstat[MFIQ_COUNT]; 192 193 struct resource *mfi_regs_resource; 194 bus_space_handle_t mfi_bhandle; 195 bus_space_tag_t mfi_btag; 196 int mfi_regs_rid; 197 198 bus_dma_tag_t mfi_parent_dmat; 199 bus_dma_tag_t mfi_buffer_dmat; 200 201 bus_dma_tag_t mfi_comms_dmat; 202 bus_dmamap_t mfi_comms_dmamap; 203 bus_addr_t mfi_comms_busaddr; 204 205 bus_dma_tag_t mfi_frames_dmat; 206 bus_dmamap_t mfi_frames_dmamap; 207 bus_addr_t mfi_frames_busaddr; 208 union mfi_frame *mfi_frames; 209 210 bus_dma_tag_t mfi_tb_init_dmat; 211 bus_dmamap_t mfi_tb_init_dmamap; 212 bus_addr_t mfi_tb_init_busaddr; 213 bus_addr_t mfi_tb_ioc_init_busaddr; 214 union mfi_frame *mfi_tb_init; 215 216 TAILQ_HEAD(,mfi_evt_queue_elm) mfi_evt_queue; 217 struct task mfi_evt_task; 218 struct task mfi_map_sync_task; 219 TAILQ_HEAD(,mfi_aen) mfi_aen_pids; 220 struct mfi_command *mfi_aen_cm; 221 struct mfi_command *mfi_skinny_cm; 222 struct mfi_command *mfi_map_sync_cm; 223 int cm_aen_abort; 224 int cm_map_abort; 225 uint32_t mfi_aen_triggered; 226 uint32_t mfi_poll_waiting; 227 uint32_t mfi_boot_seq_num; 228 struct selinfo mfi_select; 229 int mfi_delete_busy_volumes; 230 int mfi_keep_deleted_volumes; 231 int mfi_detaching; 232 233 bus_dma_tag_t mfi_sense_dmat; 234 bus_dmamap_t mfi_sense_dmamap; 235 bus_addr_t mfi_sense_busaddr; 236 struct mfi_sense *mfi_sense; 237 238 struct resource *mfi_irq; 239 void *mfi_intr; 240 int mfi_irq_rid; 241 242 struct intr_config_hook mfi_ich; 243 eventhandler_tag eh; 244 /* OCR flags */ 245 uint8_t adpreset; 246 uint8_t issuepend_done; 247 uint8_t disableOnlineCtrlReset; 248 uint32_t mfiStatus; 249 uint32_t last_seq_num; 250 uint32_t volatile hw_crit_error; 251 252 /* 253 * Allocation for the command array. Used as an indexable array to 254 * recover completed commands. 255 */ 256 struct mfi_command *mfi_commands; 257 /* 258 * How many commands were actually allocated 259 */ 260 int mfi_total_cmds; 261 /* 262 * How many commands the firmware can handle. Also how big the reply 263 * queue is, minus 1. 264 */ 265 int mfi_max_fw_cmds; 266 /* 267 * How many S/G elements we'll ever actually use 268 */ 269 int mfi_max_sge; 270 /* 271 * How many bytes a compound frame is, including all of the extra frames 272 * that are used for S/G elements. 273 */ 274 int mfi_cmd_size; 275 /* 276 * How large an S/G element is. Used to calculate the number of single 277 * frames in a command. 278 */ 279 int mfi_sge_size; 280 /* 281 * Max number of sectors that the firmware allows 282 */ 283 uint32_t mfi_max_io; 284 285 TAILQ_HEAD(,mfi_disk) mfi_ld_tqh; 286 TAILQ_HEAD(,mfi_system_pd) mfi_syspd_tqh; 287 eventhandler_tag mfi_eh; 288 struct cdev *mfi_cdev; 289 290 TAILQ_HEAD(, ccb_hdr) mfi_cam_ccbq; 291 struct mfi_command * (* mfi_cam_start)(void *); 292 struct callout mfi_watchdog_callout; 293 struct mtx mfi_io_lock; 294 struct sx mfi_config_lock; 295 296 /* Controller type specific interfaces */ 297 void (*mfi_enable_intr)(struct mfi_softc *sc); 298 void (*mfi_disable_intr)(struct mfi_softc *sc); 299 int32_t (*mfi_read_fw_status)(struct mfi_softc *sc); 300 int (*mfi_check_clear_intr)(struct mfi_softc *sc); 301 void (*mfi_issue_cmd)(struct mfi_softc *sc, bus_addr_t bus_add, 302 uint32_t frame_cnt); 303 int (*mfi_adp_reset)(struct mfi_softc *sc); 304 int (*mfi_adp_check_reset)(struct mfi_softc *sc); 305 306 /* ThunderBolt */ 307 uint32_t mfi_tbolt; 308 uint32_t MFA_enabled; 309 /* Single Reply structure size */ 310 uint16_t reply_size; 311 /* Singler message size. */ 312 uint16_t raid_io_msg_size; 313 TAILQ_HEAD(TB, mfi_cmd_tbolt) mfi_cmd_tbolt_tqh; 314 /* ThunderBolt base contiguous memory mapping. */ 315 bus_dma_tag_t mfi_tb_dmat; 316 bus_dmamap_t mfi_tb_dmamap; 317 bus_addr_t mfi_tb_busaddr; 318 /* ThunderBolt Contiguous DMA memory Mapping */ 319 uint8_t * request_message_pool; 320 uint8_t * request_message_pool_align; 321 uint8_t * request_desc_pool; 322 bus_addr_t request_msg_busaddr; 323 bus_addr_t reply_frame_busaddr; 324 bus_addr_t sg_frame_busaddr; 325 /* ThunderBolt IOC Init Descriptor */ 326 bus_dma_tag_t mfi_tb_ioc_init_dmat; 327 bus_dmamap_t mfi_tb_ioc_init_dmamap; 328 uint8_t * mfi_tb_ioc_init_desc; 329 struct mfi_cmd_tbolt **mfi_cmd_pool_tbolt; 330 /* Virtual address of reply Frame Pool */ 331 struct mfi_mpi2_reply_header* reply_frame_pool; 332 struct mfi_mpi2_reply_header* reply_frame_pool_align; 333 334 /* Last reply frame address */ 335 uint8_t * reply_pool_limit; 336 uint16_t last_reply_idx; 337 uint8_t max_SGEs_in_chain_message; 338 uint8_t max_SGEs_in_main_message; 339 uint8_t chain_offset_value_for_main_message; 340 uint8_t chain_offset_value_for_mpt_ptmsg; 341 }; 342 343 union desc_value { 344 uint64_t word; 345 struct { 346 uint32_t low; 347 uint32_t high; 348 }u; 349 }; 350 351 // TODO find the right definition 352 #define XXX_MFI_CMD_OP_INIT2 0x9 353 /* 354 * Request descriptor types 355 */ 356 #define MFI_REQ_DESCRIPT_FLAGS_LD_IO 0x7 357 #define MFI_REQ_DESCRIPT_FLAGS_MFA 0x1 358 #define MFI_REQ_DESCRIPT_FLAGS_TYPE_SHIFT 0x1 359 #define MFI_FUSION_FP_DEFAULT_TIMEOUT 0x14 360 #define MFI_LOAD_BALANCE_FLAG 0x1 361 #define MFI_DCMD_MBOX_PEND_FLAG 0x1 362 363 //#define MR_PROT_INFO_TYPE_CONTROLLER 0x08 364 #define MEGASAS_SCSI_VARIABLE_LENGTH_CMD 0x7f 365 #define MEGASAS_SCSI_SERVICE_ACTION_READ32 0x9 366 #define MEGASAS_SCSI_SERVICE_ACTION_WRITE32 0xB 367 #define MEGASAS_SCSI_ADDL_CDB_LEN 0x18 368 #define MEGASAS_RD_WR_PROTECT_CHECK_ALL 0x20 369 #define MEGASAS_RD_WR_PROTECT_CHECK_NONE 0x60 370 #define MEGASAS_EEDPBLOCKSIZE 512 371 struct mfi_cmd_tbolt { 372 union mfi_mpi2_request_descriptor *request_desc; 373 struct mfi_mpi2_request_raid_scsi_io *io_request; 374 bus_addr_t io_request_phys_addr; 375 bus_addr_t sg_frame_phys_addr; 376 bus_addr_t sense_phys_addr; 377 MPI2_SGE_IO_UNION *sg_frame; 378 uint8_t *sense; 379 TAILQ_ENTRY(mfi_cmd_tbolt) next; 380 /* 381 * Context for a MFI frame. 382 * Used to get the mfi cmd from list when a MFI cmd is completed 383 */ 384 uint32_t sync_cmd_idx; 385 uint16_t index; 386 uint8_t status; 387 }; 388 389 extern int mfi_attach(struct mfi_softc *); 390 extern void mfi_free(struct mfi_softc *); 391 extern int mfi_shutdown(struct mfi_softc *); 392 extern void mfi_startio(struct mfi_softc *); 393 extern void mfi_disk_complete(struct bio *); 394 extern int mfi_disk_disable(struct mfi_disk *); 395 extern void mfi_disk_enable(struct mfi_disk *); 396 extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int); 397 extern int mfi_syspd_disable(struct mfi_system_pd *); 398 extern void mfi_syspd_enable(struct mfi_system_pd *); 399 extern int mfi_dump_syspd_blocks(struct mfi_softc *, int id, uint64_t, void *, 400 int); 401 extern int mfi_transition_firmware(struct mfi_softc *sc); 402 extern int mfi_aen_setup(struct mfi_softc *sc, uint32_t seq_start); 403 extern void mfi_complete(struct mfi_softc *sc, struct mfi_command *cm); 404 extern int mfi_mapcmd(struct mfi_softc *sc,struct mfi_command *cm); 405 extern int mfi_wait_command(struct mfi_softc *sc, struct mfi_command *cm); 406 extern void mfi_tbolt_enable_intr_ppc(struct mfi_softc *); 407 extern void mfi_tbolt_disable_intr_ppc(struct mfi_softc *); 408 extern int32_t mfi_tbolt_read_fw_status_ppc(struct mfi_softc *); 409 extern int32_t mfi_tbolt_check_clear_intr_ppc(struct mfi_softc *); 410 extern void mfi_tbolt_issue_cmd_ppc(struct mfi_softc *, bus_addr_t, uint32_t); 411 extern void mfi_tbolt_init_globals(struct mfi_softc*); 412 extern uint32_t mfi_tbolt_get_memory_requirement(struct mfi_softc *); 413 extern int mfi_tbolt_init_desc_pool(struct mfi_softc *, uint8_t *, uint32_t); 414 extern int mfi_tbolt_init_MFI_queue(struct mfi_softc *); 415 extern void mfi_intr_tbolt(void *arg); 416 extern int mfi_tbolt_alloc_cmd(struct mfi_softc *sc); 417 extern int mfi_tbolt_send_frame(struct mfi_softc *sc, struct mfi_command *cm); 418 extern int mfi_tbolt_adp_reset(struct mfi_softc *sc); 419 extern int mfi_tbolt_reset(struct mfi_softc *sc); 420 extern void mfi_tbolt_sync_map_info(struct mfi_softc *sc); 421 extern void mfi_handle_map_sync(void *context, int pending); 422 extern int mfi_dcmd_command(struct mfi_softc *, struct mfi_command **, 423 uint32_t, void **, size_t); 424 425 #define MFIQ_ADD(sc, qname) \ 426 do { \ 427 struct mfi_qstat *qs; \ 428 \ 429 qs = &(sc)->mfi_qstat[qname]; \ 430 qs->q_length++; \ 431 if (qs->q_length > qs->q_max) \ 432 qs->q_max = qs->q_length; \ 433 } while (0) 434 435 #define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length-- 436 437 #define MFIQ_INIT(sc, qname) \ 438 do { \ 439 sc->mfi_qstat[qname].q_length = 0; \ 440 sc->mfi_qstat[qname].q_max = 0; \ 441 } while (0) 442 443 #define MFIQ_COMMAND_QUEUE(name, index) \ 444 static __inline void \ 445 mfi_initq_ ## name (struct mfi_softc *sc) \ 446 { \ 447 TAILQ_INIT(&sc->mfi_ ## name); \ 448 MFIQ_INIT(sc, index); \ 449 } \ 450 static __inline void \ 451 mfi_enqueue_ ## name (struct mfi_command *cm) \ 452 { \ 453 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 454 printf("command %p is on another queue, " \ 455 "flags = %#x\n", cm, cm->cm_flags); \ 456 panic("command is on another queue"); \ 457 } \ 458 TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 459 cm->cm_flags |= MFI_ON_ ## index; \ 460 MFIQ_ADD(cm->cm_sc, index); \ 461 } \ 462 static __inline void \ 463 mfi_requeue_ ## name (struct mfi_command *cm) \ 464 { \ 465 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 466 printf("command %p is on another queue, " \ 467 "flags = %#x\n", cm, cm->cm_flags); \ 468 panic("command is on another queue"); \ 469 } \ 470 TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 471 cm->cm_flags |= MFI_ON_ ## index; \ 472 MFIQ_ADD(cm->cm_sc, index); \ 473 } \ 474 static __inline struct mfi_command * \ 475 mfi_dequeue_ ## name (struct mfi_softc *sc) \ 476 { \ 477 struct mfi_command *cm; \ 478 \ 479 if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \ 480 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 481 printf("command %p not in queue, " \ 482 "flags = %#x, bit = %#x\n", cm, \ 483 cm->cm_flags, MFI_ON_ ## index); \ 484 panic("command not in queue"); \ 485 } \ 486 TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \ 487 cm->cm_flags &= ~MFI_ON_ ## index; \ 488 MFIQ_REMOVE(sc, index); \ 489 } \ 490 return (cm); \ 491 } \ 492 static __inline void \ 493 mfi_remove_ ## name (struct mfi_command *cm) \ 494 { \ 495 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 496 printf("command %p not in queue, flags = %#x, " \ 497 "bit = %#x\n", cm, cm->cm_flags, \ 498 MFI_ON_ ## index); \ 499 panic("command not in queue"); \ 500 } \ 501 TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 502 cm->cm_flags &= ~MFI_ON_ ## index; \ 503 MFIQ_REMOVE(cm->cm_sc, index); \ 504 } \ 505 struct hack 506 507 MFIQ_COMMAND_QUEUE(free, MFIQ_FREE); 508 MFIQ_COMMAND_QUEUE(ready, MFIQ_READY); 509 MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY); 510 511 static __inline void 512 mfi_initq_bio(struct mfi_softc *sc) 513 { 514 bioq_init(&sc->mfi_bioq); 515 MFIQ_INIT(sc, MFIQ_BIO); 516 } 517 518 static __inline void 519 mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp) 520 { 521 bioq_insert_tail(&sc->mfi_bioq, bp); 522 MFIQ_ADD(sc, MFIQ_BIO); 523 } 524 525 static __inline struct bio * 526 mfi_dequeue_bio(struct mfi_softc *sc) 527 { 528 struct bio *bp; 529 530 if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) { 531 bioq_remove(&sc->mfi_bioq, bp); 532 MFIQ_REMOVE(sc, MFIQ_BIO); 533 } 534 return (bp); 535 } 536 537 /* 538 * This is from the original scsi_extract_sense() in CAM. It's copied 539 * here because CAM now uses a non-inline version that follows more complex 540 * additions to the SPC spec, and we don't want to force a dependency on 541 * the CAM module for such a trivial action. 542 */ 543 static __inline void 544 mfi_extract_sense(struct scsi_sense_data_fixed *sense, 545 int *error_code, int *sense_key, int *asc, int *ascq) 546 { 547 548 *error_code = sense->error_code & SSD_ERRCODE; 549 *sense_key = sense->flags & SSD_KEY; 550 *asc = (sense->extra_len >= 5) ? sense->add_sense_code : 0; 551 *ascq = (sense->extra_len >= 6) ? sense->add_sense_code_qual : 0; 552 } 553 554 static __inline void 555 mfi_print_sense(struct mfi_softc *sc, void *sense) 556 { 557 int error, key, asc, ascq; 558 559 mfi_extract_sense((struct scsi_sense_data_fixed *)sense, 560 &error, &key, &asc, &ascq); 561 device_printf(sc->mfi_dev, "sense error %d, sense_key %d, " 562 "asc %d, ascq %d\n", error, key, asc, ascq); 563 } 564 565 566 #define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \ 567 sc->mfi_bhandle, (reg), (val)) 568 #define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \ 569 (sc)->mfi_bhandle, (reg)) 570 #define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \ 571 sc->mfi_bhandle, (reg), (val)) 572 #define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \ 573 (sc)->mfi_bhandle, (reg)) 574 #define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \ 575 sc->mfi_bhandle, (reg), (val)) 576 #define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \ 577 (sc)->mfi_bhandle, (reg)) 578 579 MALLOC_DECLARE(M_MFIBUF); 580 SYSCTL_DECL(_hw_mfi); 581 582 #define MFI_RESET_WAIT_TIME 180 583 #define MFI_CMD_TIMEOUT 30 584 #define MFI_SYS_PD_IO 0 585 #define MFI_LD_IO 1 586 #define MFI_SKINNY_MEMORY 0x02000000 587 #define MFI_MAXPHYS (128 * 1024) 588 589 #ifdef MFI_DEBUG 590 extern void mfi_print_cmd(struct mfi_command *cm); 591 extern void mfi_dump_cmds(struct mfi_softc *sc); 592 extern void mfi_validate_sg(struct mfi_softc *, struct mfi_command *, const char *, int ); 593 #define MFI_PRINT_CMD(cm) mfi_print_cmd(cm) 594 #define MFI_DUMP_CMDS(sc) mfi_dump_cmds(sc) 595 #define MFI_VALIDATE_CMD(sc, cm) mfi_validate_sg(sc, cm, __FUNCTION__, __LINE__) 596 #else 597 #define MFI_PRINT_CMD(cm) 598 #define MFI_DUMP_CMDS(sc) 599 #define MFI_VALIDATE_CMD(sc, cm) 600 #endif 601 602 extern void mfi_release_command(struct mfi_command *cm); 603 604 #endif /* _MFIVAR_H */ 605