1 /*- 2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 /* 35 * Micrel KSZ9021 Gigabit Ethernet Transceiver 36 */ 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/socket.h> 42 #include <sys/errno.h> 43 #include <sys/module.h> 44 #include <sys/bus.h> 45 #include <sys/malloc.h> 46 47 #include <machine/bus.h> 48 49 #include <net/if.h> 50 #include <net/if_media.h> 51 52 #include <dev/mii/mii.h> 53 #include <dev/mii/miivar.h> 54 #include "miidevs.h" 55 56 #include "miibus_if.h" 57 58 #include <dev/fdt/fdt_common.h> 59 #include <dev/ofw/openfirm.h> 60 #include <dev/ofw/ofw_bus.h> 61 #include <dev/ofw/ofw_bus_subr.h> 62 63 #define MII_KSZPHY_EXTREG 0x0b 64 #define KSZPHY_EXTREG_WRITE (1 << 15) 65 #define MII_KSZPHY_EXTREG_WRITE 0x0c 66 #define MII_KSZPHY_EXTREG_READ 0x0d 67 #define MII_KSZPHY_CLK_CONTROL_PAD_SKEW 0x104 68 #define MII_KSZPHY_RX_DATA_PAD_SKEW 0x105 69 #define MII_KSZPHY_TX_DATA_PAD_SKEW 0x106 70 /* KSZ9031 */ 71 #define MII_KSZ9031_MMD_ACCESS_CTRL 0x0d 72 #define MII_KSZ9031_MMD_ACCESS_DATA 0x0e 73 #define MII_KSZ9031_MMD_DATA_NOINC (1 << 14) 74 #define MII_KSZ9031_CONTROL_PAD_SKEW 0x4 75 #define MII_KSZ9031_RX_DATA_PAD_SKEW 0x5 76 #define MII_KSZ9031_TX_DATA_PAD_SKEW 0x6 77 #define MII_KSZ9031_CLOCK_PAD_SKEW 0x8 78 79 #define MII_KSZ8081_PHYCTL2 0x1f 80 81 #define PS_TO_REG(p) ((p) / 200) 82 83 static int micphy_probe(device_t); 84 static int micphy_attach(device_t); 85 static void micphy_reset(struct mii_softc *); 86 static int micphy_service(struct mii_softc *, struct mii_data *, int); 87 88 static device_method_t micphy_methods[] = { 89 /* device interface */ 90 DEVMETHOD(device_probe, micphy_probe), 91 DEVMETHOD(device_attach, micphy_attach), 92 DEVMETHOD(device_detach, mii_phy_detach), 93 DEVMETHOD(device_shutdown, bus_generic_shutdown), 94 DEVMETHOD_END 95 }; 96 97 static devclass_t micphy_devclass; 98 99 static driver_t micphy_driver = { 100 "micphy", 101 micphy_methods, 102 sizeof(struct mii_softc) 103 }; 104 105 DRIVER_MODULE(micphy, miibus, micphy_driver, micphy_devclass, 0, 0); 106 107 static const struct mii_phydesc micphys[] = { 108 MII_PHY_DESC(MICREL, KSZ8081), 109 MII_PHY_DESC(MICREL, KSZ9021), 110 MII_PHY_DESC(MICREL, KSZ9031), 111 MII_PHY_END 112 }; 113 114 static const struct mii_phy_funcs micphy_funcs = { 115 micphy_service, 116 ukphy_status, 117 micphy_reset 118 }; 119 120 static uint32_t 121 ksz9031_read(struct mii_softc *sc, uint32_t devaddr, uint32_t reg) 122 { 123 /* Set up device address and register. */ 124 PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_CTRL, devaddr); 125 PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_DATA, reg); 126 127 /* Select register data for MMD and read the value. */ 128 PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_CTRL, 129 MII_KSZ9031_MMD_DATA_NOINC | devaddr); 130 131 return (PHY_READ(sc, MII_KSZ9031_MMD_ACCESS_DATA)); 132 } 133 134 static void 135 ksz9031_write(struct mii_softc *sc, uint32_t devaddr, uint32_t reg, 136 uint32_t val) 137 { 138 139 /* Set up device address and register. */ 140 PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_CTRL, devaddr); 141 PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_DATA, reg); 142 143 /* Select register data for MMD and write the value. */ 144 PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_CTRL, 145 MII_KSZ9031_MMD_DATA_NOINC | devaddr); 146 PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_DATA, val); 147 } 148 149 static uint32_t 150 ksz9021_read(struct mii_softc *sc, uint32_t reg) 151 { 152 153 PHY_WRITE(sc, MII_KSZPHY_EXTREG, reg); 154 155 return (PHY_READ(sc, MII_KSZPHY_EXTREG_READ)); 156 } 157 158 static void 159 ksz9021_write(struct mii_softc *sc, uint32_t reg, uint32_t val) 160 { 161 162 PHY_WRITE(sc, MII_KSZPHY_EXTREG, KSZPHY_EXTREG_WRITE | reg); 163 PHY_WRITE(sc, MII_KSZPHY_EXTREG_WRITE, val); 164 } 165 166 static void 167 ksz90x1_load_values(struct mii_softc *sc, phandle_t node, 168 uint32_t dev, uint32_t reg, char *field1, uint32_t f1mask, int f1off, 169 char *field2, uint32_t f2mask, int f2off, char *field3, uint32_t f3mask, 170 int f3off, char *field4, uint32_t f4mask, int f4off) 171 { 172 pcell_t dts_value[1]; 173 int len; 174 int val; 175 176 if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ9031) 177 val = ksz9031_read(sc, dev, reg); 178 else 179 val = ksz9021_read(sc, reg); 180 181 if ((len = OF_getproplen(node, field1)) > 0) { 182 OF_getencprop(node, field1, dts_value, len); 183 val &= ~(f1mask << f1off); 184 val |= (PS_TO_REG(dts_value[0]) & f1mask) << f1off; 185 } 186 187 if (field2 != NULL && (len = OF_getproplen(node, field2)) > 0) { 188 OF_getencprop(node, field2, dts_value, len); 189 val &= ~(f2mask << f2off); 190 val |= (PS_TO_REG(dts_value[0]) & f2mask) << f2off; 191 } 192 193 if (field3 != NULL && (len = OF_getproplen(node, field3)) > 0) { 194 OF_getencprop(node, field3, dts_value, len); 195 val &= ~(f3mask << f3off); 196 val |= (PS_TO_REG(dts_value[0]) & f3mask) << f3off; 197 } 198 199 if (field4 != NULL && (len = OF_getproplen(node, field4)) > 0) { 200 OF_getencprop(node, field4, dts_value, len); 201 val &= ~(f4mask << f4off); 202 val |= (PS_TO_REG(dts_value[0]) & f4mask) << f4off; 203 } 204 205 if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ9031) 206 ksz9031_write(sc, dev, reg, val); 207 else 208 ksz9021_write(sc, reg, val); 209 } 210 211 static void 212 ksz9031_load_values(struct mii_softc *sc, phandle_t node) 213 { 214 215 ksz90x1_load_values(sc, node, 2, MII_KSZ9031_CONTROL_PAD_SKEW, 216 "txen-skew-ps", 0xf, 0, "rxdv-skew-ps", 0xf, 4, 217 NULL, 0, 0, NULL, 0, 0); 218 ksz90x1_load_values(sc, node, 2, MII_KSZ9031_RX_DATA_PAD_SKEW, 219 "rxd0-skew-ps", 0xf, 0, "rxd1-skew-ps", 0xf, 4, 220 "rxd2-skew-ps", 0xf, 8, "rxd3-skew-ps", 0xf, 12); 221 ksz90x1_load_values(sc, node, 2, MII_KSZ9031_TX_DATA_PAD_SKEW, 222 "txd0-skew-ps", 0xf, 0, "txd1-skew-ps", 0xf, 4, 223 "txd2-skew-ps", 0xf, 8, "txd3-skew-ps", 0xf, 12); 224 ksz90x1_load_values(sc, node, 2, MII_KSZ9031_CLOCK_PAD_SKEW, 225 "rxc-skew-ps", 0x1f, 0, "txc-skew-ps", 0x1f, 5, 226 NULL, 0, 0, NULL, 0, 0); 227 } 228 229 static void 230 ksz9021_load_values(struct mii_softc *sc, phandle_t node) 231 { 232 233 ksz90x1_load_values(sc, node, 0, MII_KSZPHY_CLK_CONTROL_PAD_SKEW, 234 "txen-skew-ps", 0xf, 0, "txc-skew-ps", 0xf, 4, 235 "rxdv-skew-ps", 0xf, 8, "rxc-skew-ps", 0xf, 12); 236 ksz90x1_load_values(sc, node, 0, MII_KSZPHY_RX_DATA_PAD_SKEW, 237 "rxd0-skew-ps", 0xf, 0, "rxd1-skew-ps", 0xf, 4, 238 "rxd2-skew-ps", 0xf, 8, "rxd3-skew-ps", 0xf, 12); 239 ksz90x1_load_values(sc, node, 0, MII_KSZPHY_TX_DATA_PAD_SKEW, 240 "txd0-skew-ps", 0xf, 0, "txd1-skew-ps", 0xf, 4, 241 "txd2-skew-ps", 0xf, 8, "txd3-skew-ps", 0xf, 12); 242 } 243 244 static int 245 micphy_probe(device_t dev) 246 { 247 248 return (mii_phy_dev_probe(dev, micphys, BUS_PROBE_DEFAULT)); 249 } 250 251 static int 252 micphy_attach(device_t dev) 253 { 254 struct mii_softc *sc; 255 phandle_t node; 256 device_t miibus; 257 device_t parent; 258 259 sc = device_get_softc(dev); 260 261 mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &micphy_funcs, 1); 262 mii_phy_setmedia(sc); 263 264 /* Nothing further to configure for 8081 model. */ 265 if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ8081) 266 return (0); 267 268 miibus = device_get_parent(dev); 269 parent = device_get_parent(miibus); 270 271 if ((node = ofw_bus_get_node(parent)) == -1) 272 return (ENXIO); 273 274 if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ9031) 275 ksz9031_load_values(sc, node); 276 else 277 ksz9021_load_values(sc, node); 278 279 return (0); 280 } 281 282 static void 283 micphy_reset(struct mii_softc *sc) 284 { 285 int reg; 286 287 /* 288 * The 8081 has no "sticky bits" that survive a soft reset; several bits 289 * in the Phy Control Register 2 must be preserved across the reset. 290 * These bits are set up by the bootloader; they control how the phy 291 * interfaces to the board (such as clock frequency and LED behavior). 292 */ 293 if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ8081) 294 reg = PHY_READ(sc, MII_KSZ8081_PHYCTL2); 295 mii_phy_reset(sc); 296 if (sc->mii_mpd_model == MII_MODEL_MICREL_KSZ8081) 297 PHY_WRITE(sc, MII_KSZ8081_PHYCTL2, reg); 298 } 299 300 static int 301 micphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 302 { 303 304 switch (cmd) { 305 case MII_POLLSTAT: 306 break; 307 308 case MII_MEDIACHG: 309 mii_phy_setmedia(sc); 310 break; 311 312 case MII_TICK: 313 if (mii_phy_tick(sc) == EJUSTRETURN) 314 return (0); 315 break; 316 } 317 318 /* Update the media status. */ 319 PHY_STATUS(sc); 320 321 /* Callback if something changed. */ 322 mii_phy_update(sc, cmd); 323 return (0); 324 } 325