xref: /freebsd/sys/dev/mii/qsphyreg.h (revision bdd1243d)
1 /*	OpenBSD: qsphyreg.h,v 1.2 1999/03/09 00:02:45 jason Exp 	*/
2 /*	NetBSD: qsphyreg.h,v 1.1 1998/08/11 00:01:03 thorpej Exp 	*/
3 /*	$FreeBSD$	*/
4 
5 /*-
6  * SPDX-License-Identifier: BSD-2-Clause
7  *
8  * Copyright (c) 1998 The NetBSD Foundation, Inc.
9  * All rights reserved.
10  *
11  * This code is derived from software contributed to The NetBSD Foundation
12  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
13  * NASA Ames Research Center.
14  *
15  * Redistribution and use in source and binary forms, with or without
16  * modification, are permitted provided that the following conditions
17  * are met:
18  * 1. Redistributions of source code must retain the above copyright
19  *    notice, this list of conditions and the following disclaimer.
20  * 2. Redistributions in binary form must reproduce the above copyright
21  *    notice, this list of conditions and the following disclaimer in the
22  *    documentation and/or other materials provided with the distribution.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34  * POSSIBILITY OF SUCH DAMAGE.
35  */
36 
37 #ifndef _DEV_MII_QSPHYREG_H_
38 #define	_DEV_MII_QSPHYREG_H_
39 
40 /*
41  * Register definitions for the Quality Semiconductor QS6612
42  * Further documentation can be found at:
43  * 	http://www.qualitysemi.com/products/network.html
44  */
45 
46 #define	MII_QSPHY_MCTL		0x11	/* Mode control */
47 #define	MCTL_T4PRE		0x1000	/* 100baseT4 interface present */
48 #define	MCTL_BTEXT		0x0800	/* reduce 10baseT squelch level */
49 #define	MCTL_FACTTEST		0x0100	/* factory test mode */
50 #define	MCTL_PHYADDRMASK	0x00f8	/* PHY address */
51 #define	MCTL_FACTTEST2		0x0004	/* another factory test mode */
52 #define	MCTL_NLPDIS		0x0002	/* disable link pulse tx */
53 #define	MCTL_SQEDIS		0x0001	/* disable SQE */
54 
55 #define	MII_QSPHY_ISRC		0x1d	/* Interrupt source */
56 #define	MII_QSPHY_IMASK		0x1e	/* Interrupt mask */
57 #define	IMASK_TLINTR		0x8000	/* ThunderLAN interrupt mode */
58 #define	IMASK_ANCPL		0x0040	/* autonegotiation complete */
59 #define	IMASK_RFD		0x0020	/* remote fault detected */
60 #define	IMASK_LD		0x0010	/* link down */
61 #define	IMASK_ANLPA		0x0008	/* autonegotiation LP ACK */
62 #define	IMASK_PDT		0x0004	/* parallel detection fault */
63 #define	IMASK_ANPR		0x0002	/* autonegotiation page received */
64 #define	IMASK_REF		0x0001	/* receive error counter full */
65 
66 #define	MII_QSPHY_PCTL		0x1f	/* PHY control */
67 #define	PCTL_RXERDIS		0x2000	/* receive error counter disable */
68 #define	PCTL_ANC		0x1000	/* autonegotiation complete */
69 #define	PCTL_RLBEN		0x0200	/* remote coopback enable */
70 #define	PCTL_DCREN		0x0100	/* DC restoration enable */
71 #define	PCTL_4B5BEN		0x0040	/* 4b/5b encoding */
72 #define	PCTL_PHYISO		0x0020	/* isolate PHY */
73 #define	PCTL_OPMASK		0x001c	/* operation mode mask */
74 #define	PCTL_AN			0x0000	/* autonegotiation in-progress */
75 #define	PCTL_10_T		0x0004	/* 10baseT */
76 #define	PCTL_100_TX		0x0008	/* 100baseTX */
77 #define	PCTL_100_T4		0x0010	/* 100baseT4 */
78 #define	PCTL_10_T_FDX		0x0014	/* 10baseT-FDX */
79 #define	PCTL_100_TX_FDX		0x0018	/* 100baseTX-FDX */
80 #define	PCTL_MLT3DIS		0x0002	/* disable MLT3 */
81 #define	PCTL_SRCDIS		0x0001	/* disable scrambling */
82 
83 #endif /* _DEV_MII_QSPHYREG_H_ */
84