xref: /freebsd/sys/dev/mii/truephy.c (revision e0c4386e) 
1 /*-
2  * SPDX-License-Identifier: BSD-3-Clause
3  *
4  * Copyright (c) 2007 The DragonFly Project.  All rights reserved.
5  *
6  * This code is derived from software contributed to The DragonFly Project
7  * by Sepherosa Ziehau <sepherosa@gmail.com>
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  *
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in
17  *    the documentation and/or other materials provided with the
18  *    distribution.
19  * 3. Neither the name of The DragonFly Project nor the names of its
20  *    contributors may be used to endorse or promote products derived
21  *    from this software without specific, prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
26  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
27  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
28  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
29  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
31  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
33  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  * $DragonFly: src/sys/dev/netif/mii_layer/truephy.c,v 1.3 2008/02/10 07:29:27 sephe Exp $
37  */
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/socket.h>
43 #include <sys/errno.h>
44 #include <sys/module.h>
45 #include <sys/bus.h>
46 
47 #include <net/if.h>
48 #include <net/if_var.h>
49 #include <net/if_media.h>
50 #include <net/if_arp.h>
51 #include <net/ethernet.h>
52 #include <net/if_vlan_var.h>
53 
54 #include <dev/mii/mii.h>
55 #include <dev/mii/miivar.h>
56 #include "miidevs.h"
57 
58 #include <dev/mii/truephyreg.h>
59 
60 #include "miibus_if.h"
61 
62 #define	TRUEPHY_FRAMELEN(mtu)	\
63     (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN + (mtu) + ETHER_CRC_LEN)
64 
65 static int	truephy_service(struct mii_softc *, struct mii_data *, int);
66 static int	truephy_attach(device_t);
67 static int	truephy_probe(device_t);
68 static void	truephy_reset(struct mii_softc *);
69 static void	truephy_status(struct mii_softc *);
70 
71 static device_method_t truephy_methods[] = {
72 	/* device interface */
73 	DEVMETHOD(device_probe,		truephy_probe),
74 	DEVMETHOD(device_attach,	truephy_attach),
75 	DEVMETHOD(device_detach,	mii_phy_detach),
76 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
77 	DEVMETHOD_END
78 };
79 
80 static const struct mii_phydesc truephys[] = {
81 	MII_PHY_DESC(AGERE,	ET1011),
82 	MII_PHY_DESC(AGERE,	ET1011C),
83 	MII_PHY_END
84 };
85 
86 static driver_t truephy_driver = {
87 	"truephy",
88 	truephy_methods,
89 	sizeof(struct mii_softc)
90 };
91 
92 DRIVER_MODULE(truephy, miibus, truephy_driver, 0, 0);
93 
94 static const struct mii_phy_funcs truephy_funcs = {
95 	truephy_service,
96 	truephy_status,
97 	truephy_reset
98 };
99 
100 static const struct truephy_dsp {
101 	uint16_t	index;
102 	uint16_t	data;
103 } truephy_dspcode[] = {
104 	{ 0x880b,	0x0926 },	/* AfeIfCreg4B1000Msbs */
105 	{ 0x880c,	0x0926 },	/* AfeIfCreg4B100Msbs */
106 	{ 0x880d,	0x0926 },	/* AfeIfCreg4B10Msbs */
107 
108 	{ 0x880e,	0xb4d3 },	/* AfeIfCreg4B1000Lsbs */
109 	{ 0x880f,	0xb4d3 },	/* AfeIfCreg4B100Lsbs */
110 	{ 0x8810,	0xb4d3 },	/* AfeIfCreg4B10Lsbs */
111 
112 	{ 0x8805,	0xb03e },	/* AfeIfCreg3B1000Msbs */
113 	{ 0x8806,	0xb03e },	/* AfeIfCreg3B100Msbs */
114 	{ 0x8807,	0xff00 },	/* AfeIfCreg3B10Msbs */
115 
116 	{ 0x8808,	0xe090 },	/* AfeIfCreg3B1000Lsbs */
117 	{ 0x8809,	0xe110 },	/* AfeIfCreg3B100Lsbs */
118 	{ 0x880a,	0x0000 },	/* AfeIfCreg3B10Lsbs */
119 
120 	{ 0x300d,	1      },	/* DisableNorm */
121 
122 	{ 0x280c,	0x0180 },	/* LinkHoldEnd */
123 
124 	{ 0x1c21,	0x0002 },	/* AlphaM */
125 
126 	{ 0x3821,	6      },	/* FfeLkgTx0 */
127 	{ 0x381d,	1      },	/* FfeLkg1g4 */
128 	{ 0x381e,	1      },	/* FfeLkg1g5 */
129 	{ 0x381f,	1      },	/* FfeLkg1g6 */
130 	{ 0x3820,	1      },	/* FfeLkg1g7 */
131 
132 	{ 0x8402,	0x01f0 },	/* Btinact */
133 	{ 0x800e,	20     },	/* LftrainTime */
134 	{ 0x800f,	24     },	/* DvguardTime */
135 	{ 0x8010,	46     }	/* IdlguardTime */
136 };
137 
138 static int
139 truephy_probe(device_t dev)
140 {
141 
142 	return (mii_phy_dev_probe(dev, truephys, BUS_PROBE_DEFAULT));
143 }
144 
145 static int
146 truephy_attach(device_t dev)
147 {
148 	struct mii_softc *sc;
149 
150 	sc = device_get_softc(dev);
151 
152 	mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE,
153 	   &truephy_funcs, 0);
154 
155 	PHY_RESET(sc);
156 
157 	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask;
158 	if (sc->mii_capabilities & BMSR_EXTSTAT) {
159 		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
160 		/* No 1000baseT half-duplex support */
161 		sc->mii_extcapabilities &= ~EXTSR_1000THDX;
162 	}
163 
164 	device_printf(dev, " ");
165 	mii_phy_add_media(sc);
166 	printf("\n");
167 
168 	MIIBUS_MEDIAINIT(sc->mii_dev);
169 	return (0);
170 }
171 
172 static int
173 truephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
174 {
175 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
176 	int bmcr;
177 
178 	switch (cmd) {
179 	case MII_POLLSTAT:
180 		break;
181 
182 	case MII_MEDIACHG:
183 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
184 			bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_AUTOEN;
185 			PHY_WRITE(sc, MII_BMCR, bmcr);
186 			PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN);
187 		}
188 
189 		mii_phy_setmedia(sc);
190 
191 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
192 			bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_PDOWN;
193 			PHY_WRITE(sc, MII_BMCR, bmcr);
194 
195 			if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
196 				PHY_WRITE(sc, MII_BMCR,
197 				    bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
198 			}
199 		}
200 		break;
201 
202 	case MII_TICK:
203 		if (mii_phy_tick(sc) == EJUSTRETURN)
204 			return (0);
205 		break;
206 	}
207 
208 	/* Update the media status. */
209 	PHY_STATUS(sc);
210 
211 	/* Callback if something changed. */
212 	mii_phy_update(sc, cmd);
213 	return (0);
214 }
215 
216 static void
217 truephy_reset(struct mii_softc *sc)
218 {
219 	int i;
220 
221 	if (sc->mii_mpd_model == MII_MODEL_AGERE_ET1011) {
222 		mii_phy_reset(sc);
223 		return;
224 	}
225 
226 	for (i = 0; i < 2; ++i) {
227 		PHY_READ(sc, MII_PHYIDR1);
228 		PHY_READ(sc, MII_PHYIDR2);
229 
230 		PHY_READ(sc, TRUEPHY_CTRL);
231 		PHY_WRITE(sc, TRUEPHY_CTRL,
232 			  TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1);
233 
234 		PHY_WRITE(sc, TRUEPHY_INDEX, TRUEPHY_INDEX_MAGIC);
235 		PHY_READ(sc, TRUEPHY_DATA);
236 
237 		PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1);
238 	}
239 
240 	PHY_READ(sc, MII_BMCR);
241 	PHY_READ(sc, TRUEPHY_CTRL);
242 	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
243 	PHY_WRITE(sc, TRUEPHY_CTRL,
244 		  TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1 | TRUEPHY_CTRL_RSV0);
245 
246 	for (i = 0; i < nitems(truephy_dspcode); ++i) {
247 		const struct truephy_dsp *dsp = &truephy_dspcode[i];
248 
249 		PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index);
250 		PHY_WRITE(sc, TRUEPHY_DATA, dsp->data);
251 
252 		PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index);
253 		PHY_READ(sc, TRUEPHY_DATA);
254 	}
255 
256 	PHY_READ(sc, MII_BMCR);
257 	PHY_READ(sc, TRUEPHY_CTRL);
258 	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN |  BMCR_S1000);
259 	PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1);
260 
261 	mii_phy_reset(sc);
262 
263 	if (TRUEPHY_FRAMELEN((if_getmtu(sc->mii_pdata->mii_ifp)) > 2048)) {
264 		int conf;
265 
266 		conf = PHY_READ(sc, TRUEPHY_CONF);
267 		conf &= ~TRUEPHY_CONF_TXFIFO_MASK;
268 		conf |= TRUEPHY_CONF_TXFIFO_24;
269 		PHY_WRITE(sc, TRUEPHY_CONF, conf);
270 	}
271 }
272 
273 static void
274 truephy_status(struct mii_softc *sc)
275 {
276 	struct mii_data *mii = sc->mii_pdata;
277 	int bmsr, bmcr, sr;
278 
279 	mii->mii_media_status = IFM_AVALID;
280 	mii->mii_media_active = IFM_ETHER;
281 
282 	sr = PHY_READ(sc, TRUEPHY_SR);
283 	bmcr = PHY_READ(sc, MII_BMCR);
284 
285 	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
286 	if (bmsr & BMSR_LINK)
287 		mii->mii_media_status |= IFM_ACTIVE;
288 
289 	if (bmcr & BMCR_AUTOEN) {
290 		if ((bmsr & BMSR_ACOMP) == 0) {
291 			mii->mii_media_active |= IFM_NONE;
292 			return;
293 		}
294 	}
295 
296 	switch (sr & TRUEPHY_SR_SPD_MASK) {
297 	case TRUEPHY_SR_SPD_1000T:
298 		mii->mii_media_active |= IFM_1000_T;
299 		break;
300 	case TRUEPHY_SR_SPD_100TX:
301 		mii->mii_media_active |= IFM_100_TX;
302 		break;
303 	case TRUEPHY_SR_SPD_10T:
304 		mii->mii_media_active |= IFM_10_T;
305 		break;
306 	default:
307 		/* XXX will this ever happen? */
308 		printf("invalid media SR %#x\n", sr);
309 		mii->mii_media_active |= IFM_NONE;
310 		return;
311 	}
312 
313 	if (sr & TRUEPHY_SR_FDX)
314 		mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
315 	else
316 		mii->mii_media_active |= IFM_HDX;
317 }
318