xref: /freebsd/sys/dev/mlx4/cq.h (revision d6b92ffa)
1 /*
2  * Copyright (c) 2007 Cisco Systems, Inc.  All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *	- Redistributions of source code must retain the above
15  *	  copyright notice, this list of conditions and the following
16  *	  disclaimer.
17  *
18  *	- Redistributions in binary form must reproduce the above
19  *	  copyright notice, this list of conditions and the following
20  *	  disclaimer in the documentation and/or other materials
21  *	  provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 
33 #ifndef MLX4_CQ_H
34 #define MLX4_CQ_H
35 
36 #include <linux/types.h>
37 
38 #include <dev/mlx4/device.h>
39 #include <dev/mlx4/doorbell.h>
40 
41 struct mlx4_cqe {
42 	__be32			vlan_my_qpn;
43 	__be32			immed_rss_invalid;
44 	__be32			g_mlpath_rqpn;
45 	union {
46 		struct {
47 			union {
48 				struct {
49 					__be16			sl_vid;
50 					__be16	rlid;
51 				};
52 				__be32			timestamp_16_47;
53 			};
54 			__be16  status;
55 			u8      ipv6_ext_mask;
56 			u8      badfcs_enc;
57 		};
58 		struct {
59 			__be16 reserved1;
60 			u8  smac[6];
61 		};
62 	};
63 	__be32			byte_cnt;
64 	__be16			wqe_index;
65 	__be16			checksum;
66 	u8			reserved2[1];
67 	__be16			timestamp_0_15;
68 	u8			owner_sr_opcode;
69 } __packed;
70 
71 struct mlx4_err_cqe {
72 	__be32			my_qpn;
73 	u32			reserved1[5];
74 	__be16			wqe_index;
75 	u8			vendor_err_syndrome;
76 	u8			syndrome;
77 	u8			reserved2[3];
78 	u8			owner_sr_opcode;
79 };
80 
81 struct mlx4_ts_cqe {
82 	__be32			vlan_my_qpn;
83 	__be32			immed_rss_invalid;
84 	__be32			g_mlpath_rqpn;
85 	__be32			timestamp_hi;
86 	__be16			status;
87 	u8			ipv6_ext_mask;
88 	u8			badfcs_enc;
89 	__be32			byte_cnt;
90 	__be16			wqe_index;
91 	__be16			checksum;
92 	u8			reserved;
93 	__be16			timestamp_lo;
94 	u8			owner_sr_opcode;
95 } __packed;
96 
97 enum {
98 	MLX4_CQE_VLAN_PRESENT_MASK	= 1 << 29,
99 	MLX4_CQE_QPN_MASK		= 0xffffff,
100 	MLX4_CQE_VID_MASK		= 0xfff,
101 };
102 
103 enum {
104 	MLX4_CQE_OWNER_MASK	= 0x80,
105 	MLX4_CQE_IS_SEND_MASK	= 0x40,
106 	MLX4_CQE_OPCODE_MASK	= 0x1f
107 };
108 
109 enum {
110 	MLX4_CQE_SYNDROME_LOCAL_LENGTH_ERR		= 0x01,
111 	MLX4_CQE_SYNDROME_LOCAL_QP_OP_ERR		= 0x02,
112 	MLX4_CQE_SYNDROME_LOCAL_PROT_ERR		= 0x04,
113 	MLX4_CQE_SYNDROME_WR_FLUSH_ERR			= 0x05,
114 	MLX4_CQE_SYNDROME_MW_BIND_ERR			= 0x06,
115 	MLX4_CQE_SYNDROME_BAD_RESP_ERR			= 0x10,
116 	MLX4_CQE_SYNDROME_LOCAL_ACCESS_ERR		= 0x11,
117 	MLX4_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR		= 0x12,
118 	MLX4_CQE_SYNDROME_REMOTE_ACCESS_ERR		= 0x13,
119 	MLX4_CQE_SYNDROME_REMOTE_OP_ERR			= 0x14,
120 	MLX4_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR	= 0x15,
121 	MLX4_CQE_SYNDROME_RNR_RETRY_EXC_ERR		= 0x16,
122 	MLX4_CQE_SYNDROME_REMOTE_ABORTED_ERR		= 0x22,
123 };
124 
125 enum {
126 	MLX4_CQE_STATUS_IPV4		= 1 << 6,
127 	MLX4_CQE_STATUS_IPV4F		= 1 << 7,
128 	MLX4_CQE_STATUS_IPV6		= 1 << 8,
129 	MLX4_CQE_STATUS_IPV4OPT		= 1 << 9,
130 	MLX4_CQE_STATUS_TCP		= 1 << 10,
131 	MLX4_CQE_STATUS_UDP		= 1 << 11,
132 	MLX4_CQE_STATUS_IPOK		= 1 << 12,
133 };
134 
135 enum {
136 	MLX4_CQE_LLC                     = 1,
137 	MLX4_CQE_SNAP                    = 1 << 1,
138 	MLX4_CQE_BAD_FCS                 = 1 << 4,
139 };
140 
141 static inline void mlx4_cq_arm(struct mlx4_cq *cq, u32 cmd,
142 			       u8 __iomem *uar_page,
143 			       spinlock_t *doorbell_lock)
144 {
145 	__be32 doorbell[2];
146 	u32 sn;
147 	u32 ci;
148 
149 	sn = cq->arm_sn & 3;
150 	ci = cq->cons_index & 0xffffff;
151 
152 	*cq->arm_db = cpu_to_be32(sn << 28 | cmd | ci);
153 
154 	/*
155 	 * Make sure that the doorbell record in host memory is
156 	 * written before ringing the doorbell via PCI MMIO.
157 	 */
158 	wmb();
159 
160 	doorbell[0] = cpu_to_be32(sn << 28 | cmd | cq->cqn);
161 	doorbell[1] = cpu_to_be32(ci);
162 
163 	mlx4_write64(doorbell, uar_page + MLX4_CQ_DOORBELL, doorbell_lock);
164 }
165 
166 static inline void mlx4_cq_set_ci(struct mlx4_cq *cq)
167 {
168 	*cq->set_ci_db = cpu_to_be32(cq->cons_index & 0xffffff);
169 }
170 
171 enum {
172 	MLX4_CQ_DB_REQ_NOT_SOL		= 1 << 24,
173 	MLX4_CQ_DB_REQ_NOT		= 2 << 24
174 };
175 
176 int mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_cq *cq,
177 		   u16 count, u16 period);
178 int mlx4_cq_resize(struct mlx4_dev *dev, struct mlx4_cq *cq,
179 		   int entries, struct mlx4_mtt *mtt);
180 int mlx4_cq_ignore_overrun(struct mlx4_dev *dev, struct mlx4_cq *cq);
181 #endif /* MLX4_CQ_H */
182