1dc7e38acSHans Petter Selasky /*- 26c7057f7SHans Petter Selasky * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. 3dc7e38acSHans Petter Selasky * 4dc7e38acSHans Petter Selasky * Redistribution and use in source and binary forms, with or without 5dc7e38acSHans Petter Selasky * modification, are permitted provided that the following conditions 6dc7e38acSHans Petter Selasky * are met: 7dc7e38acSHans Petter Selasky * 1. Redistributions of source code must retain the above copyright 8dc7e38acSHans Petter Selasky * notice, this list of conditions and the following disclaimer. 9dc7e38acSHans Petter Selasky * 2. Redistributions in binary form must reproduce the above copyright 10dc7e38acSHans Petter Selasky * notice, this list of conditions and the following disclaimer in the 11dc7e38acSHans Petter Selasky * documentation and/or other materials provided with the distribution. 12dc7e38acSHans Petter Selasky * 13dc7e38acSHans Petter Selasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14dc7e38acSHans Petter Selasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15dc7e38acSHans Petter Selasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16dc7e38acSHans Petter Selasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17dc7e38acSHans Petter Selasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18dc7e38acSHans Petter Selasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19dc7e38acSHans Petter Selasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20dc7e38acSHans Petter Selasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21dc7e38acSHans Petter Selasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22dc7e38acSHans Petter Selasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23dc7e38acSHans Petter Selasky * SUCH DAMAGE. 24dc7e38acSHans Petter Selasky * 25dc7e38acSHans Petter Selasky * $FreeBSD$ 26dc7e38acSHans Petter Selasky */ 27dc7e38acSHans Petter Selasky 28dc7e38acSHans Petter Selasky #include <linux/interrupt.h> 29dc7e38acSHans Petter Selasky #include <linux/module.h> 30d9142151SHans Petter Selasky #include <dev/mlx5/port.h> 31dc7e38acSHans Petter Selasky #include <dev/mlx5/mlx5_ifc.h> 32dc7e38acSHans Petter Selasky #include "mlx5_core.h" 33dc7e38acSHans Petter Selasky 34278ce1c9SHans Petter Selasky #include "opt_rss.h" 35278ce1c9SHans Petter Selasky 36278ce1c9SHans Petter Selasky #ifdef RSS 37278ce1c9SHans Petter Selasky #include <net/rss_config.h> 38278ce1c9SHans Petter Selasky #include <netinet/in_rss.h> 39278ce1c9SHans Petter Selasky #endif 40278ce1c9SHans Petter Selasky 41dc7e38acSHans Petter Selasky enum { 42dc7e38acSHans Petter Selasky MLX5_EQE_SIZE = sizeof(struct mlx5_eqe), 43dc7e38acSHans Petter Selasky MLX5_EQE_OWNER_INIT_VAL = 0x1, 44dc7e38acSHans Petter Selasky }; 45dc7e38acSHans Petter Selasky 46dc7e38acSHans Petter Selasky enum { 47dc7e38acSHans Petter Selasky MLX5_NUM_SPARE_EQE = 0x80, 48dc7e38acSHans Petter Selasky MLX5_NUM_ASYNC_EQE = 0x100, 49dc7e38acSHans Petter Selasky MLX5_NUM_CMD_EQE = 32, 50dc7e38acSHans Petter Selasky }; 51dc7e38acSHans Petter Selasky 52dc7e38acSHans Petter Selasky enum { 53dc7e38acSHans Petter Selasky MLX5_EQ_DOORBEL_OFFSET = 0x40, 54dc7e38acSHans Petter Selasky }; 55dc7e38acSHans Petter Selasky 56dc7e38acSHans Petter Selasky #define MLX5_ASYNC_EVENT_MASK ((1ull << MLX5_EVENT_TYPE_PATH_MIG) | \ 57dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_COMM_EST) | \ 58dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_SQ_DRAINED) | \ 59dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_CQ_ERROR) | \ 60dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_WQ_CATAS_ERROR) | \ 61dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_PATH_MIG_FAILED) | \ 62dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR) | \ 63dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_WQ_ACCESS_ERROR) | \ 64dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_PORT_CHANGE) | \ 65dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_SRQ_CATAS_ERROR) | \ 66dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_SRQ_LAST_WQE) | \ 67dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_SRQ_RQ_LIMIT)) 68dc7e38acSHans Petter Selasky 69dc7e38acSHans Petter Selasky struct map_eq_in { 70dc7e38acSHans Petter Selasky u64 mask; 71dc7e38acSHans Petter Selasky u32 reserved; 72dc7e38acSHans Petter Selasky u32 unmap_eqn; 73dc7e38acSHans Petter Selasky }; 74dc7e38acSHans Petter Selasky 75dc7e38acSHans Petter Selasky struct cre_des_eq { 76dc7e38acSHans Petter Selasky u8 reserved[15]; 77dc7e38acSHans Petter Selasky u8 eqn; 78dc7e38acSHans Petter Selasky }; 79dc7e38acSHans Petter Selasky 80dc7e38acSHans Petter Selasky /*Function prototype*/ 81dc7e38acSHans Petter Selasky static void mlx5_port_module_event(struct mlx5_core_dev *dev, 82dc7e38acSHans Petter Selasky struct mlx5_eqe *eqe); 836c7057f7SHans Petter Selasky static void mlx5_port_general_notification_event(struct mlx5_core_dev *dev, 846c7057f7SHans Petter Selasky struct mlx5_eqe *eqe); 85dc7e38acSHans Petter Selasky 86dc7e38acSHans Petter Selasky static int mlx5_cmd_destroy_eq(struct mlx5_core_dev *dev, u8 eqn) 87dc7e38acSHans Petter Selasky { 88788333d9SHans Petter Selasky u32 in[MLX5_ST_SZ_DW(destroy_eq_in)] = {0}; 89788333d9SHans Petter Selasky u32 out[MLX5_ST_SZ_DW(destroy_eq_out)] = {0}; 90dc7e38acSHans Petter Selasky 91dc7e38acSHans Petter Selasky MLX5_SET(destroy_eq_in, in, opcode, MLX5_CMD_OP_DESTROY_EQ); 92dc7e38acSHans Petter Selasky MLX5_SET(destroy_eq_in, in, eq_number, eqn); 93dc7e38acSHans Petter Selasky 94788333d9SHans Petter Selasky return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 95dc7e38acSHans Petter Selasky } 96dc7e38acSHans Petter Selasky 97dc7e38acSHans Petter Selasky static struct mlx5_eqe *get_eqe(struct mlx5_eq *eq, u32 entry) 98dc7e38acSHans Petter Selasky { 99dc7e38acSHans Petter Selasky return mlx5_buf_offset(&eq->buf, entry * MLX5_EQE_SIZE); 100dc7e38acSHans Petter Selasky } 101dc7e38acSHans Petter Selasky 102dc7e38acSHans Petter Selasky static struct mlx5_eqe *next_eqe_sw(struct mlx5_eq *eq) 103dc7e38acSHans Petter Selasky { 104dc7e38acSHans Petter Selasky struct mlx5_eqe *eqe = get_eqe(eq, eq->cons_index & (eq->nent - 1)); 105dc7e38acSHans Petter Selasky 106dc7e38acSHans Petter Selasky return ((eqe->owner & 1) ^ !!(eq->cons_index & eq->nent)) ? NULL : eqe; 107dc7e38acSHans Petter Selasky } 108dc7e38acSHans Petter Selasky 109dc7e38acSHans Petter Selasky static const char *eqe_type_str(u8 type) 110dc7e38acSHans Petter Selasky { 111dc7e38acSHans Petter Selasky switch (type) { 112dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_COMP: 113dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_COMP"; 114dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PATH_MIG: 115dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_PATH_MIG"; 116dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_COMM_EST: 117dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_COMM_EST"; 118dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SQ_DRAINED: 119dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_SQ_DRAINED"; 120dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 121dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_SRQ_LAST_WQE"; 122dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT: 123dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_SRQ_RQ_LIMIT"; 124dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_CQ_ERROR: 125dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_CQ_ERROR"; 126dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 127dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_WQ_CATAS_ERROR"; 128dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 129dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_PATH_MIG_FAILED"; 130dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 131dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR"; 132dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 133dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_WQ_ACCESS_ERROR"; 134dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR: 135dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_SRQ_CATAS_ERROR"; 136dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_INTERNAL_ERROR: 137dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_INTERNAL_ERROR"; 138dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PORT_CHANGE: 139dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_PORT_CHANGE"; 140dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_GPIO_EVENT: 141dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_GPIO_EVENT"; 142dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_CODING_PORT_MODULE_EVENT: 143dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_PORT_MODULE_EVENT"; 144dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_REMOTE_CONFIG: 145dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_REMOTE_CONFIG"; 146dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_DB_BF_CONGESTION: 147dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_DB_BF_CONGESTION"; 148dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_STALL_EVENT: 149dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_STALL_EVENT"; 150dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_CMD: 151dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_CMD"; 152dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PAGE_REQUEST: 153dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_PAGE_REQUEST"; 154dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_NIC_VPORT_CHANGE: 155dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_NIC_VPORT_CHANGE"; 156cb4e4a6eSHans Petter Selasky case MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT: 157cb4e4a6eSHans Petter Selasky return "MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT"; 1586c7057f7SHans Petter Selasky case MLX5_EVENT_TYPE_CODING_GENERAL_NOTIFICATION_EVENT: 1596c7057f7SHans Petter Selasky return "MLX5_EVENT_TYPE_CODING_GENERAL_NOTIFICATION_EVENT"; 160dc7e38acSHans Petter Selasky default: 161dc7e38acSHans Petter Selasky return "Unrecognized event"; 162dc7e38acSHans Petter Selasky } 163dc7e38acSHans Petter Selasky } 164dc7e38acSHans Petter Selasky 165dc7e38acSHans Petter Selasky static enum mlx5_dev_event port_subtype_event(u8 subtype) 166dc7e38acSHans Petter Selasky { 167dc7e38acSHans Petter Selasky switch (subtype) { 168dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_DOWN: 169dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_PORT_DOWN; 170dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_ACTIVE: 171dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_PORT_UP; 172dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_INITIALIZED: 173dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_PORT_INITIALIZED; 174dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_LID: 175dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_LID_CHANGE; 176dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_PKEY: 177dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_PKEY_CHANGE; 178dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_GUID: 179dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_GUID_CHANGE; 180dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_CLIENT_REREG: 181dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_CLIENT_REREG; 182dc7e38acSHans Petter Selasky } 183dc7e38acSHans Petter Selasky return -1; 184dc7e38acSHans Petter Selasky } 185dc7e38acSHans Petter Selasky 186cb4e4a6eSHans Petter Selasky static enum mlx5_dev_event dcbx_subevent(u8 subtype) 187cb4e4a6eSHans Petter Selasky { 188cb4e4a6eSHans Petter Selasky switch (subtype) { 189cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_ERROR_STATE_DCBX: 190cb4e4a6eSHans Petter Selasky return MLX5_DEV_EVENT_ERROR_STATE_DCBX; 191cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_REMOTE_CONFIG_CHANGE: 192cb4e4a6eSHans Petter Selasky return MLX5_DEV_EVENT_REMOTE_CONFIG_CHANGE; 193cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_LOCAL_OPER_CHANGE: 194cb4e4a6eSHans Petter Selasky return MLX5_DEV_EVENT_LOCAL_OPER_CHANGE; 195cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_REMOTE_CONFIG_APP_PRIORITY_CHANGE: 196cb4e4a6eSHans Petter Selasky return MLX5_DEV_EVENT_REMOTE_CONFIG_APPLICATION_PRIORITY_CHANGE; 197cb4e4a6eSHans Petter Selasky } 198cb4e4a6eSHans Petter Selasky return -1; 199cb4e4a6eSHans Petter Selasky } 200cb4e4a6eSHans Petter Selasky 201dc7e38acSHans Petter Selasky static void eq_update_ci(struct mlx5_eq *eq, int arm) 202dc7e38acSHans Petter Selasky { 203dc7e38acSHans Petter Selasky __be32 __iomem *addr = eq->doorbell + (arm ? 0 : 2); 204dc7e38acSHans Petter Selasky u32 val = (eq->cons_index & 0xffffff) | (eq->eqn << 24); 205dc7e38acSHans Petter Selasky __raw_writel((__force u32) cpu_to_be32(val), addr); 206dc7e38acSHans Petter Selasky /* We still want ordering, just not swabbing, so add a barrier */ 207dc7e38acSHans Petter Selasky mb(); 208dc7e38acSHans Petter Selasky } 209dc7e38acSHans Petter Selasky 210dc7e38acSHans Petter Selasky static int mlx5_eq_int(struct mlx5_core_dev *dev, struct mlx5_eq *eq) 211dc7e38acSHans Petter Selasky { 212dc7e38acSHans Petter Selasky struct mlx5_eqe *eqe; 213dc7e38acSHans Petter Selasky int eqes_found = 0; 214dc7e38acSHans Petter Selasky int set_ci = 0; 215dc7e38acSHans Petter Selasky u32 cqn; 216dc7e38acSHans Petter Selasky u32 rsn; 217dc7e38acSHans Petter Selasky u8 port; 218dc7e38acSHans Petter Selasky 219dc7e38acSHans Petter Selasky while ((eqe = next_eqe_sw(eq))) { 220dc7e38acSHans Petter Selasky /* 221dc7e38acSHans Petter Selasky * Make sure we read EQ entry contents after we've 222dc7e38acSHans Petter Selasky * checked the ownership bit. 223dc7e38acSHans Petter Selasky */ 224dc7e38acSHans Petter Selasky rmb(); 225dc7e38acSHans Petter Selasky 226dc7e38acSHans Petter Selasky mlx5_core_dbg(eq->dev, "eqn %d, eqe type %s\n", 227dc7e38acSHans Petter Selasky eq->eqn, eqe_type_str(eqe->type)); 228dc7e38acSHans Petter Selasky switch (eqe->type) { 229dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_COMP: 230dc7e38acSHans Petter Selasky cqn = be32_to_cpu(eqe->data.comp.cqn) & 0xffffff; 231dc7e38acSHans Petter Selasky mlx5_cq_completion(dev, cqn); 232dc7e38acSHans Petter Selasky break; 233dc7e38acSHans Petter Selasky 234dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PATH_MIG: 235dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_COMM_EST: 236dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SQ_DRAINED: 237dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 238dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 239dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 240dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 241dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 242dc7e38acSHans Petter Selasky rsn = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff; 243dc7e38acSHans Petter Selasky mlx5_core_dbg(dev, "event %s(%d) arrived on resource 0x%x\n", 244dc7e38acSHans Petter Selasky eqe_type_str(eqe->type), eqe->type, rsn); 245dc7e38acSHans Petter Selasky mlx5_rsc_event(dev, rsn, eqe->type); 246dc7e38acSHans Petter Selasky break; 247dc7e38acSHans Petter Selasky 248dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT: 249dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR: 250dc7e38acSHans Petter Selasky rsn = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff; 251dc7e38acSHans Petter Selasky mlx5_core_dbg(dev, "SRQ event %s(%d): srqn 0x%x\n", 252dc7e38acSHans Petter Selasky eqe_type_str(eqe->type), eqe->type, rsn); 253dc7e38acSHans Petter Selasky mlx5_srq_event(dev, rsn, eqe->type); 254dc7e38acSHans Petter Selasky break; 255dc7e38acSHans Petter Selasky 256dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_CMD: 257721a1a6aSSlava Shwartsman if (dev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 258721a1a6aSSlava Shwartsman mlx5_cmd_comp_handler(dev, be32_to_cpu(eqe->data.cmd.vector), 259721a1a6aSSlava Shwartsman MLX5_CMD_MODE_EVENTS); 260721a1a6aSSlava Shwartsman } 261dc7e38acSHans Petter Selasky break; 262dc7e38acSHans Petter Selasky 263dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PORT_CHANGE: 264dc7e38acSHans Petter Selasky port = (eqe->data.port.port >> 4) & 0xf; 265dc7e38acSHans Petter Selasky switch (eqe->sub_type) { 266dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_DOWN: 267dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_ACTIVE: 268dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_LID: 269dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_PKEY: 270dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_GUID: 271dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_CLIENT_REREG: 272dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_INITIALIZED: 273dc7e38acSHans Petter Selasky if (dev->event) 274dc7e38acSHans Petter Selasky dev->event(dev, port_subtype_event(eqe->sub_type), 275dc7e38acSHans Petter Selasky (unsigned long)port); 276dc7e38acSHans Petter Selasky break; 277dc7e38acSHans Petter Selasky default: 278dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "Port event with unrecognized subtype: port %d, sub_type %d\n", 279dc7e38acSHans Petter Selasky port, eqe->sub_type); 280dc7e38acSHans Petter Selasky } 281dc7e38acSHans Petter Selasky break; 282cb4e4a6eSHans Petter Selasky 283cb4e4a6eSHans Petter Selasky case MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT: 284cb4e4a6eSHans Petter Selasky port = (eqe->data.port.port >> 4) & 0xf; 285cb4e4a6eSHans Petter Selasky switch (eqe->sub_type) { 286cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_ERROR_STATE_DCBX: 287cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_REMOTE_CONFIG_CHANGE: 288cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_LOCAL_OPER_CHANGE: 289cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_REMOTE_CONFIG_APP_PRIORITY_CHANGE: 290cb4e4a6eSHans Petter Selasky if (dev->event) 291cb4e4a6eSHans Petter Selasky dev->event(dev, 292cb4e4a6eSHans Petter Selasky dcbx_subevent(eqe->sub_type), 293cb4e4a6eSHans Petter Selasky 0); 294cb4e4a6eSHans Petter Selasky break; 295cb4e4a6eSHans Petter Selasky default: 296cb4e4a6eSHans Petter Selasky mlx5_core_warn(dev, 297cb4e4a6eSHans Petter Selasky "dcbx event with unrecognized subtype: port %d, sub_type %d\n", 298cb4e4a6eSHans Petter Selasky port, eqe->sub_type); 299cb4e4a6eSHans Petter Selasky } 300cb4e4a6eSHans Petter Selasky break; 301cb4e4a6eSHans Petter Selasky 3026c7057f7SHans Petter Selasky case MLX5_EVENT_TYPE_CODING_GENERAL_NOTIFICATION_EVENT: 3036c7057f7SHans Petter Selasky mlx5_port_general_notification_event(dev, eqe); 3046c7057f7SHans Petter Selasky break; 3056c7057f7SHans Petter Selasky 306dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_CQ_ERROR: 307dc7e38acSHans Petter Selasky cqn = be32_to_cpu(eqe->data.cq_err.cqn) & 0xffffff; 308dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "CQ error on CQN 0x%x, syndrom 0x%x\n", 309dc7e38acSHans Petter Selasky cqn, eqe->data.cq_err.syndrome); 310dc7e38acSHans Petter Selasky mlx5_cq_event(dev, cqn, eqe->type); 311dc7e38acSHans Petter Selasky break; 312dc7e38acSHans Petter Selasky 313dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PAGE_REQUEST: 314dc7e38acSHans Petter Selasky { 315dc7e38acSHans Petter Selasky u16 func_id = be16_to_cpu(eqe->data.req_pages.func_id); 316dc7e38acSHans Petter Selasky s32 npages = be32_to_cpu(eqe->data.req_pages.num_pages); 317dc7e38acSHans Petter Selasky 318dc7e38acSHans Petter Selasky mlx5_core_dbg(dev, "page request for func 0x%x, npages %d\n", 319dc7e38acSHans Petter Selasky func_id, npages); 320dc7e38acSHans Petter Selasky mlx5_core_req_pages_handler(dev, func_id, npages); 321dc7e38acSHans Petter Selasky } 322dc7e38acSHans Petter Selasky break; 323dc7e38acSHans Petter Selasky 324dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_CODING_PORT_MODULE_EVENT: 325dc7e38acSHans Petter Selasky mlx5_port_module_event(dev, eqe); 326dc7e38acSHans Petter Selasky break; 327dc7e38acSHans Petter Selasky 328dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_NIC_VPORT_CHANGE: 329dc7e38acSHans Petter Selasky { 330dc7e38acSHans Petter Selasky struct mlx5_eqe_vport_change *vc_eqe = 331dc7e38acSHans Petter Selasky &eqe->data.vport_change; 332dc7e38acSHans Petter Selasky u16 vport_num = be16_to_cpu(vc_eqe->vport_num); 333dc7e38acSHans Petter Selasky 334dc7e38acSHans Petter Selasky if (dev->event) 335dc7e38acSHans Petter Selasky dev->event(dev, 336dc7e38acSHans Petter Selasky MLX5_DEV_EVENT_VPORT_CHANGE, 337dc7e38acSHans Petter Selasky (unsigned long)vport_num); 338dc7e38acSHans Petter Selasky } 339dc7e38acSHans Petter Selasky break; 340dc7e38acSHans Petter Selasky 341dc7e38acSHans Petter Selasky default: 342dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "Unhandled event 0x%x on EQ 0x%x\n", 343dc7e38acSHans Petter Selasky eqe->type, eq->eqn); 344dc7e38acSHans Petter Selasky break; 345dc7e38acSHans Petter Selasky } 346dc7e38acSHans Petter Selasky 347dc7e38acSHans Petter Selasky ++eq->cons_index; 348dc7e38acSHans Petter Selasky eqes_found = 1; 349dc7e38acSHans Petter Selasky ++set_ci; 350dc7e38acSHans Petter Selasky 351dc7e38acSHans Petter Selasky /* The HCA will think the queue has overflowed if we 352dc7e38acSHans Petter Selasky * don't tell it we've been processing events. We 353dc7e38acSHans Petter Selasky * create our EQs with MLX5_NUM_SPARE_EQE extra 354dc7e38acSHans Petter Selasky * entries, so we must update our consumer index at 355dc7e38acSHans Petter Selasky * least that often. 356dc7e38acSHans Petter Selasky */ 357dc7e38acSHans Petter Selasky if (unlikely(set_ci >= MLX5_NUM_SPARE_EQE)) { 358dc7e38acSHans Petter Selasky eq_update_ci(eq, 0); 359dc7e38acSHans Petter Selasky set_ci = 0; 360dc7e38acSHans Petter Selasky } 361dc7e38acSHans Petter Selasky } 362dc7e38acSHans Petter Selasky 363dc7e38acSHans Petter Selasky eq_update_ci(eq, 1); 364dc7e38acSHans Petter Selasky 365dc7e38acSHans Petter Selasky return eqes_found; 366dc7e38acSHans Petter Selasky } 367dc7e38acSHans Petter Selasky 368dc7e38acSHans Petter Selasky static irqreturn_t mlx5_msix_handler(int irq, void *eq_ptr) 369dc7e38acSHans Petter Selasky { 370dc7e38acSHans Petter Selasky struct mlx5_eq *eq = eq_ptr; 371dc7e38acSHans Petter Selasky struct mlx5_core_dev *dev = eq->dev; 372dc7e38acSHans Petter Selasky 373dc7e38acSHans Petter Selasky mlx5_eq_int(dev, eq); 374dc7e38acSHans Petter Selasky 375dc7e38acSHans Petter Selasky /* MSI-X vectors always belong to us */ 376dc7e38acSHans Petter Selasky return IRQ_HANDLED; 377dc7e38acSHans Petter Selasky } 378dc7e38acSHans Petter Selasky 379dc7e38acSHans Petter Selasky static void init_eq_buf(struct mlx5_eq *eq) 380dc7e38acSHans Petter Selasky { 381dc7e38acSHans Petter Selasky struct mlx5_eqe *eqe; 382dc7e38acSHans Petter Selasky int i; 383dc7e38acSHans Petter Selasky 384dc7e38acSHans Petter Selasky for (i = 0; i < eq->nent; i++) { 385dc7e38acSHans Petter Selasky eqe = get_eqe(eq, i); 386dc7e38acSHans Petter Selasky eqe->owner = MLX5_EQE_OWNER_INIT_VAL; 387dc7e38acSHans Petter Selasky } 388dc7e38acSHans Petter Selasky } 389dc7e38acSHans Petter Selasky 390dc7e38acSHans Petter Selasky int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx, 391dc7e38acSHans Petter Selasky int nent, u64 mask, const char *name, struct mlx5_uar *uar) 392dc7e38acSHans Petter Selasky { 393788333d9SHans Petter Selasky u32 out[MLX5_ST_SZ_DW(create_eq_out)] = {0}; 394dc7e38acSHans Petter Selasky struct mlx5_priv *priv = &dev->priv; 395788333d9SHans Petter Selasky __be64 *pas; 396788333d9SHans Petter Selasky void *eqc; 397dc7e38acSHans Petter Selasky int inlen; 398788333d9SHans Petter Selasky u32 *in; 399788333d9SHans Petter Selasky int err; 400dc7e38acSHans Petter Selasky 401dc7e38acSHans Petter Selasky eq->nent = roundup_pow_of_two(nent + MLX5_NUM_SPARE_EQE); 402a2485fe5SHans Petter Selasky eq->cons_index = 0; 403dc7e38acSHans Petter Selasky err = mlx5_buf_alloc(dev, eq->nent * MLX5_EQE_SIZE, 2 * PAGE_SIZE, 404dc7e38acSHans Petter Selasky &eq->buf); 405dc7e38acSHans Petter Selasky if (err) 406dc7e38acSHans Petter Selasky return err; 407dc7e38acSHans Petter Selasky 408dc7e38acSHans Petter Selasky init_eq_buf(eq); 409dc7e38acSHans Petter Selasky 410788333d9SHans Petter Selasky inlen = MLX5_ST_SZ_BYTES(create_eq_in) + 411788333d9SHans Petter Selasky MLX5_FLD_SZ_BYTES(create_eq_in, pas[0]) * eq->buf.npages; 412dc7e38acSHans Petter Selasky in = mlx5_vzalloc(inlen); 413dc7e38acSHans Petter Selasky if (!in) { 414dc7e38acSHans Petter Selasky err = -ENOMEM; 415dc7e38acSHans Petter Selasky goto err_buf; 416dc7e38acSHans Petter Selasky } 417dc7e38acSHans Petter Selasky 418788333d9SHans Petter Selasky pas = (__be64 *)MLX5_ADDR_OF(create_eq_in, in, pas); 419788333d9SHans Petter Selasky mlx5_fill_page_array(&eq->buf, pas); 420dc7e38acSHans Petter Selasky 421788333d9SHans Petter Selasky MLX5_SET(create_eq_in, in, opcode, MLX5_CMD_OP_CREATE_EQ); 422788333d9SHans Petter Selasky MLX5_SET64(create_eq_in, in, event_bitmask, mask); 423dc7e38acSHans Petter Selasky 424788333d9SHans Petter Selasky eqc = MLX5_ADDR_OF(create_eq_in, in, eq_context_entry); 425788333d9SHans Petter Selasky MLX5_SET(eqc, eqc, log_eq_size, ilog2(eq->nent)); 426788333d9SHans Petter Selasky MLX5_SET(eqc, eqc, uar_page, uar->index); 427788333d9SHans Petter Selasky MLX5_SET(eqc, eqc, intr, vecidx); 428788333d9SHans Petter Selasky MLX5_SET(eqc, eqc, log_page_size, 429788333d9SHans Petter Selasky eq->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 430788333d9SHans Petter Selasky 431788333d9SHans Petter Selasky err = mlx5_cmd_exec(dev, in, inlen, out, sizeof(out)); 432dc7e38acSHans Petter Selasky if (err) 433dc7e38acSHans Petter Selasky goto err_in; 434dc7e38acSHans Petter Selasky 435788333d9SHans Petter Selasky eq->eqn = MLX5_GET(create_eq_out, out, eq_number); 436dc7e38acSHans Petter Selasky eq->irqn = vecidx; 437dc7e38acSHans Petter Selasky eq->dev = dev; 438dc7e38acSHans Petter Selasky eq->doorbell = uar->map + MLX5_EQ_DOORBEL_OFFSET; 439dc7e38acSHans Petter Selasky snprintf(priv->irq_info[vecidx].name, MLX5_MAX_IRQ_NAME, "%s@pci:%s", 440dc7e38acSHans Petter Selasky name, pci_name(dev->pdev)); 441dc7e38acSHans Petter Selasky err = request_irq(priv->msix_arr[vecidx].vector, mlx5_msix_handler, 0, 442dc7e38acSHans Petter Selasky priv->irq_info[vecidx].name, eq); 443dc7e38acSHans Petter Selasky if (err) 444dc7e38acSHans Petter Selasky goto err_eq; 445278ce1c9SHans Petter Selasky #ifdef RSS 446278ce1c9SHans Petter Selasky if (vecidx >= MLX5_EQ_VEC_COMP_BASE) { 447278ce1c9SHans Petter Selasky u8 bucket = vecidx - MLX5_EQ_VEC_COMP_BASE; 448278ce1c9SHans Petter Selasky err = bind_irq_to_cpu(priv->msix_arr[vecidx].vector, 449278ce1c9SHans Petter Selasky rss_getcpu(bucket % rss_getnumbuckets())); 450278ce1c9SHans Petter Selasky if (err) 451278ce1c9SHans Petter Selasky goto err_irq; 452278ce1c9SHans Petter Selasky } 453278ce1c9SHans Petter Selasky #else 454278ce1c9SHans Petter Selasky if (0) 455278ce1c9SHans Petter Selasky goto err_irq; 456278ce1c9SHans Petter Selasky #endif 457dc7e38acSHans Petter Selasky 458dc7e38acSHans Petter Selasky 459dc7e38acSHans Petter Selasky /* EQs are created in ARMED state 460dc7e38acSHans Petter Selasky */ 461dc7e38acSHans Petter Selasky eq_update_ci(eq, 1); 462dc7e38acSHans Petter Selasky 463dc7e38acSHans Petter Selasky kvfree(in); 464dc7e38acSHans Petter Selasky return 0; 465dc7e38acSHans Petter Selasky 466278ce1c9SHans Petter Selasky err_irq: 467278ce1c9SHans Petter Selasky free_irq(priv->msix_arr[vecidx].vector, eq); 468dc7e38acSHans Petter Selasky 469dc7e38acSHans Petter Selasky err_eq: 470dc7e38acSHans Petter Selasky mlx5_cmd_destroy_eq(dev, eq->eqn); 471dc7e38acSHans Petter Selasky 472dc7e38acSHans Petter Selasky err_in: 473dc7e38acSHans Petter Selasky kvfree(in); 474dc7e38acSHans Petter Selasky 475dc7e38acSHans Petter Selasky err_buf: 476dc7e38acSHans Petter Selasky mlx5_buf_free(dev, &eq->buf); 477dc7e38acSHans Petter Selasky return err; 478dc7e38acSHans Petter Selasky } 479dc7e38acSHans Petter Selasky EXPORT_SYMBOL_GPL(mlx5_create_map_eq); 480dc7e38acSHans Petter Selasky 481dc7e38acSHans Petter Selasky int mlx5_destroy_unmap_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq) 482dc7e38acSHans Petter Selasky { 483dc7e38acSHans Petter Selasky int err; 484dc7e38acSHans Petter Selasky 485dc7e38acSHans Petter Selasky free_irq(dev->priv.msix_arr[eq->irqn].vector, eq); 486dc7e38acSHans Petter Selasky err = mlx5_cmd_destroy_eq(dev, eq->eqn); 487dc7e38acSHans Petter Selasky if (err) 488dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "failed to destroy a previously created eq: eqn %d\n", 489dc7e38acSHans Petter Selasky eq->eqn); 490dc7e38acSHans Petter Selasky mlx5_buf_free(dev, &eq->buf); 491dc7e38acSHans Petter Selasky 492dc7e38acSHans Petter Selasky return err; 493dc7e38acSHans Petter Selasky } 494dc7e38acSHans Petter Selasky EXPORT_SYMBOL_GPL(mlx5_destroy_unmap_eq); 495dc7e38acSHans Petter Selasky 496dc7e38acSHans Petter Selasky int mlx5_eq_init(struct mlx5_core_dev *dev) 497dc7e38acSHans Petter Selasky { 498dc7e38acSHans Petter Selasky int err; 499dc7e38acSHans Petter Selasky 500dc7e38acSHans Petter Selasky spin_lock_init(&dev->priv.eq_table.lock); 501dc7e38acSHans Petter Selasky 502dc7e38acSHans Petter Selasky err = 0; 503dc7e38acSHans Petter Selasky 504dc7e38acSHans Petter Selasky return err; 505dc7e38acSHans Petter Selasky } 506dc7e38acSHans Petter Selasky 507dc7e38acSHans Petter Selasky 508dc7e38acSHans Petter Selasky void mlx5_eq_cleanup(struct mlx5_core_dev *dev) 509dc7e38acSHans Petter Selasky { 510dc7e38acSHans Petter Selasky } 511dc7e38acSHans Petter Selasky 512dc7e38acSHans Petter Selasky int mlx5_start_eqs(struct mlx5_core_dev *dev) 513dc7e38acSHans Petter Selasky { 514dc7e38acSHans Petter Selasky struct mlx5_eq_table *table = &dev->priv.eq_table; 515a4d6b007SHans Petter Selasky u64 async_event_mask = MLX5_ASYNC_EVENT_MASK; 516dc7e38acSHans Petter Selasky int err; 517dc7e38acSHans Petter Selasky 518dc7e38acSHans Petter Selasky if (MLX5_CAP_GEN(dev, port_module_event)) 519dc7e38acSHans Petter Selasky async_event_mask |= (1ull << 520dc7e38acSHans Petter Selasky MLX5_EVENT_TYPE_CODING_PORT_MODULE_EVENT); 521dc7e38acSHans Petter Selasky 52298a998d5SHans Petter Selasky if (MLX5_CAP_GEN(dev, nic_vport_change_event)) 52398a998d5SHans Petter Selasky async_event_mask |= (1ull << 52498a998d5SHans Petter Selasky MLX5_EVENT_TYPE_NIC_VPORT_CHANGE); 52598a998d5SHans Petter Selasky 526cb4e4a6eSHans Petter Selasky if (MLX5_CAP_GEN(dev, dcbx)) 527cb4e4a6eSHans Petter Selasky async_event_mask |= (1ull << 528cb4e4a6eSHans Petter Selasky MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT); 529cb4e4a6eSHans Petter Selasky 530dc7e38acSHans Petter Selasky err = mlx5_create_map_eq(dev, &table->cmd_eq, MLX5_EQ_VEC_CMD, 531dc7e38acSHans Petter Selasky MLX5_NUM_CMD_EQE, 1ull << MLX5_EVENT_TYPE_CMD, 532dc7e38acSHans Petter Selasky "mlx5_cmd_eq", &dev->priv.uuari.uars[0]); 533dc7e38acSHans Petter Selasky if (err) { 534dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "failed to create cmd EQ %d\n", err); 535dc7e38acSHans Petter Selasky return err; 536dc7e38acSHans Petter Selasky } 537dc7e38acSHans Petter Selasky 538dc7e38acSHans Petter Selasky mlx5_cmd_use_events(dev); 539dc7e38acSHans Petter Selasky 540dc7e38acSHans Petter Selasky err = mlx5_create_map_eq(dev, &table->async_eq, MLX5_EQ_VEC_ASYNC, 541dc7e38acSHans Petter Selasky MLX5_NUM_ASYNC_EQE, async_event_mask, 542dc7e38acSHans Petter Selasky "mlx5_async_eq", &dev->priv.uuari.uars[0]); 543dc7e38acSHans Petter Selasky if (err) { 544dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "failed to create async EQ %d\n", err); 545dc7e38acSHans Petter Selasky goto err1; 546dc7e38acSHans Petter Selasky } 547dc7e38acSHans Petter Selasky 548dc7e38acSHans Petter Selasky err = mlx5_create_map_eq(dev, &table->pages_eq, 549dc7e38acSHans Petter Selasky MLX5_EQ_VEC_PAGES, 550dc7e38acSHans Petter Selasky /* TODO: sriov max_vf + */ 1, 551dc7e38acSHans Petter Selasky 1 << MLX5_EVENT_TYPE_PAGE_REQUEST, "mlx5_pages_eq", 552dc7e38acSHans Petter Selasky &dev->priv.uuari.uars[0]); 553dc7e38acSHans Petter Selasky if (err) { 554dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "failed to create pages EQ %d\n", err); 555dc7e38acSHans Petter Selasky goto err2; 556dc7e38acSHans Petter Selasky } 557dc7e38acSHans Petter Selasky 558dc7e38acSHans Petter Selasky return err; 559dc7e38acSHans Petter Selasky 560dc7e38acSHans Petter Selasky err2: 561dc7e38acSHans Petter Selasky mlx5_destroy_unmap_eq(dev, &table->async_eq); 562dc7e38acSHans Petter Selasky 563dc7e38acSHans Petter Selasky err1: 564dc7e38acSHans Petter Selasky mlx5_cmd_use_polling(dev); 565dc7e38acSHans Petter Selasky mlx5_destroy_unmap_eq(dev, &table->cmd_eq); 566dc7e38acSHans Petter Selasky return err; 567dc7e38acSHans Petter Selasky } 568dc7e38acSHans Petter Selasky 569dc7e38acSHans Petter Selasky int mlx5_stop_eqs(struct mlx5_core_dev *dev) 570dc7e38acSHans Petter Selasky { 571dc7e38acSHans Petter Selasky struct mlx5_eq_table *table = &dev->priv.eq_table; 572dc7e38acSHans Petter Selasky int err; 573dc7e38acSHans Petter Selasky 574dc7e38acSHans Petter Selasky err = mlx5_destroy_unmap_eq(dev, &table->pages_eq); 575dc7e38acSHans Petter Selasky if (err) 576dc7e38acSHans Petter Selasky return err; 577dc7e38acSHans Petter Selasky 578dc7e38acSHans Petter Selasky mlx5_destroy_unmap_eq(dev, &table->async_eq); 579dc7e38acSHans Petter Selasky mlx5_cmd_use_polling(dev); 580dc7e38acSHans Petter Selasky 581dc7e38acSHans Petter Selasky err = mlx5_destroy_unmap_eq(dev, &table->cmd_eq); 582dc7e38acSHans Petter Selasky if (err) 583dc7e38acSHans Petter Selasky mlx5_cmd_use_events(dev); 584dc7e38acSHans Petter Selasky 585dc7e38acSHans Petter Selasky return err; 586dc7e38acSHans Petter Selasky } 587dc7e38acSHans Petter Selasky 588dc7e38acSHans Petter Selasky int mlx5_core_eq_query(struct mlx5_core_dev *dev, struct mlx5_eq *eq, 589788333d9SHans Petter Selasky u32 *out, int outlen) 590dc7e38acSHans Petter Selasky { 591788333d9SHans Petter Selasky u32 in[MLX5_ST_SZ_DW(query_eq_in)] = {0}; 592dc7e38acSHans Petter Selasky 593dc7e38acSHans Petter Selasky memset(out, 0, outlen); 594788333d9SHans Petter Selasky MLX5_SET(query_eq_in, in, opcode, MLX5_CMD_OP_QUERY_EQ); 595788333d9SHans Petter Selasky MLX5_SET(query_eq_in, in, eq_number, eq->eqn); 596dc7e38acSHans Petter Selasky 597788333d9SHans Petter Selasky return mlx5_cmd_exec(dev, in, sizeof(in), out, outlen); 598dc7e38acSHans Petter Selasky } 599dc7e38acSHans Petter Selasky EXPORT_SYMBOL_GPL(mlx5_core_eq_query); 600dc7e38acSHans Petter Selasky 601dc7e38acSHans Petter Selasky static const char *mlx5_port_module_event_error_type_to_string(u8 error_type) 602dc7e38acSHans Petter Selasky { 603dc7e38acSHans Petter Selasky switch (error_type) { 604dc7e38acSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_POWER_BUDGET_EXCEEDED: 605dc7e38acSHans Petter Selasky return "Power Budget Exceeded"; 606dc7e38acSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_LONG_RANGE_FOR_NON_MLNX_CABLE_MODULE: 607dc7e38acSHans Petter Selasky return "Long Range for non MLNX cable/module"; 608dc7e38acSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_BUS_STUCK: 609dc7e38acSHans Petter Selasky return "Bus stuck(I2C or data shorted)"; 610dc7e38acSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_NO_EEPROM_RETRY_TIMEOUT: 611dc7e38acSHans Petter Selasky return "No EEPROM/retry timeout"; 612dc7e38acSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_ENFORCE_PART_NUMBER_LIST: 613dc7e38acSHans Petter Selasky return "Enforce part number list"; 614ecb4fcc4SHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_UNSUPPORTED_CABLE: 615ecb4fcc4SHans Petter Selasky return "Unsupported Cable"; 616dc7e38acSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_HIGH_TEMPERATURE: 617dc7e38acSHans Petter Selasky return "High Temperature"; 618cb4e4a6eSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_CABLE_IS_SHORTED: 619cb4e4a6eSHans Petter Selasky return "Cable is shorted"; 6200c79f82cSSlava Shwartsman case MLX5_MODULE_EVENT_ERROR_PCIE_SYSTEM_POWER_SLOT_EXCEEDED: 6210c79f82cSSlava Shwartsman return "One or more network ports have been powered " 6220c79f82cSSlava Shwartsman "down due to insufficient/unadvertised power on " 6230c79f82cSSlava Shwartsman "the PCIe slot. Please refer to the card's user " 6240c79f82cSSlava Shwartsman "manual for power specifications or contact " 6250c79f82cSSlava Shwartsman "Mellanox support."; 626dc7e38acSHans Petter Selasky 627dc7e38acSHans Petter Selasky default: 628dc7e38acSHans Petter Selasky return "Unknown error type"; 629dc7e38acSHans Petter Selasky } 630dc7e38acSHans Petter Selasky } 631dc7e38acSHans Petter Selasky 63221dd6527SHans Petter Selasky unsigned int mlx5_query_module_status(struct mlx5_core_dev *dev, int module_num) 63321dd6527SHans Petter Selasky { 63421dd6527SHans Petter Selasky if (module_num < 0 || module_num >= MLX5_MAX_PORTS) 63521dd6527SHans Petter Selasky return 0; /* undefined */ 63621dd6527SHans Petter Selasky return dev->module_status[module_num]; 63721dd6527SHans Petter Selasky } 63821dd6527SHans Petter Selasky 639dc7e38acSHans Petter Selasky static void mlx5_port_module_event(struct mlx5_core_dev *dev, 640dc7e38acSHans Petter Selasky struct mlx5_eqe *eqe) 641dc7e38acSHans Petter Selasky { 642dc7e38acSHans Petter Selasky unsigned int module_num; 643dc7e38acSHans Petter Selasky unsigned int module_status; 644dc7e38acSHans Petter Selasky unsigned int error_type; 645dc7e38acSHans Petter Selasky struct mlx5_eqe_port_module_event *module_event_eqe; 646dc7e38acSHans Petter Selasky struct pci_dev *pdev = dev->pdev; 647dc7e38acSHans Petter Selasky 648dc7e38acSHans Petter Selasky module_event_eqe = &eqe->data.port_module_event; 649dc7e38acSHans Petter Selasky 650dc7e38acSHans Petter Selasky module_num = (unsigned int)module_event_eqe->module; 651dc7e38acSHans Petter Selasky module_status = (unsigned int)module_event_eqe->module_status & 652dc7e38acSHans Petter Selasky PORT_MODULE_EVENT_MODULE_STATUS_MASK; 653dc7e38acSHans Petter Selasky error_type = (unsigned int)module_event_eqe->error_type & 654dc7e38acSHans Petter Selasky PORT_MODULE_EVENT_ERROR_TYPE_MASK; 655dc7e38acSHans Petter Selasky 656dc7e38acSHans Petter Selasky switch (module_status) { 657ecb4fcc4SHans Petter Selasky case MLX5_MODULE_STATUS_PLUGGED_ENABLED: 658ecb4fcc4SHans Petter Selasky device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, status: plugged and enabled\n", module_num); 659dc7e38acSHans Petter Selasky break; 660dc7e38acSHans Petter Selasky 661dc7e38acSHans Petter Selasky case MLX5_MODULE_STATUS_UNPLUGGED: 662cb4e4a6eSHans Petter Selasky device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, status: unplugged\n", module_num); 663dc7e38acSHans Petter Selasky break; 664dc7e38acSHans Petter Selasky 665dc7e38acSHans Petter Selasky case MLX5_MODULE_STATUS_ERROR: 666cb4e4a6eSHans Petter Selasky device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, status: error, %s\n", module_num, mlx5_port_module_event_error_type_to_string(error_type)); 667dc7e38acSHans Petter Selasky break; 668dc7e38acSHans Petter Selasky 669ecb4fcc4SHans Petter Selasky case MLX5_MODULE_STATUS_PLUGGED_DISABLED: 670ecb4fcc4SHans Petter Selasky device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, status: plugged but disabled\n", module_num); 671ecb4fcc4SHans Petter Selasky break; 672ecb4fcc4SHans Petter Selasky 673dc7e38acSHans Petter Selasky default: 674cb4e4a6eSHans Petter Selasky device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, unknown status\n", module_num); 675dc7e38acSHans Petter Selasky } 67621dd6527SHans Petter Selasky /* store module status */ 67721dd6527SHans Petter Selasky if (module_num < MLX5_MAX_PORTS) 67821dd6527SHans Petter Selasky dev->module_status[module_num] = module_status; 679dc7e38acSHans Petter Selasky } 680dc7e38acSHans Petter Selasky 6816c7057f7SHans Petter Selasky static void mlx5_port_general_notification_event(struct mlx5_core_dev *dev, 6826c7057f7SHans Petter Selasky struct mlx5_eqe *eqe) 6836c7057f7SHans Petter Selasky { 6846c7057f7SHans Petter Selasky u8 port = (eqe->data.port.port >> 4) & 0xf; 6856c7057f7SHans Petter Selasky u32 rqn = 0; 6866c7057f7SHans Petter Selasky struct mlx5_eqe_general_notification_event *general_event = NULL; 6876c7057f7SHans Petter Selasky 6886c7057f7SHans Petter Selasky switch (eqe->sub_type) { 6896c7057f7SHans Petter Selasky case MLX5_GEN_EVENT_SUBTYPE_DELAY_DROP_TIMEOUT: 6906c7057f7SHans Petter Selasky general_event = &eqe->data.general_notifications; 6916c7057f7SHans Petter Selasky rqn = be32_to_cpu(general_event->rq_user_index_delay_drop) & 6926c7057f7SHans Petter Selasky 0xffffff; 6936c7057f7SHans Petter Selasky break; 6946c7057f7SHans Petter Selasky default: 6956c7057f7SHans Petter Selasky mlx5_core_warn(dev, 6966c7057f7SHans Petter Selasky "general event with unrecognized subtype: port %d, sub_type %d\n", 6976c7057f7SHans Petter Selasky port, eqe->sub_type); 6986c7057f7SHans Petter Selasky break; 6996c7057f7SHans Petter Selasky } 7006c7057f7SHans Petter Selasky } 7016c7057f7SHans Petter Selasky 702