1dc7e38acSHans Petter Selasky /*- 26c7057f7SHans Petter Selasky * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. 3dc7e38acSHans Petter Selasky * 4dc7e38acSHans Petter Selasky * Redistribution and use in source and binary forms, with or without 5dc7e38acSHans Petter Selasky * modification, are permitted provided that the following conditions 6dc7e38acSHans Petter Selasky * are met: 7dc7e38acSHans Petter Selasky * 1. Redistributions of source code must retain the above copyright 8dc7e38acSHans Petter Selasky * notice, this list of conditions and the following disclaimer. 9dc7e38acSHans Petter Selasky * 2. Redistributions in binary form must reproduce the above copyright 10dc7e38acSHans Petter Selasky * notice, this list of conditions and the following disclaimer in the 11dc7e38acSHans Petter Selasky * documentation and/or other materials provided with the distribution. 12dc7e38acSHans Petter Selasky * 13dc7e38acSHans Petter Selasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14dc7e38acSHans Petter Selasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15dc7e38acSHans Petter Selasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16dc7e38acSHans Petter Selasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17dc7e38acSHans Petter Selasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18dc7e38acSHans Petter Selasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19dc7e38acSHans Petter Selasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20dc7e38acSHans Petter Selasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21dc7e38acSHans Petter Selasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22dc7e38acSHans Petter Selasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23dc7e38acSHans Petter Selasky * SUCH DAMAGE. 24dc7e38acSHans Petter Selasky * 25dc7e38acSHans Petter Selasky * $FreeBSD$ 26dc7e38acSHans Petter Selasky */ 27dc7e38acSHans Petter Selasky 28dc7e38acSHans Petter Selasky #include <linux/interrupt.h> 29dc7e38acSHans Petter Selasky #include <linux/module.h> 30dc7e38acSHans Petter Selasky #include <dev/mlx5/driver.h> 31dc7e38acSHans Petter Selasky #include <dev/mlx5/mlx5_ifc.h> 32dc7e38acSHans Petter Selasky #include "mlx5_core.h" 33dc7e38acSHans Petter Selasky 34278ce1c9SHans Petter Selasky #include "opt_rss.h" 35278ce1c9SHans Petter Selasky 36278ce1c9SHans Petter Selasky #ifdef RSS 37278ce1c9SHans Petter Selasky #include <net/rss_config.h> 38278ce1c9SHans Petter Selasky #include <netinet/in_rss.h> 39278ce1c9SHans Petter Selasky #endif 40278ce1c9SHans Petter Selasky 41dc7e38acSHans Petter Selasky enum { 42dc7e38acSHans Petter Selasky MLX5_EQE_SIZE = sizeof(struct mlx5_eqe), 43dc7e38acSHans Petter Selasky MLX5_EQE_OWNER_INIT_VAL = 0x1, 44dc7e38acSHans Petter Selasky }; 45dc7e38acSHans Petter Selasky 46dc7e38acSHans Petter Selasky enum { 47dc7e38acSHans Petter Selasky MLX5_NUM_SPARE_EQE = 0x80, 48dc7e38acSHans Petter Selasky MLX5_NUM_ASYNC_EQE = 0x100, 49dc7e38acSHans Petter Selasky MLX5_NUM_CMD_EQE = 32, 50dc7e38acSHans Petter Selasky }; 51dc7e38acSHans Petter Selasky 52dc7e38acSHans Petter Selasky enum { 53dc7e38acSHans Petter Selasky MLX5_EQ_DOORBEL_OFFSET = 0x40, 54dc7e38acSHans Petter Selasky }; 55dc7e38acSHans Petter Selasky 56dc7e38acSHans Petter Selasky #define MLX5_ASYNC_EVENT_MASK ((1ull << MLX5_EVENT_TYPE_PATH_MIG) | \ 57dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_COMM_EST) | \ 58dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_SQ_DRAINED) | \ 59dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_CQ_ERROR) | \ 60dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_WQ_CATAS_ERROR) | \ 61dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_PATH_MIG_FAILED) | \ 62dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR) | \ 63dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_WQ_ACCESS_ERROR) | \ 64dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_PORT_CHANGE) | \ 65dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_SRQ_CATAS_ERROR) | \ 66dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_SRQ_LAST_WQE) | \ 67dc7e38acSHans Petter Selasky (1ull << MLX5_EVENT_TYPE_SRQ_RQ_LIMIT)) 68dc7e38acSHans Petter Selasky 69dc7e38acSHans Petter Selasky struct map_eq_in { 70dc7e38acSHans Petter Selasky u64 mask; 71dc7e38acSHans Petter Selasky u32 reserved; 72dc7e38acSHans Petter Selasky u32 unmap_eqn; 73dc7e38acSHans Petter Selasky }; 74dc7e38acSHans Petter Selasky 75dc7e38acSHans Petter Selasky struct cre_des_eq { 76dc7e38acSHans Petter Selasky u8 reserved[15]; 77dc7e38acSHans Petter Selasky u8 eqn; 78dc7e38acSHans Petter Selasky }; 79dc7e38acSHans Petter Selasky 80dc7e38acSHans Petter Selasky /*Function prototype*/ 81dc7e38acSHans Petter Selasky static void mlx5_port_module_event(struct mlx5_core_dev *dev, 82dc7e38acSHans Petter Selasky struct mlx5_eqe *eqe); 836c7057f7SHans Petter Selasky static void mlx5_port_general_notification_event(struct mlx5_core_dev *dev, 846c7057f7SHans Petter Selasky struct mlx5_eqe *eqe); 85dc7e38acSHans Petter Selasky 86dc7e38acSHans Petter Selasky static int mlx5_cmd_destroy_eq(struct mlx5_core_dev *dev, u8 eqn) 87dc7e38acSHans Petter Selasky { 88dc7e38acSHans Petter Selasky u32 in[MLX5_ST_SZ_DW(destroy_eq_in)]; 89dc7e38acSHans Petter Selasky u32 out[MLX5_ST_SZ_DW(destroy_eq_out)]; 90dc7e38acSHans Petter Selasky 91dc7e38acSHans Petter Selasky memset(in, 0, sizeof(in)); 92dc7e38acSHans Petter Selasky 93dc7e38acSHans Petter Selasky MLX5_SET(destroy_eq_in, in, opcode, MLX5_CMD_OP_DESTROY_EQ); 94dc7e38acSHans Petter Selasky MLX5_SET(destroy_eq_in, in, eq_number, eqn); 95dc7e38acSHans Petter Selasky 96dc7e38acSHans Petter Selasky memset(out, 0, sizeof(out)); 97dc7e38acSHans Petter Selasky return mlx5_cmd_exec_check_status(dev, in, sizeof(in), 98dc7e38acSHans Petter Selasky out, sizeof(out)); 99dc7e38acSHans Petter Selasky } 100dc7e38acSHans Petter Selasky 101dc7e38acSHans Petter Selasky static struct mlx5_eqe *get_eqe(struct mlx5_eq *eq, u32 entry) 102dc7e38acSHans Petter Selasky { 103dc7e38acSHans Petter Selasky return mlx5_buf_offset(&eq->buf, entry * MLX5_EQE_SIZE); 104dc7e38acSHans Petter Selasky } 105dc7e38acSHans Petter Selasky 106dc7e38acSHans Petter Selasky static struct mlx5_eqe *next_eqe_sw(struct mlx5_eq *eq) 107dc7e38acSHans Petter Selasky { 108dc7e38acSHans Petter Selasky struct mlx5_eqe *eqe = get_eqe(eq, eq->cons_index & (eq->nent - 1)); 109dc7e38acSHans Petter Selasky 110dc7e38acSHans Petter Selasky return ((eqe->owner & 1) ^ !!(eq->cons_index & eq->nent)) ? NULL : eqe; 111dc7e38acSHans Petter Selasky } 112dc7e38acSHans Petter Selasky 113dc7e38acSHans Petter Selasky static const char *eqe_type_str(u8 type) 114dc7e38acSHans Petter Selasky { 115dc7e38acSHans Petter Selasky switch (type) { 116dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_COMP: 117dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_COMP"; 118dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PATH_MIG: 119dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_PATH_MIG"; 120dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_COMM_EST: 121dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_COMM_EST"; 122dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SQ_DRAINED: 123dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_SQ_DRAINED"; 124dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 125dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_SRQ_LAST_WQE"; 126dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT: 127dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_SRQ_RQ_LIMIT"; 128dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_CQ_ERROR: 129dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_CQ_ERROR"; 130dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 131dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_WQ_CATAS_ERROR"; 132dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 133dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_PATH_MIG_FAILED"; 134dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 135dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR"; 136dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 137dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_WQ_ACCESS_ERROR"; 138dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR: 139dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_SRQ_CATAS_ERROR"; 140dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_INTERNAL_ERROR: 141dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_INTERNAL_ERROR"; 142dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PORT_CHANGE: 143dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_PORT_CHANGE"; 144dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_GPIO_EVENT: 145dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_GPIO_EVENT"; 146dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_CODING_PORT_MODULE_EVENT: 147dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_PORT_MODULE_EVENT"; 148dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_REMOTE_CONFIG: 149dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_REMOTE_CONFIG"; 150dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_DB_BF_CONGESTION: 151dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_DB_BF_CONGESTION"; 152dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_STALL_EVENT: 153dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_STALL_EVENT"; 154dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_CMD: 155dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_CMD"; 156dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PAGE_REQUEST: 157dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_PAGE_REQUEST"; 158dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_NIC_VPORT_CHANGE: 159dc7e38acSHans Petter Selasky return "MLX5_EVENT_TYPE_NIC_VPORT_CHANGE"; 160cb4e4a6eSHans Petter Selasky case MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT: 161cb4e4a6eSHans Petter Selasky return "MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT"; 1626c7057f7SHans Petter Selasky case MLX5_EVENT_TYPE_CODING_GENERAL_NOTIFICATION_EVENT: 1636c7057f7SHans Petter Selasky return "MLX5_EVENT_TYPE_CODING_GENERAL_NOTIFICATION_EVENT"; 164dc7e38acSHans Petter Selasky default: 165dc7e38acSHans Petter Selasky return "Unrecognized event"; 166dc7e38acSHans Petter Selasky } 167dc7e38acSHans Petter Selasky } 168dc7e38acSHans Petter Selasky 169dc7e38acSHans Petter Selasky static enum mlx5_dev_event port_subtype_event(u8 subtype) 170dc7e38acSHans Petter Selasky { 171dc7e38acSHans Petter Selasky switch (subtype) { 172dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_DOWN: 173dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_PORT_DOWN; 174dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_ACTIVE: 175dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_PORT_UP; 176dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_INITIALIZED: 177dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_PORT_INITIALIZED; 178dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_LID: 179dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_LID_CHANGE; 180dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_PKEY: 181dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_PKEY_CHANGE; 182dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_GUID: 183dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_GUID_CHANGE; 184dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_CLIENT_REREG: 185dc7e38acSHans Petter Selasky return MLX5_DEV_EVENT_CLIENT_REREG; 186dc7e38acSHans Petter Selasky } 187dc7e38acSHans Petter Selasky return -1; 188dc7e38acSHans Petter Selasky } 189dc7e38acSHans Petter Selasky 190cb4e4a6eSHans Petter Selasky static enum mlx5_dev_event dcbx_subevent(u8 subtype) 191cb4e4a6eSHans Petter Selasky { 192cb4e4a6eSHans Petter Selasky switch (subtype) { 193cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_ERROR_STATE_DCBX: 194cb4e4a6eSHans Petter Selasky return MLX5_DEV_EVENT_ERROR_STATE_DCBX; 195cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_REMOTE_CONFIG_CHANGE: 196cb4e4a6eSHans Petter Selasky return MLX5_DEV_EVENT_REMOTE_CONFIG_CHANGE; 197cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_LOCAL_OPER_CHANGE: 198cb4e4a6eSHans Petter Selasky return MLX5_DEV_EVENT_LOCAL_OPER_CHANGE; 199cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_REMOTE_CONFIG_APP_PRIORITY_CHANGE: 200cb4e4a6eSHans Petter Selasky return MLX5_DEV_EVENT_REMOTE_CONFIG_APPLICATION_PRIORITY_CHANGE; 201cb4e4a6eSHans Petter Selasky } 202cb4e4a6eSHans Petter Selasky return -1; 203cb4e4a6eSHans Petter Selasky } 204cb4e4a6eSHans Petter Selasky 205dc7e38acSHans Petter Selasky static void eq_update_ci(struct mlx5_eq *eq, int arm) 206dc7e38acSHans Petter Selasky { 207dc7e38acSHans Petter Selasky __be32 __iomem *addr = eq->doorbell + (arm ? 0 : 2); 208dc7e38acSHans Petter Selasky u32 val = (eq->cons_index & 0xffffff) | (eq->eqn << 24); 209dc7e38acSHans Petter Selasky __raw_writel((__force u32) cpu_to_be32(val), addr); 210dc7e38acSHans Petter Selasky /* We still want ordering, just not swabbing, so add a barrier */ 211dc7e38acSHans Petter Selasky mb(); 212dc7e38acSHans Petter Selasky } 213dc7e38acSHans Petter Selasky 214dc7e38acSHans Petter Selasky static int mlx5_eq_int(struct mlx5_core_dev *dev, struct mlx5_eq *eq) 215dc7e38acSHans Petter Selasky { 216dc7e38acSHans Petter Selasky struct mlx5_eqe *eqe; 217dc7e38acSHans Petter Selasky int eqes_found = 0; 218dc7e38acSHans Petter Selasky int set_ci = 0; 219dc7e38acSHans Petter Selasky u32 cqn; 220dc7e38acSHans Petter Selasky u32 rsn; 221dc7e38acSHans Petter Selasky u8 port; 222dc7e38acSHans Petter Selasky 223dc7e38acSHans Petter Selasky while ((eqe = next_eqe_sw(eq))) { 224dc7e38acSHans Petter Selasky /* 225dc7e38acSHans Petter Selasky * Make sure we read EQ entry contents after we've 226dc7e38acSHans Petter Selasky * checked the ownership bit. 227dc7e38acSHans Petter Selasky */ 228dc7e38acSHans Petter Selasky rmb(); 229dc7e38acSHans Petter Selasky 230dc7e38acSHans Petter Selasky mlx5_core_dbg(eq->dev, "eqn %d, eqe type %s\n", 231dc7e38acSHans Petter Selasky eq->eqn, eqe_type_str(eqe->type)); 232dc7e38acSHans Petter Selasky switch (eqe->type) { 233dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_COMP: 234dc7e38acSHans Petter Selasky cqn = be32_to_cpu(eqe->data.comp.cqn) & 0xffffff; 235dc7e38acSHans Petter Selasky mlx5_cq_completion(dev, cqn); 236dc7e38acSHans Petter Selasky break; 237dc7e38acSHans Petter Selasky 238dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PATH_MIG: 239dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_COMM_EST: 240dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SQ_DRAINED: 241dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 242dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 243dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 244dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 245dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 246dc7e38acSHans Petter Selasky rsn = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff; 247dc7e38acSHans Petter Selasky mlx5_core_dbg(dev, "event %s(%d) arrived on resource 0x%x\n", 248dc7e38acSHans Petter Selasky eqe_type_str(eqe->type), eqe->type, rsn); 249dc7e38acSHans Petter Selasky mlx5_rsc_event(dev, rsn, eqe->type); 250dc7e38acSHans Petter Selasky break; 251dc7e38acSHans Petter Selasky 252dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT: 253dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR: 254dc7e38acSHans Petter Selasky rsn = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff; 255dc7e38acSHans Petter Selasky mlx5_core_dbg(dev, "SRQ event %s(%d): srqn 0x%x\n", 256dc7e38acSHans Petter Selasky eqe_type_str(eqe->type), eqe->type, rsn); 257dc7e38acSHans Petter Selasky mlx5_srq_event(dev, rsn, eqe->type); 258dc7e38acSHans Petter Selasky break; 259dc7e38acSHans Petter Selasky 260dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_CMD: 261dc7e38acSHans Petter Selasky mlx5_cmd_comp_handler(dev, be32_to_cpu(eqe->data.cmd.vector)); 262dc7e38acSHans Petter Selasky break; 263dc7e38acSHans Petter Selasky 264dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PORT_CHANGE: 265dc7e38acSHans Petter Selasky port = (eqe->data.port.port >> 4) & 0xf; 266dc7e38acSHans Petter Selasky switch (eqe->sub_type) { 267dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_DOWN: 268dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_ACTIVE: 269dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_LID: 270dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_PKEY: 271dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_GUID: 272dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_CLIENT_REREG: 273dc7e38acSHans Petter Selasky case MLX5_PORT_CHANGE_SUBTYPE_INITIALIZED: 274dc7e38acSHans Petter Selasky if (dev->event) 275dc7e38acSHans Petter Selasky dev->event(dev, port_subtype_event(eqe->sub_type), 276dc7e38acSHans Petter Selasky (unsigned long)port); 277dc7e38acSHans Petter Selasky break; 278dc7e38acSHans Petter Selasky default: 279dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "Port event with unrecognized subtype: port %d, sub_type %d\n", 280dc7e38acSHans Petter Selasky port, eqe->sub_type); 281dc7e38acSHans Petter Selasky } 282dc7e38acSHans Petter Selasky break; 283cb4e4a6eSHans Petter Selasky 284cb4e4a6eSHans Petter Selasky case MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT: 285cb4e4a6eSHans Petter Selasky port = (eqe->data.port.port >> 4) & 0xf; 286cb4e4a6eSHans Petter Selasky switch (eqe->sub_type) { 287cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_ERROR_STATE_DCBX: 288cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_REMOTE_CONFIG_CHANGE: 289cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_LOCAL_OPER_CHANGE: 290cb4e4a6eSHans Petter Selasky case MLX5_DCBX_EVENT_SUBTYPE_REMOTE_CONFIG_APP_PRIORITY_CHANGE: 291cb4e4a6eSHans Petter Selasky if (dev->event) 292cb4e4a6eSHans Petter Selasky dev->event(dev, 293cb4e4a6eSHans Petter Selasky dcbx_subevent(eqe->sub_type), 294cb4e4a6eSHans Petter Selasky 0); 295cb4e4a6eSHans Petter Selasky break; 296cb4e4a6eSHans Petter Selasky default: 297cb4e4a6eSHans Petter Selasky mlx5_core_warn(dev, 298cb4e4a6eSHans Petter Selasky "dcbx event with unrecognized subtype: port %d, sub_type %d\n", 299cb4e4a6eSHans Petter Selasky port, eqe->sub_type); 300cb4e4a6eSHans Petter Selasky } 301cb4e4a6eSHans Petter Selasky break; 302cb4e4a6eSHans Petter Selasky 3036c7057f7SHans Petter Selasky case MLX5_EVENT_TYPE_CODING_GENERAL_NOTIFICATION_EVENT: 3046c7057f7SHans Petter Selasky mlx5_port_general_notification_event(dev, eqe); 3056c7057f7SHans Petter Selasky break; 3066c7057f7SHans Petter Selasky 307dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_CQ_ERROR: 308dc7e38acSHans Petter Selasky cqn = be32_to_cpu(eqe->data.cq_err.cqn) & 0xffffff; 309dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "CQ error on CQN 0x%x, syndrom 0x%x\n", 310dc7e38acSHans Petter Selasky cqn, eqe->data.cq_err.syndrome); 311dc7e38acSHans Petter Selasky mlx5_cq_event(dev, cqn, eqe->type); 312dc7e38acSHans Petter Selasky break; 313dc7e38acSHans Petter Selasky 314dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_PAGE_REQUEST: 315dc7e38acSHans Petter Selasky { 316dc7e38acSHans Petter Selasky u16 func_id = be16_to_cpu(eqe->data.req_pages.func_id); 317dc7e38acSHans Petter Selasky s32 npages = be32_to_cpu(eqe->data.req_pages.num_pages); 318dc7e38acSHans Petter Selasky 319dc7e38acSHans Petter Selasky mlx5_core_dbg(dev, "page request for func 0x%x, npages %d\n", 320dc7e38acSHans Petter Selasky func_id, npages); 321dc7e38acSHans Petter Selasky mlx5_core_req_pages_handler(dev, func_id, npages); 322dc7e38acSHans Petter Selasky } 323dc7e38acSHans Petter Selasky break; 324dc7e38acSHans Petter Selasky 325dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_CODING_PORT_MODULE_EVENT: 326dc7e38acSHans Petter Selasky mlx5_port_module_event(dev, eqe); 327dc7e38acSHans Petter Selasky break; 328dc7e38acSHans Petter Selasky 329dc7e38acSHans Petter Selasky case MLX5_EVENT_TYPE_NIC_VPORT_CHANGE: 330dc7e38acSHans Petter Selasky { 331dc7e38acSHans Petter Selasky struct mlx5_eqe_vport_change *vc_eqe = 332dc7e38acSHans Petter Selasky &eqe->data.vport_change; 333dc7e38acSHans Petter Selasky u16 vport_num = be16_to_cpu(vc_eqe->vport_num); 334dc7e38acSHans Petter Selasky 335dc7e38acSHans Petter Selasky if (dev->event) 336dc7e38acSHans Petter Selasky dev->event(dev, 337dc7e38acSHans Petter Selasky MLX5_DEV_EVENT_VPORT_CHANGE, 338dc7e38acSHans Petter Selasky (unsigned long)vport_num); 339dc7e38acSHans Petter Selasky } 340dc7e38acSHans Petter Selasky break; 341dc7e38acSHans Petter Selasky 342dc7e38acSHans Petter Selasky default: 343dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "Unhandled event 0x%x on EQ 0x%x\n", 344dc7e38acSHans Petter Selasky eqe->type, eq->eqn); 345dc7e38acSHans Petter Selasky break; 346dc7e38acSHans Petter Selasky } 347dc7e38acSHans Petter Selasky 348dc7e38acSHans Petter Selasky ++eq->cons_index; 349dc7e38acSHans Petter Selasky eqes_found = 1; 350dc7e38acSHans Petter Selasky ++set_ci; 351dc7e38acSHans Petter Selasky 352dc7e38acSHans Petter Selasky /* The HCA will think the queue has overflowed if we 353dc7e38acSHans Petter Selasky * don't tell it we've been processing events. We 354dc7e38acSHans Petter Selasky * create our EQs with MLX5_NUM_SPARE_EQE extra 355dc7e38acSHans Petter Selasky * entries, so we must update our consumer index at 356dc7e38acSHans Petter Selasky * least that often. 357dc7e38acSHans Petter Selasky */ 358dc7e38acSHans Petter Selasky if (unlikely(set_ci >= MLX5_NUM_SPARE_EQE)) { 359dc7e38acSHans Petter Selasky eq_update_ci(eq, 0); 360dc7e38acSHans Petter Selasky set_ci = 0; 361dc7e38acSHans Petter Selasky } 362dc7e38acSHans Petter Selasky } 363dc7e38acSHans Petter Selasky 364dc7e38acSHans Petter Selasky eq_update_ci(eq, 1); 365dc7e38acSHans Petter Selasky 366dc7e38acSHans Petter Selasky return eqes_found; 367dc7e38acSHans Petter Selasky } 368dc7e38acSHans Petter Selasky 369dc7e38acSHans Petter Selasky static irqreturn_t mlx5_msix_handler(int irq, void *eq_ptr) 370dc7e38acSHans Petter Selasky { 371dc7e38acSHans Petter Selasky struct mlx5_eq *eq = eq_ptr; 372dc7e38acSHans Petter Selasky struct mlx5_core_dev *dev = eq->dev; 373dc7e38acSHans Petter Selasky 374dc7e38acSHans Petter Selasky mlx5_eq_int(dev, eq); 375dc7e38acSHans Petter Selasky 376dc7e38acSHans Petter Selasky /* MSI-X vectors always belong to us */ 377dc7e38acSHans Petter Selasky return IRQ_HANDLED; 378dc7e38acSHans Petter Selasky } 379dc7e38acSHans Petter Selasky 380dc7e38acSHans Petter Selasky static void init_eq_buf(struct mlx5_eq *eq) 381dc7e38acSHans Petter Selasky { 382dc7e38acSHans Petter Selasky struct mlx5_eqe *eqe; 383dc7e38acSHans Petter Selasky int i; 384dc7e38acSHans Petter Selasky 385dc7e38acSHans Petter Selasky for (i = 0; i < eq->nent; i++) { 386dc7e38acSHans Petter Selasky eqe = get_eqe(eq, i); 387dc7e38acSHans Petter Selasky eqe->owner = MLX5_EQE_OWNER_INIT_VAL; 388dc7e38acSHans Petter Selasky } 389dc7e38acSHans Petter Selasky } 390dc7e38acSHans Petter Selasky 391dc7e38acSHans Petter Selasky int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx, 392dc7e38acSHans Petter Selasky int nent, u64 mask, const char *name, struct mlx5_uar *uar) 393dc7e38acSHans Petter Selasky { 394dc7e38acSHans Petter Selasky struct mlx5_priv *priv = &dev->priv; 395dc7e38acSHans Petter Selasky struct mlx5_create_eq_mbox_in *in; 396dc7e38acSHans Petter Selasky struct mlx5_create_eq_mbox_out out; 397dc7e38acSHans Petter Selasky int err; 398dc7e38acSHans Petter Selasky int inlen; 399dc7e38acSHans Petter Selasky 400dc7e38acSHans Petter Selasky eq->nent = roundup_pow_of_two(nent + MLX5_NUM_SPARE_EQE); 401dc7e38acSHans Petter Selasky err = mlx5_buf_alloc(dev, eq->nent * MLX5_EQE_SIZE, 2 * PAGE_SIZE, 402dc7e38acSHans Petter Selasky &eq->buf); 403dc7e38acSHans Petter Selasky if (err) 404dc7e38acSHans Petter Selasky return err; 405dc7e38acSHans Petter Selasky 406dc7e38acSHans Petter Selasky init_eq_buf(eq); 407dc7e38acSHans Petter Selasky 408dc7e38acSHans Petter Selasky inlen = sizeof(*in) + sizeof(in->pas[0]) * eq->buf.npages; 409dc7e38acSHans Petter Selasky in = mlx5_vzalloc(inlen); 410dc7e38acSHans Petter Selasky if (!in) { 411dc7e38acSHans Petter Selasky err = -ENOMEM; 412dc7e38acSHans Petter Selasky goto err_buf; 413dc7e38acSHans Petter Selasky } 414dc7e38acSHans Petter Selasky memset(&out, 0, sizeof(out)); 415dc7e38acSHans Petter Selasky 416dc7e38acSHans Petter Selasky mlx5_fill_page_array(&eq->buf, in->pas); 417dc7e38acSHans Petter Selasky 418dc7e38acSHans Petter Selasky in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_CREATE_EQ); 419dc7e38acSHans Petter Selasky in->ctx.log_sz_usr_page = cpu_to_be32(ilog2(eq->nent) << 24 | uar->index); 420dc7e38acSHans Petter Selasky in->ctx.intr = vecidx; 421dc7e38acSHans Petter Selasky in->ctx.log_page_size = eq->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT; 422dc7e38acSHans Petter Selasky in->events_mask = cpu_to_be64(mask); 423dc7e38acSHans Petter Selasky 424dc7e38acSHans Petter Selasky err = mlx5_cmd_exec(dev, in, inlen, &out, sizeof(out)); 425dc7e38acSHans Petter Selasky if (err) 426dc7e38acSHans Petter Selasky goto err_in; 427dc7e38acSHans Petter Selasky 428dc7e38acSHans Petter Selasky if (out.hdr.status) { 429dc7e38acSHans Petter Selasky err = mlx5_cmd_status_to_err(&out.hdr); 430dc7e38acSHans Petter Selasky goto err_in; 431dc7e38acSHans Petter Selasky } 432dc7e38acSHans Petter Selasky 433dc7e38acSHans Petter Selasky eq->eqn = out.eq_number; 434dc7e38acSHans Petter Selasky eq->irqn = vecidx; 435dc7e38acSHans Petter Selasky eq->dev = dev; 436dc7e38acSHans Petter Selasky eq->doorbell = uar->map + MLX5_EQ_DOORBEL_OFFSET; 437dc7e38acSHans Petter Selasky snprintf(priv->irq_info[vecidx].name, MLX5_MAX_IRQ_NAME, "%s@pci:%s", 438dc7e38acSHans Petter Selasky name, pci_name(dev->pdev)); 439dc7e38acSHans Petter Selasky err = request_irq(priv->msix_arr[vecidx].vector, mlx5_msix_handler, 0, 440dc7e38acSHans Petter Selasky priv->irq_info[vecidx].name, eq); 441dc7e38acSHans Petter Selasky if (err) 442dc7e38acSHans Petter Selasky goto err_eq; 443278ce1c9SHans Petter Selasky #ifdef RSS 444278ce1c9SHans Petter Selasky if (vecidx >= MLX5_EQ_VEC_COMP_BASE) { 445278ce1c9SHans Petter Selasky u8 bucket = vecidx - MLX5_EQ_VEC_COMP_BASE; 446278ce1c9SHans Petter Selasky err = bind_irq_to_cpu(priv->msix_arr[vecidx].vector, 447278ce1c9SHans Petter Selasky rss_getcpu(bucket % rss_getnumbuckets())); 448278ce1c9SHans Petter Selasky if (err) 449278ce1c9SHans Petter Selasky goto err_irq; 450278ce1c9SHans Petter Selasky } 451278ce1c9SHans Petter Selasky #else 452278ce1c9SHans Petter Selasky if (0) 453278ce1c9SHans Petter Selasky goto err_irq; 454278ce1c9SHans Petter Selasky #endif 455dc7e38acSHans Petter Selasky 456dc7e38acSHans Petter Selasky 457dc7e38acSHans Petter Selasky /* EQs are created in ARMED state 458dc7e38acSHans Petter Selasky */ 459dc7e38acSHans Petter Selasky eq_update_ci(eq, 1); 460dc7e38acSHans Petter Selasky 461dc7e38acSHans Petter Selasky kvfree(in); 462dc7e38acSHans Petter Selasky return 0; 463dc7e38acSHans Petter Selasky 464278ce1c9SHans Petter Selasky err_irq: 465278ce1c9SHans Petter Selasky free_irq(priv->msix_arr[vecidx].vector, eq); 466dc7e38acSHans Petter Selasky 467dc7e38acSHans Petter Selasky err_eq: 468dc7e38acSHans Petter Selasky mlx5_cmd_destroy_eq(dev, eq->eqn); 469dc7e38acSHans Petter Selasky 470dc7e38acSHans Petter Selasky err_in: 471dc7e38acSHans Petter Selasky kvfree(in); 472dc7e38acSHans Petter Selasky 473dc7e38acSHans Petter Selasky err_buf: 474dc7e38acSHans Petter Selasky mlx5_buf_free(dev, &eq->buf); 475dc7e38acSHans Petter Selasky return err; 476dc7e38acSHans Petter Selasky } 477dc7e38acSHans Petter Selasky EXPORT_SYMBOL_GPL(mlx5_create_map_eq); 478dc7e38acSHans Petter Selasky 479dc7e38acSHans Petter Selasky int mlx5_destroy_unmap_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq) 480dc7e38acSHans Petter Selasky { 481dc7e38acSHans Petter Selasky int err; 482dc7e38acSHans Petter Selasky 483dc7e38acSHans Petter Selasky free_irq(dev->priv.msix_arr[eq->irqn].vector, eq); 484dc7e38acSHans Petter Selasky err = mlx5_cmd_destroy_eq(dev, eq->eqn); 485dc7e38acSHans Petter Selasky if (err) 486dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "failed to destroy a previously created eq: eqn %d\n", 487dc7e38acSHans Petter Selasky eq->eqn); 488dc7e38acSHans Petter Selasky mlx5_buf_free(dev, &eq->buf); 489dc7e38acSHans Petter Selasky 490dc7e38acSHans Petter Selasky return err; 491dc7e38acSHans Petter Selasky } 492dc7e38acSHans Petter Selasky EXPORT_SYMBOL_GPL(mlx5_destroy_unmap_eq); 493dc7e38acSHans Petter Selasky 494dc7e38acSHans Petter Selasky int mlx5_eq_init(struct mlx5_core_dev *dev) 495dc7e38acSHans Petter Selasky { 496dc7e38acSHans Petter Selasky int err; 497dc7e38acSHans Petter Selasky 498dc7e38acSHans Petter Selasky spin_lock_init(&dev->priv.eq_table.lock); 499dc7e38acSHans Petter Selasky 500dc7e38acSHans Petter Selasky err = 0; 501dc7e38acSHans Petter Selasky 502dc7e38acSHans Petter Selasky return err; 503dc7e38acSHans Petter Selasky } 504dc7e38acSHans Petter Selasky 505dc7e38acSHans Petter Selasky 506dc7e38acSHans Petter Selasky void mlx5_eq_cleanup(struct mlx5_core_dev *dev) 507dc7e38acSHans Petter Selasky { 508dc7e38acSHans Petter Selasky } 509dc7e38acSHans Petter Selasky 510dc7e38acSHans Petter Selasky int mlx5_start_eqs(struct mlx5_core_dev *dev) 511dc7e38acSHans Petter Selasky { 512dc7e38acSHans Petter Selasky struct mlx5_eq_table *table = &dev->priv.eq_table; 513a4d6b007SHans Petter Selasky u64 async_event_mask = MLX5_ASYNC_EVENT_MASK; 514dc7e38acSHans Petter Selasky int err; 515dc7e38acSHans Petter Selasky 516dc7e38acSHans Petter Selasky if (MLX5_CAP_GEN(dev, port_module_event)) 517dc7e38acSHans Petter Selasky async_event_mask |= (1ull << 518dc7e38acSHans Petter Selasky MLX5_EVENT_TYPE_CODING_PORT_MODULE_EVENT); 519dc7e38acSHans Petter Selasky 52098a998d5SHans Petter Selasky if (MLX5_CAP_GEN(dev, nic_vport_change_event)) 52198a998d5SHans Petter Selasky async_event_mask |= (1ull << 52298a998d5SHans Petter Selasky MLX5_EVENT_TYPE_NIC_VPORT_CHANGE); 52398a998d5SHans Petter Selasky 524cb4e4a6eSHans Petter Selasky if (MLX5_CAP_GEN(dev, dcbx)) 525cb4e4a6eSHans Petter Selasky async_event_mask |= (1ull << 526cb4e4a6eSHans Petter Selasky MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT); 527cb4e4a6eSHans Petter Selasky 528dc7e38acSHans Petter Selasky err = mlx5_create_map_eq(dev, &table->cmd_eq, MLX5_EQ_VEC_CMD, 529dc7e38acSHans Petter Selasky MLX5_NUM_CMD_EQE, 1ull << MLX5_EVENT_TYPE_CMD, 530dc7e38acSHans Petter Selasky "mlx5_cmd_eq", &dev->priv.uuari.uars[0]); 531dc7e38acSHans Petter Selasky if (err) { 532dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "failed to create cmd EQ %d\n", err); 533dc7e38acSHans Petter Selasky return err; 534dc7e38acSHans Petter Selasky } 535dc7e38acSHans Petter Selasky 536dc7e38acSHans Petter Selasky mlx5_cmd_use_events(dev); 537dc7e38acSHans Petter Selasky 538dc7e38acSHans Petter Selasky err = mlx5_create_map_eq(dev, &table->async_eq, MLX5_EQ_VEC_ASYNC, 539dc7e38acSHans Petter Selasky MLX5_NUM_ASYNC_EQE, async_event_mask, 540dc7e38acSHans Petter Selasky "mlx5_async_eq", &dev->priv.uuari.uars[0]); 541dc7e38acSHans Petter Selasky if (err) { 542dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "failed to create async EQ %d\n", err); 543dc7e38acSHans Petter Selasky goto err1; 544dc7e38acSHans Petter Selasky } 545dc7e38acSHans Petter Selasky 546dc7e38acSHans Petter Selasky err = mlx5_create_map_eq(dev, &table->pages_eq, 547dc7e38acSHans Petter Selasky MLX5_EQ_VEC_PAGES, 548dc7e38acSHans Petter Selasky /* TODO: sriov max_vf + */ 1, 549dc7e38acSHans Petter Selasky 1 << MLX5_EVENT_TYPE_PAGE_REQUEST, "mlx5_pages_eq", 550dc7e38acSHans Petter Selasky &dev->priv.uuari.uars[0]); 551dc7e38acSHans Petter Selasky if (err) { 552dc7e38acSHans Petter Selasky mlx5_core_warn(dev, "failed to create pages EQ %d\n", err); 553dc7e38acSHans Petter Selasky goto err2; 554dc7e38acSHans Petter Selasky } 555dc7e38acSHans Petter Selasky 556dc7e38acSHans Petter Selasky return err; 557dc7e38acSHans Petter Selasky 558dc7e38acSHans Petter Selasky err2: 559dc7e38acSHans Petter Selasky mlx5_destroy_unmap_eq(dev, &table->async_eq); 560dc7e38acSHans Petter Selasky 561dc7e38acSHans Petter Selasky err1: 562dc7e38acSHans Petter Selasky mlx5_cmd_use_polling(dev); 563dc7e38acSHans Petter Selasky mlx5_destroy_unmap_eq(dev, &table->cmd_eq); 564dc7e38acSHans Petter Selasky return err; 565dc7e38acSHans Petter Selasky } 566dc7e38acSHans Petter Selasky 567dc7e38acSHans Petter Selasky int mlx5_stop_eqs(struct mlx5_core_dev *dev) 568dc7e38acSHans Petter Selasky { 569dc7e38acSHans Petter Selasky struct mlx5_eq_table *table = &dev->priv.eq_table; 570dc7e38acSHans Petter Selasky int err; 571dc7e38acSHans Petter Selasky 572dc7e38acSHans Petter Selasky err = mlx5_destroy_unmap_eq(dev, &table->pages_eq); 573dc7e38acSHans Petter Selasky if (err) 574dc7e38acSHans Petter Selasky return err; 575dc7e38acSHans Petter Selasky 576dc7e38acSHans Petter Selasky mlx5_destroy_unmap_eq(dev, &table->async_eq); 577dc7e38acSHans Petter Selasky mlx5_cmd_use_polling(dev); 578dc7e38acSHans Petter Selasky 579dc7e38acSHans Petter Selasky err = mlx5_destroy_unmap_eq(dev, &table->cmd_eq); 580dc7e38acSHans Petter Selasky if (err) 581dc7e38acSHans Petter Selasky mlx5_cmd_use_events(dev); 582dc7e38acSHans Petter Selasky 583dc7e38acSHans Petter Selasky return err; 584dc7e38acSHans Petter Selasky } 585dc7e38acSHans Petter Selasky 586dc7e38acSHans Petter Selasky int mlx5_core_eq_query(struct mlx5_core_dev *dev, struct mlx5_eq *eq, 587dc7e38acSHans Petter Selasky struct mlx5_query_eq_mbox_out *out, int outlen) 588dc7e38acSHans Petter Selasky { 589dc7e38acSHans Petter Selasky struct mlx5_query_eq_mbox_in in; 590dc7e38acSHans Petter Selasky int err; 591dc7e38acSHans Petter Selasky 592dc7e38acSHans Petter Selasky memset(&in, 0, sizeof(in)); 593dc7e38acSHans Petter Selasky memset(out, 0, outlen); 594dc7e38acSHans Petter Selasky in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_QUERY_EQ); 595dc7e38acSHans Petter Selasky in.eqn = eq->eqn; 596dc7e38acSHans Petter Selasky err = mlx5_cmd_exec(dev, &in, sizeof(in), out, outlen); 597dc7e38acSHans Petter Selasky if (err) 598dc7e38acSHans Petter Selasky return err; 599dc7e38acSHans Petter Selasky 600dc7e38acSHans Petter Selasky if (out->hdr.status) 601dc7e38acSHans Petter Selasky err = mlx5_cmd_status_to_err(&out->hdr); 602dc7e38acSHans Petter Selasky 603dc7e38acSHans Petter Selasky return err; 604dc7e38acSHans Petter Selasky } 605dc7e38acSHans Petter Selasky 606dc7e38acSHans Petter Selasky EXPORT_SYMBOL_GPL(mlx5_core_eq_query); 607dc7e38acSHans Petter Selasky 608dc7e38acSHans Petter Selasky static const char *mlx5_port_module_event_error_type_to_string(u8 error_type) 609dc7e38acSHans Petter Selasky { 610dc7e38acSHans Petter Selasky switch (error_type) { 611dc7e38acSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_POWER_BUDGET_EXCEEDED: 612dc7e38acSHans Petter Selasky return "Power Budget Exceeded"; 613dc7e38acSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_LONG_RANGE_FOR_NON_MLNX_CABLE_MODULE: 614dc7e38acSHans Petter Selasky return "Long Range for non MLNX cable/module"; 615dc7e38acSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_BUS_STUCK: 616dc7e38acSHans Petter Selasky return "Bus stuck(I2C or data shorted)"; 617dc7e38acSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_NO_EEPROM_RETRY_TIMEOUT: 618dc7e38acSHans Petter Selasky return "No EEPROM/retry timeout"; 619dc7e38acSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_ENFORCE_PART_NUMBER_LIST: 620dc7e38acSHans Petter Selasky return "Enforce part number list"; 621ecb4fcc4SHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_UNSUPPORTED_CABLE: 622ecb4fcc4SHans Petter Selasky return "Unsupported Cable"; 623dc7e38acSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_HIGH_TEMPERATURE: 624dc7e38acSHans Petter Selasky return "High Temperature"; 625cb4e4a6eSHans Petter Selasky case MLX5_MODULE_EVENT_ERROR_CABLE_IS_SHORTED: 626cb4e4a6eSHans Petter Selasky return "Cable is shorted"; 627dc7e38acSHans Petter Selasky 628dc7e38acSHans Petter Selasky default: 629dc7e38acSHans Petter Selasky return "Unknown error type"; 630dc7e38acSHans Petter Selasky } 631dc7e38acSHans Petter Selasky } 632dc7e38acSHans Petter Selasky 63321dd6527SHans Petter Selasky unsigned int mlx5_query_module_status(struct mlx5_core_dev *dev, int module_num) 63421dd6527SHans Petter Selasky { 63521dd6527SHans Petter Selasky if (module_num < 0 || module_num >= MLX5_MAX_PORTS) 63621dd6527SHans Petter Selasky return 0; /* undefined */ 63721dd6527SHans Petter Selasky return dev->module_status[module_num]; 63821dd6527SHans Petter Selasky } 63921dd6527SHans Petter Selasky 640dc7e38acSHans Petter Selasky static void mlx5_port_module_event(struct mlx5_core_dev *dev, 641dc7e38acSHans Petter Selasky struct mlx5_eqe *eqe) 642dc7e38acSHans Petter Selasky { 643dc7e38acSHans Petter Selasky unsigned int module_num; 644dc7e38acSHans Petter Selasky unsigned int module_status; 645dc7e38acSHans Petter Selasky unsigned int error_type; 646dc7e38acSHans Petter Selasky struct mlx5_eqe_port_module_event *module_event_eqe; 647dc7e38acSHans Petter Selasky struct pci_dev *pdev = dev->pdev; 648dc7e38acSHans Petter Selasky 649dc7e38acSHans Petter Selasky module_event_eqe = &eqe->data.port_module_event; 650dc7e38acSHans Petter Selasky 651dc7e38acSHans Petter Selasky module_num = (unsigned int)module_event_eqe->module; 652dc7e38acSHans Petter Selasky module_status = (unsigned int)module_event_eqe->module_status & 653dc7e38acSHans Petter Selasky PORT_MODULE_EVENT_MODULE_STATUS_MASK; 654dc7e38acSHans Petter Selasky error_type = (unsigned int)module_event_eqe->error_type & 655dc7e38acSHans Petter Selasky PORT_MODULE_EVENT_ERROR_TYPE_MASK; 656dc7e38acSHans Petter Selasky 657dc7e38acSHans Petter Selasky switch (module_status) { 658ecb4fcc4SHans Petter Selasky case MLX5_MODULE_STATUS_PLUGGED_ENABLED: 659ecb4fcc4SHans Petter Selasky device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, status: plugged and enabled\n", module_num); 660dc7e38acSHans Petter Selasky break; 661dc7e38acSHans Petter Selasky 662dc7e38acSHans Petter Selasky case MLX5_MODULE_STATUS_UNPLUGGED: 663cb4e4a6eSHans Petter Selasky device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, status: unplugged\n", module_num); 664dc7e38acSHans Petter Selasky break; 665dc7e38acSHans Petter Selasky 666dc7e38acSHans Petter Selasky case MLX5_MODULE_STATUS_ERROR: 667cb4e4a6eSHans Petter Selasky device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, status: error, %s\n", module_num, mlx5_port_module_event_error_type_to_string(error_type)); 668dc7e38acSHans Petter Selasky break; 669dc7e38acSHans Petter Selasky 670ecb4fcc4SHans Petter Selasky case MLX5_MODULE_STATUS_PLUGGED_DISABLED: 671ecb4fcc4SHans Petter Selasky device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, status: plugged but disabled\n", module_num); 672ecb4fcc4SHans Petter Selasky break; 673ecb4fcc4SHans Petter Selasky 674dc7e38acSHans Petter Selasky default: 675cb4e4a6eSHans Petter Selasky device_printf((&pdev->dev)->bsddev, "INFO: ""Module %u, unknown status\n", module_num); 676dc7e38acSHans Petter Selasky } 67721dd6527SHans Petter Selasky /* store module status */ 67821dd6527SHans Petter Selasky if (module_num < MLX5_MAX_PORTS) 67921dd6527SHans Petter Selasky dev->module_status[module_num] = module_status; 680dc7e38acSHans Petter Selasky } 681dc7e38acSHans Petter Selasky 6826c7057f7SHans Petter Selasky static void mlx5_port_general_notification_event(struct mlx5_core_dev *dev, 6836c7057f7SHans Petter Selasky struct mlx5_eqe *eqe) 6846c7057f7SHans Petter Selasky { 6856c7057f7SHans Petter Selasky u8 port = (eqe->data.port.port >> 4) & 0xf; 6866c7057f7SHans Petter Selasky u32 rqn = 0; 6876c7057f7SHans Petter Selasky struct mlx5_eqe_general_notification_event *general_event = NULL; 6886c7057f7SHans Petter Selasky 6896c7057f7SHans Petter Selasky switch (eqe->sub_type) { 6906c7057f7SHans Petter Selasky case MLX5_GEN_EVENT_SUBTYPE_DELAY_DROP_TIMEOUT: 6916c7057f7SHans Petter Selasky general_event = &eqe->data.general_notifications; 6926c7057f7SHans Petter Selasky rqn = be32_to_cpu(general_event->rq_user_index_delay_drop) & 6936c7057f7SHans Petter Selasky 0xffffff; 6946c7057f7SHans Petter Selasky break; 6956c7057f7SHans Petter Selasky default: 6966c7057f7SHans Petter Selasky mlx5_core_warn(dev, 6976c7057f7SHans Petter Selasky "general event with unrecognized subtype: port %d, sub_type %d\n", 6986c7057f7SHans Petter Selasky port, eqe->sub_type); 6996c7057f7SHans Petter Selasky break; 7006c7057f7SHans Petter Selasky } 7016c7057f7SHans Petter Selasky } 7026c7057f7SHans Petter Selasky 703