1 /*- 2 * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 * 25 * $FreeBSD$ 26 */ 27 28 #include <dev/mlx5/driver.h> 29 #include <linux/module.h> 30 #include "mlx5_core.h" 31 32 static int mlx5_cmd_query_adapter(struct mlx5_core_dev *dev, u32 *out, 33 int outlen) 34 { 35 u32 in[MLX5_ST_SZ_DW(query_adapter_in)]; 36 int err; 37 38 memset(in, 0, sizeof(in)); 39 40 MLX5_SET(query_adapter_in, in, opcode, MLX5_CMD_OP_QUERY_ADAPTER); 41 42 err = mlx5_cmd_exec(dev, in, sizeof(in), out, outlen); 43 return err; 44 } 45 46 int mlx5_query_board_id(struct mlx5_core_dev *dev) 47 { 48 u32 *out; 49 int outlen = MLX5_ST_SZ_BYTES(query_adapter_out); 50 int err; 51 52 out = kzalloc(outlen, GFP_KERNEL); 53 54 err = mlx5_cmd_query_adapter(dev, out, outlen); 55 if (err) 56 goto out_out; 57 58 memcpy(dev->board_id, 59 MLX5_ADDR_OF(query_adapter_out, out, 60 query_adapter_struct.vsd_contd_psid), 61 MLX5_FLD_SZ_BYTES(query_adapter_out, 62 query_adapter_struct.vsd_contd_psid)); 63 64 out_out: 65 kfree(out); 66 67 return err; 68 } 69 70 int mlx5_core_query_vendor_id(struct mlx5_core_dev *mdev, u32 *vendor_id) 71 { 72 u32 *out; 73 int outlen = MLX5_ST_SZ_BYTES(query_adapter_out); 74 int err; 75 76 out = kzalloc(outlen, GFP_KERNEL); 77 78 err = mlx5_cmd_query_adapter(mdev, out, outlen); 79 if (err) 80 goto out_out; 81 82 *vendor_id = MLX5_GET(query_adapter_out, out, 83 query_adapter_struct.ieee_vendor_id); 84 85 out_out: 86 kfree(out); 87 88 return err; 89 } 90 EXPORT_SYMBOL(mlx5_core_query_vendor_id); 91 92 static int mlx5_core_query_special_contexts(struct mlx5_core_dev *dev) 93 { 94 u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)]; 95 u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)]; 96 int err; 97 98 memset(in, 0, sizeof(in)); 99 memset(out, 0, sizeof(out)); 100 101 MLX5_SET(query_special_contexts_in, in, opcode, 102 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS); 103 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 104 if (err) 105 return err; 106 107 dev->special_contexts.resd_lkey = MLX5_GET(query_special_contexts_out, 108 out, resd_lkey); 109 110 return err; 111 } 112 113 static int mlx5_get_qcam_reg(struct mlx5_core_dev *dev) 114 { 115 return mlx5_query_qcam_reg(dev, dev->caps.qcam, 116 MLX5_QCAM_FEATURE_ENHANCED_FEATURES, 117 MLX5_QCAM_REGS_FIRST_128); 118 } 119 120 int mlx5_query_hca_caps(struct mlx5_core_dev *dev) 121 { 122 int err; 123 124 err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL); 125 if (err) 126 return err; 127 128 if (MLX5_CAP_GEN(dev, eth_net_offloads)) { 129 err = mlx5_core_get_caps(dev, MLX5_CAP_ETHERNET_OFFLOADS); 130 if (err) 131 return err; 132 } 133 134 if (MLX5_CAP_GEN(dev, pg)) { 135 err = mlx5_core_get_caps(dev, MLX5_CAP_ODP); 136 if (err) 137 return err; 138 } 139 140 if (MLX5_CAP_GEN(dev, atomic)) { 141 err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC); 142 if (err) 143 return err; 144 } 145 146 if (MLX5_CAP_GEN(dev, roce)) { 147 err = mlx5_core_get_caps(dev, MLX5_CAP_ROCE); 148 if (err) 149 return err; 150 } 151 152 if ((MLX5_CAP_GEN(dev, port_type) == 153 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET && 154 MLX5_CAP_GEN(dev, nic_flow_table)) || 155 (MLX5_CAP_GEN(dev, port_type) == MLX5_CMD_HCA_CAP_PORT_TYPE_IB && 156 MLX5_CAP_GEN(dev, ipoib_enhanced_offloads))) { 157 err = mlx5_core_get_caps(dev, MLX5_CAP_FLOW_TABLE); 158 if (err) 159 return err; 160 } 161 162 if (MLX5_CAP_GEN(dev, eswitch_flow_table)) { 163 err = mlx5_core_get_caps(dev, MLX5_CAP_ESWITCH_FLOW_TABLE); 164 if (err) 165 return err; 166 } 167 168 if (MLX5_CAP_GEN(dev, vport_group_manager)) { 169 err = mlx5_core_get_caps(dev, MLX5_CAP_ESWITCH); 170 if (err) 171 return err; 172 } 173 174 if (MLX5_CAP_GEN(dev, snapshot)) { 175 err = mlx5_core_get_caps(dev, MLX5_CAP_SNAPSHOT); 176 if (err) 177 return err; 178 } 179 180 if (MLX5_CAP_GEN(dev, ipoib_enhanced_offloads)) { 181 err = mlx5_core_get_caps(dev, MLX5_CAP_EOIB_OFFLOADS); 182 if (err) 183 return err; 184 } 185 186 if (MLX5_CAP_GEN(dev, debug)) { 187 err = mlx5_core_get_caps(dev, MLX5_CAP_DEBUG); 188 if (err) 189 return err; 190 } 191 192 if (MLX5_CAP_GEN(dev, qos)) { 193 err = mlx5_core_get_caps(dev, MLX5_CAP_QOS); 194 if (err) 195 return err; 196 } 197 198 if (MLX5_CAP_GEN(dev, qcam_reg)) { 199 err = mlx5_get_qcam_reg(dev); 200 if (err) 201 return err; 202 } 203 204 err = mlx5_core_query_special_contexts(dev); 205 if (err) 206 return err; 207 208 return 0; 209 } 210 211 int mlx5_cmd_init_hca(struct mlx5_core_dev *dev) 212 { 213 u32 in[MLX5_ST_SZ_DW(init_hca_in)]; 214 u32 out[MLX5_ST_SZ_DW(init_hca_out)]; 215 216 memset(in, 0, sizeof(in)); 217 218 MLX5_SET(init_hca_in, in, opcode, MLX5_CMD_OP_INIT_HCA); 219 220 memset(out, 0, sizeof(out)); 221 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 222 } 223 224 int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev) 225 { 226 u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {0}; 227 u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {0}; 228 229 MLX5_SET(teardown_hca_in, in, opcode, MLX5_CMD_OP_TEARDOWN_HCA); 230 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 231 } 232 233 int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev) 234 { 235 u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {0}; 236 u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {0}; 237 int force_state; 238 int ret; 239 240 if (!MLX5_CAP_GEN(dev, force_teardown)) { 241 mlx5_core_dbg(dev, "force teardown is not supported in the firmware\n"); 242 return -EOPNOTSUPP; 243 } 244 245 MLX5_SET(teardown_hca_in, in, opcode, MLX5_CMD_OP_TEARDOWN_HCA); 246 MLX5_SET(teardown_hca_in, in, profile, MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE); 247 248 ret = mlx5_cmd_exec_polling(dev, in, sizeof(in), out, sizeof(out)); 249 if (ret) 250 return ret; 251 252 force_state = MLX5_GET(teardown_hca_out, out, force_state); 253 if (force_state == MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL) { 254 mlx5_core_err(dev, "teardown with force mode failed\n"); 255 return -EIO; 256 } 257 258 return 0; 259 } 260 261 int mlx5_core_set_dc_cnak_trace(struct mlx5_core_dev *dev, int enable, 262 u64 addr) 263 { 264 u32 in[MLX5_ST_SZ_DW(set_dc_cnak_trace_in)] = {0}; 265 u32 out[MLX5_ST_SZ_DW(set_dc_cnak_trace_out)] = {0}; 266 __be64 be_addr; 267 void *pas; 268 269 MLX5_SET(set_dc_cnak_trace_in, in, opcode, MLX5_CMD_OP_SET_DC_CNAK_TRACE); 270 MLX5_SET(set_dc_cnak_trace_in, in, enable, enable); 271 pas = MLX5_ADDR_OF(set_dc_cnak_trace_in, in, pas); 272 be_addr = cpu_to_be64(addr); 273 memcpy(MLX5_ADDR_OF(cmd_pas, pas, pa_h), &be_addr, sizeof(be_addr)); 274 275 return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out)); 276 } 277