1 /*- 2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 * 25 * $FreeBSD$ 26 */ 27 28 #include <linux/kernel.h> 29 #include <linux/module.h> 30 #include <linux/random.h> 31 #include <linux/vmalloc.h> 32 #include <linux/hardirq.h> 33 #include <linux/delay.h> 34 #include <dev/mlx5/driver.h> 35 #include <dev/mlx5/mlx5_ifc.h> 36 #include "mlx5_core.h" 37 38 #define MLX5_HEALTH_POLL_INTERVAL (2 * HZ) 39 #define MAX_MISSES 3 40 41 enum { 42 MLX5_NIC_IFC_FULL = 0, 43 MLX5_NIC_IFC_DISABLED = 1, 44 MLX5_NIC_IFC_NO_DRAM_NIC = 2, 45 MLX5_NIC_IFC_SW_RESET = 7, 46 }; 47 48 enum { 49 MLX5_DROP_NEW_HEALTH_WORK, 50 MLX5_DROP_NEW_RECOVERY_WORK, 51 }; 52 53 enum { 54 MLX5_SENSOR_NO_ERR = 0, 55 MLX5_SENSOR_PCI_COMM_ERR = 1, 56 MLX5_SENSOR_PCI_ERR = 2, 57 MLX5_SENSOR_NIC_DISABLED = 3, 58 MLX5_SENSOR_NIC_SW_RESET = 4, 59 MLX5_SENSOR_FW_SYND_RFR = 5, 60 }; 61 62 static int lock_sem_sw_reset(struct mlx5_core_dev *dev, int state) 63 { 64 int ret, err; 65 66 /* Lock GW access */ 67 ret = mlx5_pciconf_cap9_sem(dev, LOCK); 68 if (ret) { 69 mlx5_core_warn(dev, "Timed out locking gateway %d, %d\n", state, ret); 70 return ret; 71 } 72 73 ret = mlx5_pciconf_set_sem_addr_space(dev, MLX5_SEMAPHORE_SW_RESET, state); 74 if (ret && state == LOCK) { 75 if (ret == -EBUSY) 76 mlx5_core_dbg(dev, "SW reset FW semaphore already locked, another function will handle the reset\n"); 77 else 78 mlx5_core_warn(dev, "SW reset semaphore lock return %d\n", ret); 79 } 80 81 /* Unlock GW access */ 82 err = mlx5_pciconf_cap9_sem(dev, UNLOCK); 83 if (err) 84 mlx5_core_warn(dev, "Timed out unlocking gateway: state %d, err %d\n", state, err); 85 86 return ret; 87 } 88 89 static u8 get_nic_mode(struct mlx5_core_dev *dev) 90 { 91 return (ioread32be(&dev->iseg->cmdq_addr_l_sz) >> 8) & 7; 92 } 93 94 static bool sensor_fw_synd_rfr(struct mlx5_core_dev *dev) 95 { 96 struct mlx5_core_health *health = &dev->priv.health; 97 struct mlx5_health_buffer __iomem *h = health->health; 98 u32 rfr = ioread32be(&h->rfr) >> MLX5_RFR_OFFSET; 99 u8 synd = ioread8(&h->synd); 100 101 if (rfr && synd) 102 mlx5_core_dbg(dev, "FW requests reset, synd: %d\n", synd); 103 return rfr && synd; 104 } 105 106 static void mlx5_trigger_cmd_completions(struct mlx5_core_dev *dev) 107 { 108 unsigned long flags; 109 u64 vector; 110 111 /* wait for pending handlers to complete */ 112 synchronize_irq(dev->priv.msix_arr[MLX5_EQ_VEC_CMD].vector); 113 spin_lock_irqsave(&dev->cmd.alloc_lock, flags); 114 vector = ~dev->cmd.bitmask & ((1ul << (1 << dev->cmd.log_sz)) - 1); 115 if (!vector) 116 goto no_trig; 117 118 vector |= MLX5_TRIGGERED_CMD_COMP; 119 spin_unlock_irqrestore(&dev->cmd.alloc_lock, flags); 120 121 mlx5_core_dbg(dev, "vector 0x%jx\n", (uintmax_t)vector); 122 mlx5_cmd_comp_handler(dev, vector); 123 return; 124 125 no_trig: 126 spin_unlock_irqrestore(&dev->cmd.alloc_lock, flags); 127 } 128 129 static bool sensor_pci_no_comm(struct mlx5_core_dev *dev) 130 { 131 struct mlx5_core_health *health = &dev->priv.health; 132 struct mlx5_health_buffer __iomem *h = health->health; 133 bool err = ioread32be(&h->fw_ver) == 0xffffffff; 134 135 return err; 136 } 137 138 static bool sensor_nic_disabled(struct mlx5_core_dev *dev) 139 { 140 return get_nic_mode(dev) == MLX5_NIC_IFC_DISABLED; 141 } 142 143 static bool sensor_nic_sw_reset(struct mlx5_core_dev *dev) 144 { 145 return get_nic_mode(dev) == MLX5_NIC_IFC_SW_RESET; 146 } 147 148 static u32 check_fatal_sensors(struct mlx5_core_dev *dev) 149 { 150 if (sensor_pci_no_comm(dev)) 151 return MLX5_SENSOR_PCI_COMM_ERR; 152 if (pci_channel_offline(dev->pdev)) 153 return MLX5_SENSOR_PCI_ERR; 154 if (sensor_nic_disabled(dev)) 155 return MLX5_SENSOR_NIC_DISABLED; 156 if (sensor_nic_sw_reset(dev)) 157 return MLX5_SENSOR_NIC_SW_RESET; 158 if (sensor_fw_synd_rfr(dev)) 159 return MLX5_SENSOR_FW_SYND_RFR; 160 161 return MLX5_SENSOR_NO_ERR; 162 } 163 164 static void reset_fw_if_needed(struct mlx5_core_dev *dev) 165 { 166 bool supported = (ioread32be(&dev->iseg->initializing) >> 167 MLX5_FW_RESET_SUPPORTED_OFFSET) & 1; 168 u32 cmdq_addr, fatal_error; 169 170 if (!supported) 171 return; 172 173 /* The reset only needs to be issued by one PF. The health buffer is 174 * shared between all functions, and will be cleared during a reset. 175 * Check again to avoid a redundant 2nd reset. If the fatal erros was 176 * PCI related a reset won't help. 177 */ 178 fatal_error = check_fatal_sensors(dev); 179 if (fatal_error == MLX5_SENSOR_PCI_COMM_ERR || 180 fatal_error == MLX5_SENSOR_NIC_DISABLED || 181 fatal_error == MLX5_SENSOR_NIC_SW_RESET) { 182 mlx5_core_warn(dev, "Not issuing FW reset. Either it's already done or won't help.\n"); 183 return; 184 } 185 186 mlx5_core_warn(dev, "Issuing FW Reset\n"); 187 /* Write the NIC interface field to initiate the reset, the command 188 * interface address also resides here, don't overwrite it. 189 */ 190 cmdq_addr = ioread32be(&dev->iseg->cmdq_addr_l_sz); 191 iowrite32be((cmdq_addr & 0xFFFFF000) | 192 MLX5_NIC_IFC_SW_RESET << MLX5_NIC_IFC_OFFSET, 193 &dev->iseg->cmdq_addr_l_sz); 194 } 195 196 #define MLX5_CRDUMP_WAIT_MS 60000 197 #define MLX5_FW_RESET_WAIT_MS 1000 198 #define MLX5_NIC_STATE_POLL_MS 5 199 void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force) 200 { 201 unsigned long end, delay_ms = MLX5_CRDUMP_WAIT_MS; 202 u32 fatal_error; 203 int lock = -EBUSY; 204 205 mutex_lock(&dev->intf_state_mutex); 206 if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 207 goto unlock; 208 return; 209 } 210 211 fatal_error = check_fatal_sensors(dev); 212 213 if (fatal_error || force) { 214 if (!force) 215 mlx5_core_err(dev, "internal state error detected\n"); 216 dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; 217 mlx5_trigger_cmd_completions(dev); 218 } 219 220 if (force) 221 goto err_state_done; 222 223 if (fatal_error == MLX5_SENSOR_FW_SYND_RFR) { 224 if (mlx5_core_is_pf(dev)) 225 lock = lock_sem_sw_reset(dev, LOCK); 226 227 if (lock != -EBUSY) { 228 reset_fw_if_needed(dev); 229 delay_ms = MLX5_FW_RESET_WAIT_MS; 230 } 231 } 232 233 /* Recover from SW reset */ 234 end = jiffies + msecs_to_jiffies(delay_ms); 235 do { 236 if (sensor_nic_disabled(dev)) 237 break; 238 239 msleep(MLX5_NIC_STATE_POLL_MS); 240 } while (!time_after(jiffies, end)); 241 242 if (!sensor_nic_disabled(dev)) { 243 dev_err(&dev->pdev->dev, "NIC IFC still %d after %lums.\n", 244 get_nic_mode(dev), delay_ms); 245 } 246 247 /* Release FW semaphore if you are the lock owner */ 248 if (!lock) 249 lock_sem_sw_reset(dev, UNLOCK); 250 251 mlx5_core_err(dev, "system error event triggered\n"); 252 253 err_state_done: 254 mlx5_core_event(dev, MLX5_DEV_EVENT_SYS_ERROR, 0); 255 unlock: 256 mutex_unlock(&dev->intf_state_mutex); 257 } 258 259 static void mlx5_handle_bad_state(struct mlx5_core_dev *dev) 260 { 261 u8 nic_mode = get_nic_mode(dev); 262 263 if (nic_mode == MLX5_NIC_IFC_SW_RESET) { 264 /* The IFC mode field is 3 bits, so it will read 0x7 in two cases: 265 * 1. PCI has been disabled (ie. PCI-AER, PF driver unloaded 266 * and this is a VF), this is not recoverable by SW reset. 267 * Logging of this is handled elsewhere. 268 * 2. FW reset has been issued by another function, driver can 269 * be reloaded to recover after the mode switches to 270 * MLX5_NIC_IFC_DISABLED. 271 */ 272 if (dev->priv.health.fatal_error != MLX5_SENSOR_PCI_COMM_ERR) 273 mlx5_core_warn(dev, "NIC SW reset is already progress\n"); 274 else 275 mlx5_core_warn(dev, "Communication with FW over the PCI link is down\n"); 276 } else { 277 mlx5_core_warn(dev, "NIC mode %d\n", nic_mode); 278 } 279 280 mlx5_disable_device(dev); 281 } 282 283 #define MLX5_FW_RESET_WAIT_MS 1000 284 #define MLX5_NIC_STATE_POLL_MS 5 285 static void health_recover(struct work_struct *work) 286 { 287 unsigned long end = jiffies + msecs_to_jiffies(MLX5_FW_RESET_WAIT_MS); 288 struct mlx5_core_health *health; 289 struct delayed_work *dwork; 290 struct mlx5_core_dev *dev; 291 struct mlx5_priv *priv; 292 bool recover = true; 293 u8 nic_mode; 294 295 dwork = container_of(work, struct delayed_work, work); 296 health = container_of(dwork, struct mlx5_core_health, recover_work); 297 priv = container_of(health, struct mlx5_priv, health); 298 dev = container_of(priv, struct mlx5_core_dev, priv); 299 300 if (sensor_pci_no_comm(dev)) { 301 dev_err(&dev->pdev->dev, "health recovery flow aborted, PCI reads still not working\n"); 302 recover = false; 303 } 304 305 nic_mode = get_nic_mode(dev); 306 while (nic_mode != MLX5_NIC_IFC_DISABLED && 307 !time_after(jiffies, end)) { 308 msleep(MLX5_NIC_STATE_POLL_MS); 309 nic_mode = get_nic_mode(dev); 310 } 311 312 if (nic_mode != MLX5_NIC_IFC_DISABLED) { 313 dev_err(&dev->pdev->dev, "health recovery flow aborted, unexpected NIC IFC mode %d.\n", 314 nic_mode); 315 recover = false; 316 } 317 318 if (recover) { 319 dev_err(&dev->pdev->dev, "starting health recovery flow\n"); 320 mlx5_recover_device(dev); 321 } 322 } 323 324 /* How much time to wait until health resetting the driver (in msecs) */ 325 #define MLX5_RECOVERY_DELAY_MSECS 60000 326 #define MLX5_RECOVERY_NO_DELAY 0 327 static unsigned long get_recovery_delay(struct mlx5_core_dev *dev) 328 { 329 return dev->priv.health.fatal_error == MLX5_SENSOR_PCI_ERR || 330 dev->priv.health.fatal_error == MLX5_SENSOR_PCI_COMM_ERR ? 331 MLX5_RECOVERY_DELAY_MSECS : MLX5_RECOVERY_NO_DELAY; 332 } 333 334 static void health_care(struct work_struct *work) 335 { 336 struct mlx5_core_health *health; 337 unsigned long recover_delay; 338 struct mlx5_core_dev *dev; 339 struct mlx5_priv *priv; 340 unsigned long flags; 341 342 health = container_of(work, struct mlx5_core_health, work); 343 priv = container_of(health, struct mlx5_priv, health); 344 dev = container_of(priv, struct mlx5_core_dev, priv); 345 346 mlx5_core_warn(dev, "handling bad device here\n"); 347 mlx5_handle_bad_state(dev); 348 recover_delay = msecs_to_jiffies(get_recovery_delay(dev)); 349 350 spin_lock_irqsave(&health->wq_lock, flags); 351 if (!test_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags)) { 352 mlx5_core_warn(dev, "Scheduling recovery work with %lums delay\n", 353 recover_delay); 354 schedule_delayed_work(&health->recover_work, recover_delay); 355 } else { 356 dev_err(&dev->pdev->dev, 357 "new health works are not permitted at this stage\n"); 358 } 359 spin_unlock_irqrestore(&health->wq_lock, flags); 360 } 361 362 static int get_next_poll_jiffies(void) 363 { 364 unsigned long next; 365 366 get_random_bytes(&next, sizeof(next)); 367 next %= HZ; 368 next += jiffies + MLX5_HEALTH_POLL_INTERVAL; 369 370 return next; 371 } 372 373 void mlx5_trigger_health_work(struct mlx5_core_dev *dev) 374 { 375 struct mlx5_core_health *health = &dev->priv.health; 376 unsigned long flags; 377 378 spin_lock_irqsave(&health->wq_lock, flags); 379 if (!test_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags)) 380 queue_work(health->wq, &health->work); 381 else 382 dev_err(&dev->pdev->dev, 383 "new health works are not permitted at this stage\n"); 384 spin_unlock_irqrestore(&health->wq_lock, flags); 385 } 386 387 static const char *hsynd_str(u8 synd) 388 { 389 switch (synd) { 390 case MLX5_HEALTH_SYNDR_FW_ERR: 391 return "firmware internal error"; 392 case MLX5_HEALTH_SYNDR_IRISC_ERR: 393 return "irisc not responding"; 394 case MLX5_HEALTH_SYNDR_HW_UNRECOVERABLE_ERR: 395 return "unrecoverable hardware error"; 396 case MLX5_HEALTH_SYNDR_CRC_ERR: 397 return "firmware CRC error"; 398 case MLX5_HEALTH_SYNDR_FETCH_PCI_ERR: 399 return "ICM fetch PCI error"; 400 case MLX5_HEALTH_SYNDR_HW_FTL_ERR: 401 return "HW fatal error\n"; 402 case MLX5_HEALTH_SYNDR_ASYNC_EQ_OVERRUN_ERR: 403 return "async EQ buffer overrun"; 404 case MLX5_HEALTH_SYNDR_EQ_ERR: 405 return "EQ error"; 406 case MLX5_HEALTH_SYNDR_EQ_INV: 407 return "Invalid EQ referenced"; 408 case MLX5_HEALTH_SYNDR_FFSER_ERR: 409 return "FFSER error"; 410 case MLX5_HEALTH_SYNDR_HIGH_TEMP: 411 return "High temprature"; 412 default: 413 return "unrecognized error"; 414 } 415 } 416 417 static void print_health_info(struct mlx5_core_dev *dev) 418 { 419 struct mlx5_core_health *health = &dev->priv.health; 420 struct mlx5_health_buffer __iomem *h = health->health; 421 char fw_str[18]; 422 u32 fw; 423 int i; 424 425 /* If the syndrom is 0, the device is OK and no need to print buffer */ 426 if (!ioread8(&h->synd)) 427 return; 428 429 for (i = 0; i < ARRAY_SIZE(h->assert_var); i++) 430 printf("mlx5_core: INFO: ""assert_var[%d] 0x%08x\n", i, ioread32be(h->assert_var + i)); 431 432 printf("mlx5_core: INFO: ""assert_exit_ptr 0x%08x\n", ioread32be(&h->assert_exit_ptr)); 433 printf("mlx5_core: INFO: ""assert_callra 0x%08x\n", ioread32be(&h->assert_callra)); 434 snprintf(fw_str, sizeof(fw_str), "%d.%d.%d", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev)); 435 printf("mlx5_core: INFO: ""fw_ver %s\n", fw_str); 436 printf("mlx5_core: INFO: ""hw_id 0x%08x\n", ioread32be(&h->hw_id)); 437 printf("mlx5_core: INFO: ""irisc_index %d\n", ioread8(&h->irisc_index)); 438 printf("mlx5_core: INFO: ""synd 0x%x: %s\n", ioread8(&h->synd), hsynd_str(ioread8(&h->synd))); 439 printf("mlx5_core: INFO: ""ext_synd 0x%04x\n", ioread16be(&h->ext_synd)); 440 fw = ioread32be(&h->fw_ver); 441 printf("mlx5_core: INFO: ""raw fw_ver 0x%08x\n", fw); 442 } 443 444 static void poll_health(unsigned long data) 445 { 446 struct mlx5_core_dev *dev = (struct mlx5_core_dev *)data; 447 struct mlx5_core_health *health = &dev->priv.health; 448 u32 fatal_error; 449 u32 count; 450 451 if (dev->state != MLX5_DEVICE_STATE_UP) 452 return; 453 454 if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) 455 goto out; 456 457 count = ioread32be(health->health_counter); 458 if (count == health->prev) 459 ++health->miss_counter; 460 else 461 health->miss_counter = 0; 462 463 health->prev = count; 464 if (health->miss_counter == MAX_MISSES) { 465 mlx5_core_err(dev, "device's health compromised - reached miss count\n"); 466 print_health_info(dev); 467 } 468 469 fatal_error = check_fatal_sensors(dev); 470 471 if (fatal_error && !health->fatal_error) { 472 mlx5_core_err(dev, "Fatal error %u detected\n", fatal_error); 473 dev->priv.health.fatal_error = fatal_error; 474 print_health_info(dev); 475 mlx5_trigger_health_work(dev); 476 } 477 478 out: 479 mod_timer(&health->timer, get_next_poll_jiffies()); 480 } 481 482 void mlx5_start_health_poll(struct mlx5_core_dev *dev) 483 { 484 struct mlx5_core_health *health = &dev->priv.health; 485 486 init_timer(&health->timer); 487 health->fatal_error = MLX5_SENSOR_NO_ERR; 488 clear_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags); 489 clear_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags); 490 health->health = &dev->iseg->health; 491 health->health_counter = &dev->iseg->health_counter; 492 493 setup_timer(&health->timer, poll_health, (unsigned long)dev); 494 mod_timer(&health->timer, 495 round_jiffies(jiffies + MLX5_HEALTH_POLL_INTERVAL)); 496 } 497 498 void mlx5_stop_health_poll(struct mlx5_core_dev *dev) 499 { 500 struct mlx5_core_health *health = &dev->priv.health; 501 502 del_timer_sync(&health->timer); 503 } 504 505 void mlx5_drain_health_wq(struct mlx5_core_dev *dev) 506 { 507 struct mlx5_core_health *health = &dev->priv.health; 508 unsigned long flags; 509 510 spin_lock_irqsave(&health->wq_lock, flags); 511 set_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags); 512 set_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags); 513 spin_unlock_irqrestore(&health->wq_lock, flags); 514 cancel_delayed_work_sync(&health->recover_work); 515 cancel_work_sync(&health->work); 516 } 517 518 void mlx5_drain_health_recovery(struct mlx5_core_dev *dev) 519 { 520 struct mlx5_core_health *health = &dev->priv.health; 521 unsigned long flags; 522 523 spin_lock_irqsave(&health->wq_lock, flags); 524 set_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags); 525 spin_unlock_irqrestore(&health->wq_lock, flags); 526 cancel_delayed_work_sync(&dev->priv.health.recover_work); 527 } 528 529 void mlx5_health_cleanup(struct mlx5_core_dev *dev) 530 { 531 struct mlx5_core_health *health = &dev->priv.health; 532 533 destroy_workqueue(health->wq); 534 } 535 536 #define HEALTH_NAME "mlx5_health" 537 int mlx5_health_init(struct mlx5_core_dev *dev) 538 { 539 struct mlx5_core_health *health; 540 char *name; 541 int len; 542 543 health = &dev->priv.health; 544 len = strlen(HEALTH_NAME) + strlen(dev_name(&dev->pdev->dev)); 545 name = kmalloc(len + 1, GFP_KERNEL); 546 if (!name) 547 return -ENOMEM; 548 549 snprintf(name, len, "%s:%s", HEALTH_NAME, dev_name(&dev->pdev->dev)); 550 health->wq = create_singlethread_workqueue(name); 551 kfree(name); 552 if (!health->wq) 553 return -ENOMEM; 554 555 spin_lock_init(&health->wq_lock); 556 INIT_WORK(&health->work, health_care); 557 INIT_DELAYED_WORK(&health->recover_work, health_recover); 558 559 return 0; 560 } 561