xref: /freebsd/sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c (revision c1d255d3)
1 /*-
2  * Copyright (c) 2018-2020, Mellanox Technologies. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  *
25  * $FreeBSD$
26  */
27 
28 #include <rdma/ib_user_verbs.h>
29 #include <rdma/ib_verbs.h>
30 #include <rdma/uverbs_types.h>
31 #include <rdma/uverbs_ioctl.h>
32 #include <rdma/mlx5_user_ioctl_cmds.h>
33 #include <rdma/mlx5_user_ioctl_verbs.h>
34 #include <rdma/ib_umem.h>
35 #include <rdma/uverbs_std_types.h>
36 #include <dev/mlx5/driver.h>
37 #include <dev/mlx5/fs.h>
38 #include "mlx5_ib.h"
39 
40 #include <sys/priv.h>
41 
42 #include <linux/xarray.h>
43 #include <linux/rculist.h>
44 #include <linux/srcu.h>
45 #include <linux/file.h>
46 #include <linux/poll.h>
47 #include <linux/wait.h>
48 
49 #define UVERBS_MODULE_NAME mlx5_ib
50 #include <rdma/uverbs_named_ioctl.h>
51 
52 static void dispatch_event_fd(struct list_head *fd_list, const void *data);
53 
54 enum devx_obj_flags {
55 	DEVX_OBJ_FLAGS_DCT = 1 << 1,
56 	DEVX_OBJ_FLAGS_CQ = 1 << 2,
57 };
58 
59 struct devx_async_data {
60 	struct mlx5_ib_dev *mdev;
61 	struct list_head list;
62 	struct devx_async_cmd_event_file *ev_file;
63 	struct mlx5_async_work cb_work;
64 	u16 cmd_out_len;
65 	/* must be last field in this structure */
66 	struct mlx5_ib_uapi_devx_async_cmd_hdr hdr;
67 };
68 
69 struct devx_async_event_data {
70 	struct list_head list; /* headed in ev_file->event_list */
71 	struct mlx5_ib_uapi_devx_async_event_hdr hdr;
72 };
73 
74 /* first level XA value data structure */
75 struct devx_event {
76 	struct xarray object_ids; /* second XA level, Key = object id */
77 	struct list_head unaffiliated_list;
78 };
79 
80 /* second level XA value data structure */
81 struct devx_obj_event {
82 	struct rcu_head rcu;
83 	struct list_head obj_sub_list;
84 };
85 
86 struct devx_event_subscription {
87 	struct list_head file_list; /* headed in ev_file->
88 				     * subscribed_events_list
89 				     */
90 	struct list_head xa_list; /* headed in devx_event->unaffiliated_list or
91 				   * devx_obj_event->obj_sub_list
92 				   */
93 	struct list_head obj_list; /* headed in devx_object */
94 	struct list_head event_list; /* headed in ev_file->event_list or in
95 				      * temp list via subscription
96 				      */
97 
98 	u8 is_cleaned:1;
99 	u32 xa_key_level1;
100 	u32 xa_key_level2;
101 	struct rcu_head	rcu;
102 	u64 cookie;
103 	struct devx_async_event_file *ev_file;
104 	struct fd eventfd;
105 };
106 
107 struct devx_async_event_file {
108 	struct ib_uobject uobj;
109 	/* Head of events that are subscribed to this FD */
110 	struct list_head subscribed_events_list;
111 	spinlock_t lock;
112 	wait_queue_head_t poll_wait;
113 	struct list_head event_list;
114 	struct mlx5_ib_dev *dev;
115 	u8 omit_data:1;
116 	u8 is_overflow_err:1;
117 	u8 is_destroyed:1;
118 };
119 
120 #define MLX5_MAX_DESTROY_INBOX_SIZE_DW MLX5_ST_SZ_DW(delete_fte_in)
121 struct devx_obj {
122 	struct mlx5_ib_dev	*ib_dev;
123 	u64			obj_id;
124 	u32			dinlen; /* destroy inbox length */
125 	u32			dinbox[MLX5_MAX_DESTROY_INBOX_SIZE_DW];
126 	u32			flags;
127 	union {
128 		struct mlx5_ib_devx_mr	devx_mr;
129 		struct mlx5_core_dct	core_dct;
130 		struct mlx5_core_cq	core_cq;
131 		u32			flow_counter_bulk_size;
132 	};
133 	struct list_head event_sub; /* holds devx_event_subscription entries */
134 };
135 
136 struct devx_umem {
137 	struct mlx5_core_dev		*mdev;
138 	struct ib_umem			*umem;
139 	u32				page_offset;
140 	int				page_shift;
141 	int				ncont;
142 	u32				dinlen;
143 	u32				dinbox[MLX5_ST_SZ_DW(general_obj_in_cmd_hdr)];
144 };
145 
146 struct devx_umem_reg_cmd {
147 	void				*in;
148 	u32				inlen;
149 	u32				out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
150 };
151 
152 static struct mlx5_ib_ucontext *
153 devx_ufile2uctx(const struct uverbs_attr_bundle *attrs)
154 {
155 	return to_mucontext(ib_uverbs_get_ucontext(attrs));
156 }
157 
158 int mlx5_ib_devx_create(struct mlx5_ib_dev *dev, bool is_user)
159 {
160 	u32 in[MLX5_ST_SZ_DW(create_uctx_in)] = {0};
161 	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};
162 	void *uctx;
163 	int err;
164 	u16 uid;
165 	u32 cap = 0;
166 
167 	/* 0 means not supported */
168 	if (!MLX5_CAP_GEN(dev->mdev, log_max_uctx))
169 		return -EINVAL;
170 
171 	uctx = MLX5_ADDR_OF(create_uctx_in, in, uctx);
172 	if (is_user && priv_check(curthread, PRIV_NET_RAW) == 0 &&
173 	    (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RAW_TX))
174 		cap |= MLX5_UCTX_CAP_RAW_TX;
175 	if (is_user && priv_check(curthread, PRIV_DRIVER) == 0 &&
176 	    (MLX5_CAP_GEN(dev->mdev, uctx_cap) &
177 	     MLX5_UCTX_CAP_INTERNAL_DEV_RES))
178 		cap |= MLX5_UCTX_CAP_INTERNAL_DEV_RES;
179 
180 	MLX5_SET(create_uctx_in, in, opcode, MLX5_CMD_OP_CREATE_UCTX);
181 	MLX5_SET(uctx, uctx, cap, cap);
182 
183 	err = mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
184 	if (err)
185 		return err;
186 
187 	uid = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
188 	return uid;
189 }
190 
191 void mlx5_ib_devx_destroy(struct mlx5_ib_dev *dev, u16 uid)
192 {
193 	u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {0};
194 	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};
195 
196 	MLX5_SET(destroy_uctx_in, in, opcode, MLX5_CMD_OP_DESTROY_UCTX);
197 	MLX5_SET(destroy_uctx_in, in, uid, uid);
198 
199 	mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
200 }
201 
202 bool mlx5_ib_devx_is_flow_dest(void *obj, int *dest_id, int *dest_type)
203 {
204 	struct devx_obj *devx_obj = obj;
205 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, devx_obj->dinbox, opcode);
206 
207 	switch (opcode) {
208 	case MLX5_CMD_OP_DESTROY_TIR:
209 		*dest_type = MLX5_FLOW_DESTINATION_TYPE_TIR;
210 		*dest_id = MLX5_GET(general_obj_in_cmd_hdr, devx_obj->dinbox,
211 				    obj_id);
212 		return true;
213 
214 	case MLX5_CMD_OP_DESTROY_FLOW_TABLE:
215 		*dest_type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
216 		*dest_id = MLX5_GET(destroy_flow_table_in, devx_obj->dinbox,
217 				    table_id);
218 		return true;
219 	default:
220 		return false;
221 	}
222 }
223 
224 bool mlx5_ib_devx_is_flow_counter(void *obj, u32 offset, u32 *counter_id)
225 {
226 	struct devx_obj *devx_obj = obj;
227 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, devx_obj->dinbox, opcode);
228 
229 	if (opcode == MLX5_CMD_OP_DEALLOC_FLOW_COUNTER) {
230 
231 		if (offset && offset >= devx_obj->flow_counter_bulk_size)
232 			return false;
233 
234 		*counter_id = MLX5_GET(dealloc_flow_counter_in,
235 				       devx_obj->dinbox,
236 				       flow_counter_id);
237 		*counter_id += offset;
238 		return true;
239 	}
240 
241 	return false;
242 }
243 
244 static bool is_legacy_unaffiliated_event_num(u16 event_num)
245 {
246 	switch (event_num) {
247 	case MLX5_EVENT_TYPE_PORT_CHANGE:
248 		return true;
249 	default:
250 		return false;
251 	}
252 }
253 
254 static bool is_legacy_obj_event_num(u16 event_num)
255 {
256 	switch (event_num) {
257 	case MLX5_EVENT_TYPE_PATH_MIG:
258 	case MLX5_EVENT_TYPE_COMM_EST:
259 	case MLX5_EVENT_TYPE_SQ_DRAINED:
260 	case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
261 	case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
262 	case MLX5_EVENT_TYPE_CQ_ERROR:
263 	case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
264 	case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
265 	case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
266 	case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
267 	case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
268 	case MLX5_EVENT_TYPE_DCT_DRAINED:
269 	case MLX5_EVENT_TYPE_COMP:
270 	case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
271 	case MLX5_EVENT_TYPE_XRQ_ERROR:
272 		return true;
273 	default:
274 		return false;
275 	}
276 }
277 
278 static u16 get_legacy_obj_type(u16 opcode)
279 {
280 	switch (opcode) {
281 	case MLX5_CMD_OP_CREATE_RQ:
282 		return MLX5_EVENT_QUEUE_TYPE_RQ;
283 	case MLX5_CMD_OP_CREATE_QP:
284 		return MLX5_EVENT_QUEUE_TYPE_QP;
285 	case MLX5_CMD_OP_CREATE_SQ:
286 		return MLX5_EVENT_QUEUE_TYPE_SQ;
287 	case MLX5_CMD_OP_CREATE_DCT:
288 		return MLX5_EVENT_QUEUE_TYPE_DCT;
289 	default:
290 		return 0;
291 	}
292 }
293 
294 static u16 get_dec_obj_type(struct devx_obj *obj, u16 event_num)
295 {
296 	u16 opcode;
297 
298 	opcode = (obj->obj_id >> 32) & 0xffff;
299 
300 	if (is_legacy_obj_event_num(event_num))
301 		return get_legacy_obj_type(opcode);
302 
303 	switch (opcode) {
304 	case MLX5_CMD_OP_CREATE_GENERAL_OBJ:
305 		return (obj->obj_id >> 48);
306 	case MLX5_CMD_OP_CREATE_RQ:
307 		return MLX5_OBJ_TYPE_RQ;
308 	case MLX5_CMD_OP_CREATE_QP:
309 		return MLX5_OBJ_TYPE_QP;
310 	case MLX5_CMD_OP_CREATE_SQ:
311 		return MLX5_OBJ_TYPE_SQ;
312 	case MLX5_CMD_OP_CREATE_DCT:
313 		return MLX5_OBJ_TYPE_DCT;
314 	case MLX5_CMD_OP_CREATE_TIR:
315 		return MLX5_OBJ_TYPE_TIR;
316 	case MLX5_CMD_OP_CREATE_TIS:
317 		return MLX5_OBJ_TYPE_TIS;
318 	case MLX5_CMD_OP_CREATE_PSV:
319 		return MLX5_OBJ_TYPE_PSV;
320 	case MLX5_OBJ_TYPE_MKEY:
321 		return MLX5_OBJ_TYPE_MKEY;
322 	case MLX5_CMD_OP_CREATE_RMP:
323 		return MLX5_OBJ_TYPE_RMP;
324 	case MLX5_CMD_OP_CREATE_XRC_SRQ:
325 		return MLX5_OBJ_TYPE_XRC_SRQ;
326 	case MLX5_CMD_OP_CREATE_XRQ:
327 		return MLX5_OBJ_TYPE_XRQ;
328 	case MLX5_CMD_OP_CREATE_RQT:
329 		return MLX5_OBJ_TYPE_RQT;
330 	case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
331 		return MLX5_OBJ_TYPE_FLOW_COUNTER;
332 	case MLX5_CMD_OP_CREATE_CQ:
333 		return MLX5_OBJ_TYPE_CQ;
334 	default:
335 		return 0;
336 	}
337 }
338 
339 static u16 get_event_obj_type(unsigned long event_type, struct mlx5_eqe *eqe)
340 {
341 	switch (event_type) {
342 	case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
343 	case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
344 	case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
345 	case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
346 	case MLX5_EVENT_TYPE_PATH_MIG:
347 	case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
348 	case MLX5_EVENT_TYPE_COMM_EST:
349 	case MLX5_EVENT_TYPE_SQ_DRAINED:
350 	case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
351 	case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
352 		return eqe->data.qp_srq.type;
353 	case MLX5_EVENT_TYPE_CQ_ERROR:
354 	case MLX5_EVENT_TYPE_XRQ_ERROR:
355 		return 0;
356 	case MLX5_EVENT_TYPE_DCT_DRAINED:
357 	case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
358 		return MLX5_EVENT_QUEUE_TYPE_DCT;
359 	default:
360 		return MLX5_GET(affiliated_event_header, &eqe->data, obj_type);
361 	}
362 }
363 
364 static u32 get_dec_obj_id(u64 obj_id)
365 {
366 	return (obj_id & 0xffffffff);
367 }
368 
369 /*
370  * As the obj_id in the firmware is not globally unique the object type
371  * must be considered upon checking for a valid object id.
372  * For that the opcode of the creator command is encoded as part of the obj_id.
373  */
374 static u64 get_enc_obj_id(u32 opcode, u32 obj_id)
375 {
376 	return ((u64)opcode << 32) | obj_id;
377 }
378 
379 static u64 devx_get_obj_id(const void *in)
380 {
381 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
382 	u64 obj_id;
383 
384 	switch (opcode) {
385 	case MLX5_CMD_OP_MODIFY_GENERAL_OBJ:
386 	case MLX5_CMD_OP_QUERY_GENERAL_OBJ:
387 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_GENERAL_OBJ |
388 					MLX5_GET(general_obj_in_cmd_hdr, in,
389 						 obj_type) << 16,
390 					MLX5_GET(general_obj_in_cmd_hdr, in,
391 						 obj_id));
392 		break;
393 	case MLX5_CMD_OP_QUERY_MKEY:
394 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_MKEY,
395 					MLX5_GET(query_mkey_in, in,
396 						 mkey_index));
397 		break;
398 	case MLX5_CMD_OP_QUERY_CQ:
399 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
400 					MLX5_GET(query_cq_in, in, cqn));
401 		break;
402 	case MLX5_CMD_OP_MODIFY_CQ:
403 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
404 					MLX5_GET(modify_cq_in, in, cqn));
405 		break;
406 	case MLX5_CMD_OP_QUERY_SQ:
407 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
408 					MLX5_GET(query_sq_in, in, sqn));
409 		break;
410 	case MLX5_CMD_OP_MODIFY_SQ:
411 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
412 					MLX5_GET(modify_sq_in, in, sqn));
413 		break;
414 	case MLX5_CMD_OP_QUERY_RQ:
415 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
416 					MLX5_GET(query_rq_in, in, rqn));
417 		break;
418 	case MLX5_CMD_OP_MODIFY_RQ:
419 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
420 					MLX5_GET(modify_rq_in, in, rqn));
421 		break;
422 	case MLX5_CMD_OP_QUERY_RMP:
423 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
424 					MLX5_GET(query_rmp_in, in, rmpn));
425 		break;
426 	case MLX5_CMD_OP_MODIFY_RMP:
427 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
428 					MLX5_GET(modify_rmp_in, in, rmpn));
429 		break;
430 	case MLX5_CMD_OP_QUERY_RQT:
431 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
432 					MLX5_GET(query_rqt_in, in, rqtn));
433 		break;
434 	case MLX5_CMD_OP_MODIFY_RQT:
435 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
436 					MLX5_GET(modify_rqt_in, in, rqtn));
437 		break;
438 	case MLX5_CMD_OP_QUERY_TIR:
439 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
440 					MLX5_GET(query_tir_in, in, tirn));
441 		break;
442 	case MLX5_CMD_OP_MODIFY_TIR:
443 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
444 					MLX5_GET(modify_tir_in, in, tirn));
445 		break;
446 	case MLX5_CMD_OP_QUERY_TIS:
447 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
448 					MLX5_GET(query_tis_in, in, tisn));
449 		break;
450 	case MLX5_CMD_OP_MODIFY_TIS:
451 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
452 					MLX5_GET(modify_tis_in, in, tisn));
453 		break;
454 	case MLX5_CMD_OP_QUERY_FLOW_TABLE:
455 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
456 					MLX5_GET(query_flow_table_in, in,
457 						 table_id));
458 		break;
459 	case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
460 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
461 					MLX5_GET(modify_flow_table_in, in,
462 						 table_id));
463 		break;
464 	case MLX5_CMD_OP_QUERY_FLOW_GROUP:
465 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_GROUP,
466 					MLX5_GET(query_flow_group_in, in,
467 						 group_id));
468 		break;
469 	case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
470 		obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
471 					MLX5_GET(query_fte_in, in,
472 						 flow_index));
473 		break;
474 	case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
475 		obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
476 					MLX5_GET(set_fte_in, in, flow_index));
477 		break;
478 	case MLX5_CMD_OP_QUERY_Q_COUNTER:
479 		obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_Q_COUNTER,
480 					MLX5_GET(query_q_counter_in, in,
481 						 counter_set_id));
482 		break;
483 	case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
484 		obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_FLOW_COUNTER,
485 					MLX5_GET(query_flow_counter_in, in,
486 						 flow_counter_id));
487 		break;
488 	case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
489 		obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT,
490 					MLX5_GET(general_obj_in_cmd_hdr, in,
491 						 obj_id));
492 		break;
493 	case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
494 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
495 					MLX5_GET(query_scheduling_element_in,
496 						 in, scheduling_element_id));
497 		break;
498 	case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
499 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
500 					MLX5_GET(modify_scheduling_element_in,
501 						 in, scheduling_element_id));
502 		break;
503 	case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
504 		obj_id = get_enc_obj_id(MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT,
505 					MLX5_GET(add_vxlan_udp_dport_in, in,
506 						 vxlan_udp_port));
507 		break;
508 	case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
509 		obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
510 					MLX5_GET(query_l2_table_entry_in, in,
511 						 table_index));
512 		break;
513 	case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
514 		obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
515 					MLX5_GET(set_l2_table_entry_in, in,
516 						 table_index));
517 		break;
518 	case MLX5_CMD_OP_QUERY_QP:
519 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
520 					MLX5_GET(query_qp_in, in, qpn));
521 		break;
522 	case MLX5_CMD_OP_RST2INIT_QP:
523 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
524 					MLX5_GET(rst2init_qp_in, in, qpn));
525 		break;
526 	case MLX5_CMD_OP_INIT2RTR_QP:
527 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
528 					MLX5_GET(init2rtr_qp_in, in, qpn));
529 		break;
530 	case MLX5_CMD_OP_RTR2RTS_QP:
531 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
532 					MLX5_GET(rtr2rts_qp_in, in, qpn));
533 		break;
534 	case MLX5_CMD_OP_RTS2RTS_QP:
535 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
536 					MLX5_GET(rts2rts_qp_in, in, qpn));
537 		break;
538 	case MLX5_CMD_OP_SQERR2RTS_QP:
539 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
540 					MLX5_GET(sqerr2rts_qp_in, in, qpn));
541 		break;
542 	case MLX5_CMD_OP_2ERR_QP:
543 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
544 					MLX5_GET(qp_2err_in, in, qpn));
545 		break;
546 	case MLX5_CMD_OP_2RST_QP:
547 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
548 					MLX5_GET(qp_2rst_in, in, qpn));
549 		break;
550 	case MLX5_CMD_OP_QUERY_DCT:
551 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
552 					MLX5_GET(query_dct_in, in, dctn));
553 		break;
554 	case MLX5_CMD_OP_QUERY_XRQ:
555 	case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
556 	case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
557 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
558 					MLX5_GET(query_xrq_in, in, xrqn));
559 		break;
560 	case MLX5_CMD_OP_QUERY_XRC_SRQ:
561 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
562 					MLX5_GET(query_xrc_srq_in, in,
563 						 xrc_srqn));
564 		break;
565 	case MLX5_CMD_OP_ARM_XRC_SRQ:
566 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
567 					MLX5_GET(arm_xrc_srq_in, in, xrc_srqn));
568 		break;
569 	case MLX5_CMD_OP_QUERY_SRQ:
570 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SRQ,
571 					MLX5_GET(query_srq_in, in, srqn));
572 		break;
573 	case MLX5_CMD_OP_ARM_RQ:
574 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
575 					MLX5_GET(arm_rq_in, in, srq_number));
576 		break;
577 	case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
578 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
579 					MLX5_GET(drain_dct_in, in, dctn));
580 		break;
581 	case MLX5_CMD_OP_ARM_XRQ:
582 	case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
583 	case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
584 	case MLX5_CMD_OP_MODIFY_XRQ:
585 		obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
586 					MLX5_GET(arm_xrq_in, in, xrqn));
587 		break;
588 	case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
589 		obj_id = get_enc_obj_id
590 				(MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT,
591 				 MLX5_GET(query_packet_reformat_context_in,
592 					  in, packet_reformat_id));
593 		break;
594 	default:
595 		obj_id = 0;
596 	}
597 
598 	return obj_id;
599 }
600 
601 static bool devx_is_valid_obj_id(struct uverbs_attr_bundle *attrs,
602 				 struct ib_uobject *uobj, const void *in)
603 {
604 	struct mlx5_ib_dev *dev = mlx5_udata_to_mdev(&attrs->driver_udata);
605 	u64 obj_id = devx_get_obj_id(in);
606 
607 	if (!obj_id)
608 		return false;
609 
610 	switch (uobj_get_object_id(uobj)) {
611 	case UVERBS_OBJECT_CQ:
612 		return get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
613 				      to_mcq(uobj->object)->mcq.cqn) ==
614 				      obj_id;
615 
616 	case UVERBS_OBJECT_SRQ:
617 	{
618 		struct mlx5_core_srq *srq = &(to_msrq(uobj->object)->msrq);
619 		u16 opcode;
620 
621 		switch (srq->common.res) {
622 		case MLX5_RES_XSRQ:
623 			opcode = MLX5_CMD_OP_CREATE_XRC_SRQ;
624 			break;
625 		case MLX5_RES_XRQ:
626 			opcode = MLX5_CMD_OP_CREATE_XRQ;
627 			break;
628 		default:
629 			if (!dev->mdev->issi)
630 				opcode = MLX5_CMD_OP_CREATE_SRQ;
631 			else
632 				opcode = MLX5_CMD_OP_CREATE_RMP;
633 		}
634 
635 		return get_enc_obj_id(opcode,
636 				      to_msrq(uobj->object)->msrq.srqn) ==
637 				      obj_id;
638 	}
639 
640 	case UVERBS_OBJECT_QP:
641 	{
642 		struct mlx5_ib_qp *qp = to_mqp(uobj->object);
643 		enum ib_qp_type	qp_type = qp->ibqp.qp_type;
644 
645 		if (qp_type == IB_QPT_RAW_PACKET ||
646 		    (qp->flags & MLX5_IB_QP_UNDERLAY)) {
647 			struct mlx5_ib_raw_packet_qp *raw_packet_qp =
648 							 &qp->raw_packet_qp;
649 			struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
650 			struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
651 
652 			return (get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
653 					       rq->base.mqp.qpn) == obj_id ||
654 				get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
655 					       sq->base.mqp.qpn) == obj_id ||
656 				get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
657 					       rq->tirn) == obj_id ||
658 				get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
659 					       sq->tisn) == obj_id);
660 		}
661 
662 		if (qp_type == MLX5_IB_QPT_DCT)
663 			return get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
664 					      qp->dct.mdct.dctn) == obj_id;
665 
666 		return get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
667 				      qp->ibqp.qp_num) == obj_id;
668 	}
669 
670 	case UVERBS_OBJECT_WQ:
671 		return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
672 				      to_mrwq(uobj->object)->core_qp.qpn) ==
673 				      obj_id;
674 
675 	case UVERBS_OBJECT_RWQ_IND_TBL:
676 		return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
677 				      to_mrwq_ind_table(uobj->object)->rqtn) ==
678 				      obj_id;
679 
680 	case MLX5_IB_OBJECT_DEVX_OBJ:
681 		return ((struct devx_obj *)uobj->object)->obj_id == obj_id;
682 
683 	default:
684 		return false;
685 	}
686 }
687 
688 static void devx_set_umem_valid(const void *in)
689 {
690 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
691 
692 	switch (opcode) {
693 	case MLX5_CMD_OP_CREATE_MKEY:
694 		MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
695 		break;
696 	case MLX5_CMD_OP_CREATE_CQ:
697 	{
698 		void *cqc;
699 
700 		MLX5_SET(create_cq_in, in, cq_umem_valid, 1);
701 		cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context);
702 		MLX5_SET(cqc, cqc, dbr_umem_valid, 1);
703 		break;
704 	}
705 	case MLX5_CMD_OP_CREATE_QP:
706 	{
707 		void *qpc;
708 
709 		qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
710 		MLX5_SET(qpc, qpc, dbr_umem_valid, 1);
711 		MLX5_SET(create_qp_in, in, wq_umem_valid, 1);
712 		break;
713 	}
714 
715 	case MLX5_CMD_OP_CREATE_RQ:
716 	{
717 		void *rqc, *wq;
718 
719 		rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
720 		wq  = MLX5_ADDR_OF(rqc, rqc, wq);
721 		MLX5_SET(wq, wq, dbr_umem_valid, 1);
722 		MLX5_SET(wq, wq, wq_umem_valid, 1);
723 		break;
724 	}
725 
726 	case MLX5_CMD_OP_CREATE_SQ:
727 	{
728 		void *sqc, *wq;
729 
730 		sqc = MLX5_ADDR_OF(create_sq_in, in, ctx);
731 		wq = MLX5_ADDR_OF(sqc, sqc, wq);
732 		MLX5_SET(wq, wq, dbr_umem_valid, 1);
733 		MLX5_SET(wq, wq, wq_umem_valid, 1);
734 		break;
735 	}
736 
737 	case MLX5_CMD_OP_MODIFY_CQ:
738 		MLX5_SET(modify_cq_in, in, cq_umem_valid, 1);
739 		break;
740 
741 	case MLX5_CMD_OP_CREATE_RMP:
742 	{
743 		void *rmpc, *wq;
744 
745 		rmpc = MLX5_ADDR_OF(create_rmp_in, in, ctx);
746 		wq = MLX5_ADDR_OF(rmpc, rmpc, wq);
747 		MLX5_SET(wq, wq, dbr_umem_valid, 1);
748 		MLX5_SET(wq, wq, wq_umem_valid, 1);
749 		break;
750 	}
751 
752 	case MLX5_CMD_OP_CREATE_XRQ:
753 	{
754 		void *xrqc, *wq;
755 
756 		xrqc = MLX5_ADDR_OF(create_xrq_in, in, xrq_context);
757 		wq = MLX5_ADDR_OF(xrqc, xrqc, wq);
758 		MLX5_SET(wq, wq, dbr_umem_valid, 1);
759 		MLX5_SET(wq, wq, wq_umem_valid, 1);
760 		break;
761 	}
762 
763 	case MLX5_CMD_OP_CREATE_XRC_SRQ:
764 	{
765 		void *xrc_srqc;
766 
767 		MLX5_SET(create_xrc_srq_in, in, xrc_srq_umem_valid, 1);
768 		xrc_srqc = MLX5_ADDR_OF(create_xrc_srq_in, in,
769 					xrc_srq_context_entry);
770 		MLX5_SET(xrc_srqc, xrc_srqc, dbr_umem_valid, 1);
771 		break;
772 	}
773 
774 	default:
775 		return;
776 	}
777 }
778 
779 static bool devx_is_obj_create_cmd(const void *in, u16 *opcode)
780 {
781 	*opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
782 
783 	switch (*opcode) {
784 	case MLX5_CMD_OP_CREATE_GENERAL_OBJ:
785 	case MLX5_CMD_OP_CREATE_MKEY:
786 	case MLX5_CMD_OP_CREATE_CQ:
787 	case MLX5_CMD_OP_ALLOC_PD:
788 	case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
789 	case MLX5_CMD_OP_CREATE_RMP:
790 	case MLX5_CMD_OP_CREATE_SQ:
791 	case MLX5_CMD_OP_CREATE_RQ:
792 	case MLX5_CMD_OP_CREATE_RQT:
793 	case MLX5_CMD_OP_CREATE_TIR:
794 	case MLX5_CMD_OP_CREATE_TIS:
795 	case MLX5_CMD_OP_ALLOC_Q_COUNTER:
796 	case MLX5_CMD_OP_CREATE_FLOW_TABLE:
797 	case MLX5_CMD_OP_CREATE_FLOW_GROUP:
798 	case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
799 	case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
800 	case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
801 	case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
802 	case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
803 	case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
804 	case MLX5_CMD_OP_CREATE_QP:
805 	case MLX5_CMD_OP_CREATE_SRQ:
806 	case MLX5_CMD_OP_CREATE_XRC_SRQ:
807 	case MLX5_CMD_OP_CREATE_DCT:
808 	case MLX5_CMD_OP_CREATE_XRQ:
809 	case MLX5_CMD_OP_ATTACH_TO_MCG:
810 	case MLX5_CMD_OP_ALLOC_XRCD:
811 		return true;
812 	case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
813 	{
814 		u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
815 		if (op_mod == 0)
816 			return true;
817 		return false;
818 	}
819 	case MLX5_CMD_OP_CREATE_PSV:
820 	{
821 		u8 num_psv = MLX5_GET(create_psv_in, in, num_psv);
822 
823 		if (num_psv == 1)
824 			return true;
825 		return false;
826 	}
827 	default:
828 		return false;
829 	}
830 }
831 
832 static bool devx_is_obj_modify_cmd(const void *in)
833 {
834 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
835 
836 	switch (opcode) {
837 	case MLX5_CMD_OP_MODIFY_GENERAL_OBJ:
838 	case MLX5_CMD_OP_MODIFY_CQ:
839 	case MLX5_CMD_OP_MODIFY_RMP:
840 	case MLX5_CMD_OP_MODIFY_SQ:
841 	case MLX5_CMD_OP_MODIFY_RQ:
842 	case MLX5_CMD_OP_MODIFY_RQT:
843 	case MLX5_CMD_OP_MODIFY_TIR:
844 	case MLX5_CMD_OP_MODIFY_TIS:
845 	case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
846 	case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
847 	case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
848 	case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
849 	case MLX5_CMD_OP_RST2INIT_QP:
850 	case MLX5_CMD_OP_INIT2RTR_QP:
851 	case MLX5_CMD_OP_RTR2RTS_QP:
852 	case MLX5_CMD_OP_RTS2RTS_QP:
853 	case MLX5_CMD_OP_SQERR2RTS_QP:
854 	case MLX5_CMD_OP_2ERR_QP:
855 	case MLX5_CMD_OP_2RST_QP:
856 	case MLX5_CMD_OP_ARM_XRC_SRQ:
857 	case MLX5_CMD_OP_ARM_RQ:
858 	case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
859 	case MLX5_CMD_OP_ARM_XRQ:
860 	case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
861 	case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
862 	case MLX5_CMD_OP_MODIFY_XRQ:
863 		return true;
864 	case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
865 	{
866 		u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
867 
868 		if (op_mod == 1)
869 			return true;
870 		return false;
871 	}
872 	default:
873 		return false;
874 	}
875 }
876 
877 static bool devx_is_obj_query_cmd(const void *in)
878 {
879 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
880 
881 	switch (opcode) {
882 	case MLX5_CMD_OP_QUERY_GENERAL_OBJ:
883 	case MLX5_CMD_OP_QUERY_MKEY:
884 	case MLX5_CMD_OP_QUERY_CQ:
885 	case MLX5_CMD_OP_QUERY_RMP:
886 	case MLX5_CMD_OP_QUERY_SQ:
887 	case MLX5_CMD_OP_QUERY_RQ:
888 	case MLX5_CMD_OP_QUERY_RQT:
889 	case MLX5_CMD_OP_QUERY_TIR:
890 	case MLX5_CMD_OP_QUERY_TIS:
891 	case MLX5_CMD_OP_QUERY_Q_COUNTER:
892 	case MLX5_CMD_OP_QUERY_FLOW_TABLE:
893 	case MLX5_CMD_OP_QUERY_FLOW_GROUP:
894 	case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
895 	case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
896 	case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
897 	case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
898 	case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
899 	case MLX5_CMD_OP_QUERY_QP:
900 	case MLX5_CMD_OP_QUERY_SRQ:
901 	case MLX5_CMD_OP_QUERY_XRC_SRQ:
902 	case MLX5_CMD_OP_QUERY_DCT:
903 	case MLX5_CMD_OP_QUERY_XRQ:
904 	case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
905 	case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
906 	case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
907 		return true;
908 	default:
909 		return false;
910 	}
911 }
912 
913 static bool devx_is_whitelist_cmd(void *in)
914 {
915 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
916 
917 	switch (opcode) {
918 	case MLX5_CMD_OP_QUERY_HCA_CAP:
919 	case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
920 	case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
921 		return true;
922 	default:
923 		return false;
924 	}
925 }
926 
927 static int devx_get_uid(struct mlx5_ib_ucontext *c, void *cmd_in)
928 {
929 	if (devx_is_whitelist_cmd(cmd_in)) {
930 		if (c->devx_uid)
931 			return c->devx_uid;
932 
933 		return -EOPNOTSUPP;
934 	}
935 
936 	if (!c->devx_uid)
937 		return -EINVAL;
938 
939 	return c->devx_uid;
940 }
941 
942 static bool devx_is_general_cmd(void *in, struct mlx5_ib_dev *dev)
943 {
944 	u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
945 
946 	/* Pass all cmds for vhca_tunnel as general, tracking is done in FW */
947 	if ((MLX5_CAP_GEN_64(dev->mdev, vhca_tunnel_commands) &&
948 	     MLX5_GET(general_obj_in_cmd_hdr, in, vhca_tunnel_id)) ||
949 	    (opcode >= MLX5_CMD_OP_GENERAL_START &&
950 	     opcode < MLX5_CMD_OP_GENERAL_END))
951 		return true;
952 
953 	switch (opcode) {
954 	case MLX5_CMD_OP_QUERY_HCA_CAP:
955 	case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
956 	case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
957 	case MLX5_CMD_OP_QUERY_VPORT_STATE:
958 	case MLX5_CMD_OP_QUERY_ADAPTER:
959 	case MLX5_CMD_OP_QUERY_ISSI:
960 	case MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT:
961 	case MLX5_CMD_OP_QUERY_ROCE_ADDRESS:
962 	case MLX5_CMD_OP_QUERY_VNIC_ENV:
963 	case MLX5_CMD_OP_QUERY_VPORT_COUNTER:
964 	case MLX5_CMD_OP_GET_DROPPED_PACKET_LOG:
965 	case MLX5_CMD_OP_NOP:
966 	case MLX5_CMD_OP_QUERY_CONG_STATUS:
967 	case MLX5_CMD_OP_QUERY_CONG_PARAMS:
968 	case MLX5_CMD_OP_QUERY_CONG_STATISTICS:
969 	case MLX5_CMD_OP_QUERY_LAG:
970 		return true;
971 	default:
972 		return false;
973 	}
974 }
975 
976 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)(
977 	struct uverbs_attr_bundle *attrs)
978 {
979 	struct mlx5_ib_ucontext *c;
980 	struct mlx5_ib_dev *dev;
981 	int user_vector;
982 	int dev_eqn;
983 	unsigned int irqn;
984 	int err;
985 
986 	if (uverbs_copy_from(&user_vector, attrs,
987 			     MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC))
988 		return -EFAULT;
989 
990 	c = devx_ufile2uctx(attrs);
991 	if (IS_ERR(c))
992 		return PTR_ERR(c);
993 	dev = to_mdev(c->ibucontext.device);
994 
995 	err = mlx5_vector2eqn(dev->mdev, user_vector, &dev_eqn, &irqn);
996 	if (err < 0)
997 		return err;
998 
999 	if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
1000 			   &dev_eqn, sizeof(dev_eqn)))
1001 		return -EFAULT;
1002 
1003 	return 0;
1004 }
1005 
1006 /*
1007  *Security note:
1008  * The hardware protection mechanism works like this: Each device object that
1009  * is subject to UAR doorbells (QP/SQ/CQ) gets a UAR ID (called uar_page in
1010  * the device specification manual) upon its creation. Then upon doorbell,
1011  * hardware fetches the object context for which the doorbell was rang, and
1012  * validates that the UAR through which the DB was rang matches the UAR ID
1013  * of the object.
1014  * If no match the doorbell is silently ignored by the hardware. Of course,
1015  * the user cannot ring a doorbell on a UAR that was not mapped to it.
1016  * Now in devx, as the devx kernel does not manipulate the QP/SQ/CQ command
1017  * mailboxes (except tagging them with UID), we expose to the user its UAR
1018  * ID, so it can embed it in these objects in the expected specification
1019  * format. So the only thing the user can do is hurt itself by creating a
1020  * QP/SQ/CQ with a UAR ID other than his, and then in this case other users
1021  * may ring a doorbell on its objects.
1022  * The consequence of that will be that another user can schedule a QP/SQ
1023  * of the buggy user for execution (just insert it to the hardware schedule
1024  * queue or arm its CQ for event generation), no further harm is expected.
1025  */
1026 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)(
1027 	struct uverbs_attr_bundle *attrs)
1028 {
1029 	struct mlx5_ib_ucontext *c;
1030 	struct mlx5_ib_dev *dev;
1031 	u32 user_idx;
1032 	s32 dev_idx;
1033 
1034 	c = devx_ufile2uctx(attrs);
1035 	if (IS_ERR(c))
1036 		return PTR_ERR(c);
1037 	dev = to_mdev(c->ibucontext.device);
1038 
1039 	if (uverbs_copy_from(&user_idx, attrs,
1040 			     MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX))
1041 		return -EFAULT;
1042 
1043 	dev_idx = bfregn_to_uar_index(dev, &c->bfregi, user_idx, true);
1044 	if (dev_idx < 0)
1045 		return dev_idx;
1046 
1047 	if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
1048 			   &dev_idx, sizeof(dev_idx)))
1049 		return -EFAULT;
1050 
1051 	return 0;
1052 }
1053 
1054 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)(
1055 	struct uverbs_attr_bundle *attrs)
1056 {
1057 	struct mlx5_ib_ucontext *c;
1058 	struct mlx5_ib_dev *dev;
1059 	void *cmd_in = uverbs_attr_get_alloced_ptr(
1060 		attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN);
1061 	int cmd_out_len = uverbs_attr_get_len(attrs,
1062 					MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT);
1063 	void *cmd_out;
1064 	int err;
1065 	int uid;
1066 
1067 	c = devx_ufile2uctx(attrs);
1068 	if (IS_ERR(c))
1069 		return PTR_ERR(c);
1070 	dev = to_mdev(c->ibucontext.device);
1071 
1072 	uid = devx_get_uid(c, cmd_in);
1073 	if (uid < 0)
1074 		return uid;
1075 
1076 	/* Only white list of some general HCA commands are allowed for this method. */
1077 	if (!devx_is_general_cmd(cmd_in, dev))
1078 		return -EINVAL;
1079 
1080 	cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1081 	if (IS_ERR(cmd_out))
1082 		return PTR_ERR(cmd_out);
1083 
1084 	MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1085 	err = mlx5_cmd_exec(dev->mdev, cmd_in,
1086 			    uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN),
1087 			    cmd_out, cmd_out_len);
1088 	if (err)
1089 		return err;
1090 
1091 	return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT, cmd_out,
1092 			      cmd_out_len);
1093 }
1094 
1095 static void devx_obj_build_destroy_cmd(void *in, void *out, void *din,
1096 				       u32 *dinlen,
1097 				       u32 *obj_id)
1098 {
1099 	u16 obj_type = MLX5_GET(general_obj_in_cmd_hdr, in, obj_type);
1100 	u16 uid = MLX5_GET(general_obj_in_cmd_hdr, in, uid);
1101 
1102 	*obj_id = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
1103 	*dinlen = MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr);
1104 
1105 	MLX5_SET(general_obj_in_cmd_hdr, din, obj_id, *obj_id);
1106 	MLX5_SET(general_obj_in_cmd_hdr, din, uid, uid);
1107 
1108 	switch (MLX5_GET(general_obj_in_cmd_hdr, in, opcode)) {
1109 	case MLX5_CMD_OP_CREATE_GENERAL_OBJ:
1110 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_GENERAL_OBJ);
1111 		MLX5_SET(general_obj_in_cmd_hdr, din, obj_type, obj_type);
1112 		break;
1113 
1114 	case MLX5_CMD_OP_CREATE_UMEM:
1115 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1116 			 MLX5_CMD_OP_DESTROY_UMEM);
1117 		break;
1118 	case MLX5_CMD_OP_CREATE_MKEY:
1119 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_MKEY);
1120 		break;
1121 	case MLX5_CMD_OP_CREATE_CQ:
1122 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_CQ);
1123 		break;
1124 	case MLX5_CMD_OP_ALLOC_PD:
1125 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DEALLOC_PD);
1126 		break;
1127 	case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
1128 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1129 			 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
1130 		break;
1131 	case MLX5_CMD_OP_CREATE_RMP:
1132 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RMP);
1133 		break;
1134 	case MLX5_CMD_OP_CREATE_SQ:
1135 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_SQ);
1136 		break;
1137 	case MLX5_CMD_OP_CREATE_RQ:
1138 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RQ);
1139 		break;
1140 	case MLX5_CMD_OP_CREATE_RQT:
1141 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RQT);
1142 		break;
1143 	case MLX5_CMD_OP_CREATE_TIR:
1144 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_TIR);
1145 		break;
1146 	case MLX5_CMD_OP_CREATE_TIS:
1147 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_TIS);
1148 		break;
1149 	case MLX5_CMD_OP_ALLOC_Q_COUNTER:
1150 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1151 			 MLX5_CMD_OP_DEALLOC_Q_COUNTER);
1152 		break;
1153 	case MLX5_CMD_OP_CREATE_FLOW_TABLE:
1154 		*dinlen = MLX5_ST_SZ_BYTES(destroy_flow_table_in);
1155 		*obj_id = MLX5_GET(create_flow_table_out, out, table_id);
1156 		MLX5_SET(destroy_flow_table_in, din, other_vport,
1157 			 MLX5_GET(create_flow_table_in,  in, other_vport));
1158 		MLX5_SET(destroy_flow_table_in, din, vport_number,
1159 			 MLX5_GET(create_flow_table_in,  in, vport_number));
1160 		MLX5_SET(destroy_flow_table_in, din, table_type,
1161 			 MLX5_GET(create_flow_table_in,  in, table_type));
1162 		MLX5_SET(destroy_flow_table_in, din, table_id, *obj_id);
1163 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1164 			 MLX5_CMD_OP_DESTROY_FLOW_TABLE);
1165 		break;
1166 	case MLX5_CMD_OP_CREATE_FLOW_GROUP:
1167 		*dinlen = MLX5_ST_SZ_BYTES(destroy_flow_group_in);
1168 		*obj_id = MLX5_GET(create_flow_group_out, out, group_id);
1169 		MLX5_SET(destroy_flow_group_in, din, other_vport,
1170 			 MLX5_GET(create_flow_group_in, in, other_vport));
1171 		MLX5_SET(destroy_flow_group_in, din, vport_number,
1172 			 MLX5_GET(create_flow_group_in, in, vport_number));
1173 		MLX5_SET(destroy_flow_group_in, din, table_type,
1174 			 MLX5_GET(create_flow_group_in, in, table_type));
1175 		MLX5_SET(destroy_flow_group_in, din, table_id,
1176 			 MLX5_GET(create_flow_group_in, in, table_id));
1177 		MLX5_SET(destroy_flow_group_in, din, group_id, *obj_id);
1178 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1179 			 MLX5_CMD_OP_DESTROY_FLOW_GROUP);
1180 		break;
1181 	case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
1182 		*dinlen = MLX5_ST_SZ_BYTES(delete_fte_in);
1183 		*obj_id = MLX5_GET(set_fte_in, in, flow_index);
1184 		MLX5_SET(delete_fte_in, din, other_vport,
1185 			 MLX5_GET(set_fte_in,  in, other_vport));
1186 		MLX5_SET(delete_fte_in, din, vport_number,
1187 			 MLX5_GET(set_fte_in, in, vport_number));
1188 		MLX5_SET(delete_fte_in, din, table_type,
1189 			 MLX5_GET(set_fte_in, in, table_type));
1190 		MLX5_SET(delete_fte_in, din, table_id,
1191 			 MLX5_GET(set_fte_in, in, table_id));
1192 		MLX5_SET(delete_fte_in, din, flow_index, *obj_id);
1193 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1194 			 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY);
1195 		break;
1196 	case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
1197 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1198 			 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER);
1199 		break;
1200 	case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
1201 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1202 			 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);
1203 		break;
1204 	case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
1205 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1206 			 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT);
1207 		break;
1208 	case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
1209 		*dinlen = MLX5_ST_SZ_BYTES(destroy_scheduling_element_in);
1210 		*obj_id = MLX5_GET(create_scheduling_element_out, out,
1211 				   scheduling_element_id);
1212 		MLX5_SET(destroy_scheduling_element_in, din,
1213 			 scheduling_hierarchy,
1214 			 MLX5_GET(create_scheduling_element_in, in,
1215 				  scheduling_hierarchy));
1216 		MLX5_SET(destroy_scheduling_element_in, din,
1217 			 scheduling_element_id, *obj_id);
1218 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1219 			 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT);
1220 		break;
1221 	case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
1222 		*dinlen = MLX5_ST_SZ_BYTES(delete_vxlan_udp_dport_in);
1223 		*obj_id = MLX5_GET(add_vxlan_udp_dport_in, in, vxlan_udp_port);
1224 		MLX5_SET(delete_vxlan_udp_dport_in, din, vxlan_udp_port, *obj_id);
1225 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1226 			 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT);
1227 		break;
1228 	case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
1229 		*dinlen = MLX5_ST_SZ_BYTES(delete_l2_table_entry_in);
1230 		*obj_id = MLX5_GET(set_l2_table_entry_in, in, table_index);
1231 		MLX5_SET(delete_l2_table_entry_in, din, table_index, *obj_id);
1232 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1233 			 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
1234 		break;
1235 	case MLX5_CMD_OP_CREATE_QP:
1236 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_QP);
1237 		break;
1238 	case MLX5_CMD_OP_CREATE_SRQ:
1239 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_SRQ);
1240 		break;
1241 	case MLX5_CMD_OP_CREATE_XRC_SRQ:
1242 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1243 			 MLX5_CMD_OP_DESTROY_XRC_SRQ);
1244 		break;
1245 	case MLX5_CMD_OP_CREATE_DCT:
1246 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_DCT);
1247 		break;
1248 	case MLX5_CMD_OP_CREATE_XRQ:
1249 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_XRQ);
1250 		break;
1251 	case MLX5_CMD_OP_ATTACH_TO_MCG:
1252 		*dinlen = MLX5_ST_SZ_BYTES(detach_from_mcg_in);
1253 		MLX5_SET(detach_from_mcg_in, din, qpn,
1254 			 MLX5_GET(attach_to_mcg_in, in, qpn));
1255 		memcpy(MLX5_ADDR_OF(detach_from_mcg_in, din, multicast_gid),
1256 		       MLX5_ADDR_OF(attach_to_mcg_in, in, multicast_gid),
1257 		       MLX5_FLD_SZ_BYTES(attach_to_mcg_in, multicast_gid));
1258 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DETACH_FROM_MCG);
1259 		break;
1260 	case MLX5_CMD_OP_ALLOC_XRCD:
1261 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DEALLOC_XRCD);
1262 		break;
1263 	case MLX5_CMD_OP_CREATE_PSV:
1264 		MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1265 			 MLX5_CMD_OP_DESTROY_PSV);
1266 		MLX5_SET(destroy_psv_in, din, psvn,
1267 			 MLX5_GET(create_psv_out, out, psv0_index));
1268 		break;
1269 	default:
1270 		/* The entry must match to one of the devx_is_obj_create_cmd */
1271 		WARN_ON(true);
1272 		break;
1273 	}
1274 }
1275 
1276 static int devx_handle_mkey_create(struct mlx5_ib_dev *dev,
1277 				   struct devx_obj *obj,
1278 				   void *in, int in_len)
1279 {
1280 	int min_len = MLX5_BYTE_OFF(create_mkey_in, memory_key_mkey_entry) +
1281 			MLX5_FLD_SZ_BYTES(create_mkey_in,
1282 			memory_key_mkey_entry);
1283 	void *mkc;
1284 	u8 access_mode;
1285 
1286 	if (in_len < min_len)
1287 		return -EINVAL;
1288 
1289 	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1290 
1291 	access_mode = MLX5_GET(mkc, mkc, access_mode);
1292 	access_mode |= MLX5_GET(mkc, mkc, access_mode_4_2) << 2;
1293 
1294 	if (access_mode == MLX5_ACCESS_MODE_KLM ||
1295 		access_mode == MLX5_ACCESS_MODE_KSM) {
1296 		return 0;
1297 	}
1298 
1299 	MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
1300 	return 0;
1301 }
1302 
1303 static void devx_cleanup_subscription(struct mlx5_ib_dev *dev,
1304 				      struct devx_event_subscription *sub)
1305 {
1306 	struct devx_event *event;
1307 	struct devx_obj_event *xa_val_level2;
1308 
1309 	if (sub->is_cleaned)
1310 		return;
1311 
1312 	sub->is_cleaned = 1;
1313 	list_del_rcu(&sub->xa_list);
1314 
1315 	if (list_empty(&sub->obj_list))
1316 		return;
1317 
1318 	list_del_rcu(&sub->obj_list);
1319 	/* check whether key level 1 for this obj_sub_list is empty */
1320 	event = xa_load(&dev->devx_event_table.event_xa,
1321 			sub->xa_key_level1);
1322 	WARN_ON(!event);
1323 
1324 	xa_val_level2 = xa_load(&event->object_ids, sub->xa_key_level2);
1325 	if (list_empty(&xa_val_level2->obj_sub_list)) {
1326 		xa_erase(&event->object_ids,
1327 			 sub->xa_key_level2);
1328 		kfree_rcu(xa_val_level2, rcu);
1329 	}
1330 }
1331 
1332 static int devx_obj_cleanup(struct ib_uobject *uobject,
1333 			    enum rdma_remove_reason why,
1334 			    struct uverbs_attr_bundle *attrs)
1335 {
1336 	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1337 	struct mlx5_devx_event_table *devx_event_table;
1338 	struct devx_obj *obj = uobject->object;
1339 	struct devx_event_subscription *sub_entry, *tmp;
1340 	struct mlx5_ib_dev *dev;
1341 	int ret;
1342 
1343 	dev = mlx5_udata_to_mdev(&attrs->driver_udata);
1344 	if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1345 		ret = mlx5_core_destroy_dct(obj->ib_dev->mdev, &obj->core_dct);
1346 	else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1347 		ret = mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1348 	else
1349 		ret = mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox,
1350 				    obj->dinlen, out, sizeof(out));
1351 	if (ib_is_destroy_retryable(ret, why, uobject))
1352 		return ret;
1353 
1354 	devx_event_table = &dev->devx_event_table;
1355 
1356 	mutex_lock(&devx_event_table->event_xa_lock);
1357 	list_for_each_entry_safe(sub_entry, tmp, &obj->event_sub, obj_list)
1358 		devx_cleanup_subscription(dev, sub_entry);
1359 	mutex_unlock(&devx_event_table->event_xa_lock);
1360 
1361 	kfree(obj);
1362 	return ret;
1363 }
1364 
1365 static void devx_cq_comp(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
1366 {
1367 	struct devx_obj *obj = container_of(mcq, struct devx_obj, core_cq);
1368 	struct mlx5_devx_event_table *table;
1369 	struct devx_event *event;
1370 	struct devx_obj_event *obj_event;
1371 	u32 obj_id = mcq->cqn;
1372 
1373 	table = &obj->ib_dev->devx_event_table;
1374 	rcu_read_lock();
1375 	event = xa_load(&table->event_xa, MLX5_EVENT_TYPE_COMP);
1376 	if (!event)
1377 		goto out;
1378 
1379 	obj_event = xa_load(&event->object_ids, obj_id);
1380 	if (!obj_event)
1381 		goto out;
1382 
1383 	dispatch_event_fd(&obj_event->obj_sub_list, eqe);
1384 out:
1385 	rcu_read_unlock();
1386 }
1387 
1388 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)(
1389 	struct uverbs_attr_bundle *attrs)
1390 {
1391 	void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1392 	int cmd_out_len =  uverbs_attr_get_len(attrs,
1393 					MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT);
1394 	int cmd_in_len = uverbs_attr_get_len(attrs,
1395 					MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1396 	void *cmd_out;
1397 	struct ib_uobject *uobj = uverbs_attr_get_uobject(
1398 		attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE);
1399 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1400 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1401 	struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1402 	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1403 	struct devx_obj *obj;
1404 	u16 obj_type = 0;
1405 	int err;
1406 	int uid;
1407 	u32 obj_id;
1408 	u16 opcode;
1409 
1410 	if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1411 		return -EINVAL;
1412 
1413 	uid = devx_get_uid(c, cmd_in);
1414 	if (uid < 0)
1415 		return uid;
1416 
1417 	if (!devx_is_obj_create_cmd(cmd_in, &opcode))
1418 		return -EINVAL;
1419 
1420 	cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1421 	if (IS_ERR(cmd_out))
1422 		return PTR_ERR(cmd_out);
1423 
1424 	obj = kzalloc(sizeof(struct devx_obj), GFP_KERNEL);
1425 	if (!obj)
1426 		return -ENOMEM;
1427 
1428 	MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1429 	if (opcode == MLX5_CMD_OP_CREATE_MKEY) {
1430 		err = devx_handle_mkey_create(dev, obj, cmd_in, cmd_in_len);
1431 		if (err)
1432 			goto obj_free;
1433 	} else {
1434 		devx_set_umem_valid(cmd_in);
1435 	}
1436 
1437 	if (opcode == MLX5_CMD_OP_CREATE_DCT) {
1438 		obj->flags |= DEVX_OBJ_FLAGS_DCT;
1439 		err = mlx5_core_create_dct(dev->mdev, &obj->core_dct,
1440 					   cmd_in, cmd_in_len,
1441 					   cmd_out, cmd_out_len);
1442 	} else if (opcode == MLX5_CMD_OP_CREATE_CQ) {
1443 		obj->flags |= DEVX_OBJ_FLAGS_CQ;
1444 		obj->core_cq.comp = devx_cq_comp;
1445 		err = mlx5_core_create_cq(dev->mdev, &obj->core_cq,
1446 					  cmd_in, cmd_in_len, cmd_out,
1447 					  cmd_out_len);
1448 	} else {
1449 		err = mlx5_cmd_exec(dev->mdev, cmd_in,
1450 				    cmd_in_len,
1451 				    cmd_out, cmd_out_len);
1452 	}
1453 
1454 	if (err)
1455 		goto obj_free;
1456 
1457 	if (opcode == MLX5_CMD_OP_ALLOC_FLOW_COUNTER) {
1458 		u8 bulk = MLX5_GET(alloc_flow_counter_in,
1459 				   cmd_in,
1460 				   flow_counter_bulk);
1461 		obj->flow_counter_bulk_size = 128UL * bulk;
1462 	}
1463 
1464 	uobj->object = obj;
1465 	INIT_LIST_HEAD(&obj->event_sub);
1466 	obj->ib_dev = dev;
1467 	devx_obj_build_destroy_cmd(cmd_in, cmd_out, obj->dinbox, &obj->dinlen,
1468 				   &obj_id);
1469 	WARN_ON(obj->dinlen > MLX5_MAX_DESTROY_INBOX_SIZE_DW * sizeof(u32));
1470 
1471 	err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, cmd_out, cmd_out_len);
1472 	if (err)
1473 		goto obj_destroy;
1474 
1475 	if (opcode == MLX5_CMD_OP_CREATE_GENERAL_OBJ)
1476 		obj_type = MLX5_GET(general_obj_in_cmd_hdr, cmd_in, obj_type);
1477 	obj->obj_id = get_enc_obj_id(opcode | obj_type << 16, obj_id);
1478 
1479 	return 0;
1480 
1481 obj_destroy:
1482 	if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1483 		mlx5_core_destroy_dct(obj->ib_dev->mdev, &obj->core_dct);
1484 	else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1485 		mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1486 	else
1487 		mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox, obj->dinlen, out,
1488 			      sizeof(out));
1489 obj_free:
1490 	kfree(obj);
1491 	return err;
1492 }
1493 
1494 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)(
1495 	struct uverbs_attr_bundle *attrs)
1496 {
1497 	void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN);
1498 	int cmd_out_len = uverbs_attr_get_len(attrs,
1499 					MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT);
1500 	struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1501 							  MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE);
1502 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1503 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1504 	struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1505 	void *cmd_out;
1506 	int err;
1507 	int uid;
1508 
1509 	if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1510 		return -EINVAL;
1511 
1512 	uid = devx_get_uid(c, cmd_in);
1513 	if (uid < 0)
1514 		return uid;
1515 
1516 	if (!devx_is_obj_modify_cmd(cmd_in))
1517 		return -EINVAL;
1518 
1519 	if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1520 		return -EINVAL;
1521 
1522 	cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1523 	if (IS_ERR(cmd_out))
1524 		return PTR_ERR(cmd_out);
1525 
1526 	MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1527 	devx_set_umem_valid(cmd_in);
1528 
1529 	err = mlx5_cmd_exec(mdev->mdev, cmd_in,
1530 			    uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN),
1531 			    cmd_out, cmd_out_len);
1532 	if (err)
1533 		return err;
1534 
1535 	return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
1536 			      cmd_out, cmd_out_len);
1537 }
1538 
1539 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)(
1540 	struct uverbs_attr_bundle *attrs)
1541 {
1542 	void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN);
1543 	int cmd_out_len = uverbs_attr_get_len(attrs,
1544 					      MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT);
1545 	struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1546 							  MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE);
1547 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1548 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1549 	void *cmd_out;
1550 	int err;
1551 	int uid;
1552 	struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1553 
1554 	if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1555 		return -EINVAL;
1556 
1557 	uid = devx_get_uid(c, cmd_in);
1558 	if (uid < 0)
1559 		return uid;
1560 
1561 	if (!devx_is_obj_query_cmd(cmd_in))
1562 		return -EINVAL;
1563 
1564 	if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1565 		return -EINVAL;
1566 
1567 	cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1568 	if (IS_ERR(cmd_out))
1569 		return PTR_ERR(cmd_out);
1570 
1571 	MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1572 	err = mlx5_cmd_exec(mdev->mdev, cmd_in,
1573 			    uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN),
1574 			    cmd_out, cmd_out_len);
1575 	if (err)
1576 		return err;
1577 
1578 	return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
1579 			      cmd_out, cmd_out_len);
1580 }
1581 
1582 struct devx_async_event_queue {
1583 	spinlock_t		lock;
1584 	wait_queue_head_t	poll_wait;
1585 	struct list_head	event_list;
1586 	atomic_t		bytes_in_use;
1587 	u8			is_destroyed:1;
1588 };
1589 
1590 struct devx_async_cmd_event_file {
1591 	struct ib_uobject		uobj;
1592 	struct devx_async_event_queue	ev_queue;
1593 	struct mlx5_async_ctx		async_ctx;
1594 };
1595 
1596 static void devx_init_event_queue(struct devx_async_event_queue *ev_queue)
1597 {
1598 	spin_lock_init(&ev_queue->lock);
1599 	INIT_LIST_HEAD(&ev_queue->event_list);
1600 	init_waitqueue_head(&ev_queue->poll_wait);
1601 	atomic_set(&ev_queue->bytes_in_use, 0);
1602 	ev_queue->is_destroyed = 0;
1603 }
1604 
1605 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)(
1606 	struct uverbs_attr_bundle *attrs)
1607 {
1608 	struct devx_async_cmd_event_file *ev_file;
1609 
1610 	struct ib_uobject *uobj = uverbs_attr_get_uobject(
1611 		attrs, MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE);
1612 	struct mlx5_ib_dev *mdev = mlx5_udata_to_mdev(&attrs->driver_udata);
1613 
1614 	ev_file = container_of(uobj, struct devx_async_cmd_event_file,
1615 			       uobj);
1616 	devx_init_event_queue(&ev_file->ev_queue);
1617 	mlx5_cmd_init_async_ctx(mdev->mdev, &ev_file->async_ctx);
1618 	return 0;
1619 }
1620 
1621 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)(
1622 	struct uverbs_attr_bundle *attrs)
1623 {
1624 	struct ib_uobject *uobj = uverbs_attr_get_uobject(
1625 		attrs, MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE);
1626 	struct devx_async_event_file *ev_file;
1627 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1628 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1629 	struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1630 	u32 flags;
1631 	int err;
1632 
1633 	err = uverbs_get_flags32(&flags, attrs,
1634 		MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
1635 		MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA);
1636 
1637 	if (err)
1638 		return err;
1639 
1640 	ev_file = container_of(uobj, struct devx_async_event_file,
1641 			       uobj);
1642 	spin_lock_init(&ev_file->lock);
1643 	INIT_LIST_HEAD(&ev_file->event_list);
1644 	init_waitqueue_head(&ev_file->poll_wait);
1645 	if (flags & MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA)
1646 		ev_file->omit_data = 1;
1647 	INIT_LIST_HEAD(&ev_file->subscribed_events_list);
1648 	ev_file->dev = dev;
1649 	get_device(&dev->ib_dev.dev);
1650 	return 0;
1651 }
1652 
1653 static void devx_query_callback(int status, struct mlx5_async_work *context)
1654 {
1655 	struct devx_async_data *async_data =
1656 		container_of(context, struct devx_async_data, cb_work);
1657 	struct devx_async_cmd_event_file *ev_file = async_data->ev_file;
1658 	struct devx_async_event_queue *ev_queue = &ev_file->ev_queue;
1659 	unsigned long flags;
1660 
1661 	/*
1662 	 * Note that if the struct devx_async_cmd_event_file uobj begins to be
1663 	 * destroyed it will block at mlx5_cmd_cleanup_async_ctx() until this
1664 	 * routine returns, ensuring that it always remains valid here.
1665 	 */
1666 	spin_lock_irqsave(&ev_queue->lock, flags);
1667 	list_add_tail(&async_data->list, &ev_queue->event_list);
1668 	spin_unlock_irqrestore(&ev_queue->lock, flags);
1669 
1670 	wake_up_interruptible(&ev_queue->poll_wait);
1671 }
1672 
1673 #define MAX_ASYNC_BYTES_IN_USE (1024 * 1024) /* 1MB */
1674 
1675 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)(
1676 	struct uverbs_attr_bundle *attrs)
1677 {
1678 	void *cmd_in = uverbs_attr_get_alloced_ptr(attrs,
1679 				MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN);
1680 	struct ib_uobject *uobj = uverbs_attr_get_uobject(
1681 				attrs,
1682 				MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_HANDLE);
1683 	u16 cmd_out_len;
1684 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1685 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1686 	struct ib_uobject *fd_uobj;
1687 	int err;
1688 	int uid;
1689 	struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1690 	struct devx_async_cmd_event_file *ev_file;
1691 	struct devx_async_data *async_data;
1692 
1693 	if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1694 		return -EINVAL;
1695 
1696 	uid = devx_get_uid(c, cmd_in);
1697 	if (uid < 0)
1698 		return uid;
1699 
1700 	if (!devx_is_obj_query_cmd(cmd_in))
1701 		return -EINVAL;
1702 
1703 	err = uverbs_get_const(&cmd_out_len, attrs,
1704 			       MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN);
1705 	if (err)
1706 		return err;
1707 
1708 	if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1709 		return -EINVAL;
1710 
1711 	fd_uobj = uverbs_attr_get_uobject(attrs,
1712 				MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD);
1713 	if (IS_ERR(fd_uobj))
1714 		return PTR_ERR(fd_uobj);
1715 
1716 	ev_file = container_of(fd_uobj, struct devx_async_cmd_event_file,
1717 			       uobj);
1718 
1719 	if (atomic_add_return(cmd_out_len, &ev_file->ev_queue.bytes_in_use) >
1720 			MAX_ASYNC_BYTES_IN_USE) {
1721 		atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1722 		return -EAGAIN;
1723 	}
1724 
1725 	async_data = kvzalloc(struct_size(async_data, hdr.out_data,
1726 					  cmd_out_len), GFP_KERNEL);
1727 	if (!async_data) {
1728 		err = -ENOMEM;
1729 		goto sub_bytes;
1730 	}
1731 
1732 	err = uverbs_copy_from(&async_data->hdr.wr_id, attrs,
1733 			       MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID);
1734 	if (err)
1735 		goto free_async;
1736 
1737 	async_data->cmd_out_len = cmd_out_len;
1738 	async_data->mdev = mdev;
1739 	async_data->ev_file = ev_file;
1740 
1741 	MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1742 	err = mlx5_cmd_exec_cb(&ev_file->async_ctx, cmd_in,
1743 		    uverbs_attr_get_len(attrs,
1744 				MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN),
1745 		    async_data->hdr.out_data,
1746 		    async_data->cmd_out_len,
1747 		    devx_query_callback, &async_data->cb_work);
1748 
1749 	if (err)
1750 		goto free_async;
1751 
1752 	return 0;
1753 
1754 free_async:
1755 	kvfree(async_data);
1756 sub_bytes:
1757 	atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1758 	return err;
1759 }
1760 
1761 static void
1762 subscribe_event_xa_dealloc(struct mlx5_devx_event_table *devx_event_table,
1763 			   u32 key_level1,
1764 			   bool is_level2,
1765 			   u32 key_level2)
1766 {
1767 	struct devx_event *event;
1768 	struct devx_obj_event *xa_val_level2;
1769 
1770 	/* Level 1 is valid for future use, no need to free */
1771 	if (!is_level2)
1772 		return;
1773 
1774 	event = xa_load(&devx_event_table->event_xa, key_level1);
1775 	WARN_ON(!event);
1776 
1777 	xa_val_level2 = xa_load(&event->object_ids,
1778 				key_level2);
1779 	if (list_empty(&xa_val_level2->obj_sub_list)) {
1780 		xa_erase(&event->object_ids,
1781 			 key_level2);
1782 		kfree_rcu(xa_val_level2, rcu);
1783 	}
1784 }
1785 
1786 static int
1787 subscribe_event_xa_alloc(struct mlx5_devx_event_table *devx_event_table,
1788 			 u32 key_level1,
1789 			 bool is_level2,
1790 			 u32 key_level2)
1791 {
1792 	struct devx_obj_event *obj_event;
1793 	struct devx_event *event;
1794 	int err;
1795 
1796 	event = xa_load(&devx_event_table->event_xa, key_level1);
1797 	if (!event) {
1798 		event = kzalloc(sizeof(*event), GFP_KERNEL);
1799 		if (!event)
1800 			return -ENOMEM;
1801 
1802 		INIT_LIST_HEAD(&event->unaffiliated_list);
1803 		xa_init_flags(&event->object_ids, 0);
1804 
1805 		err = xa_insert(&devx_event_table->event_xa,
1806 				key_level1,
1807 				event,
1808 				GFP_KERNEL);
1809 		if (err) {
1810 			kfree(event);
1811 			return err;
1812 		}
1813 	}
1814 
1815 	if (!is_level2)
1816 		return 0;
1817 
1818 	obj_event = xa_load(&event->object_ids, key_level2);
1819 	if (!obj_event) {
1820 		obj_event = kzalloc(sizeof(*obj_event), GFP_KERNEL);
1821 		if (!obj_event)
1822 			/* Level1 is valid for future use, no need to free */
1823 			return -ENOMEM;
1824 
1825 		err = xa_insert(&event->object_ids,
1826 				key_level2,
1827 				obj_event,
1828 				GFP_KERNEL);
1829 		if (err)
1830 			return err;
1831 		INIT_LIST_HEAD(&obj_event->obj_sub_list);
1832 	}
1833 
1834 	return 0;
1835 }
1836 
1837 static bool is_valid_events_legacy(int num_events, u16 *event_type_num_list,
1838 				   struct devx_obj *obj)
1839 {
1840 	int i;
1841 
1842 	for (i = 0; i < num_events; i++) {
1843 		if (obj) {
1844 			if (!is_legacy_obj_event_num(event_type_num_list[i]))
1845 				return false;
1846 		} else if (!is_legacy_unaffiliated_event_num(
1847 				event_type_num_list[i])) {
1848 			return false;
1849 		}
1850 	}
1851 
1852 	return true;
1853 }
1854 
1855 #define MAX_SUPP_EVENT_NUM 255
1856 static bool is_valid_events(struct mlx5_core_dev *dev,
1857 			    int num_events, u16 *event_type_num_list,
1858 			    struct devx_obj *obj)
1859 {
1860 	__be64 *aff_events;
1861 	__be64 *unaff_events;
1862 	int mask_entry;
1863 	int mask_bit;
1864 	int i;
1865 
1866 	if (MLX5_CAP_GEN(dev, event_cap)) {
1867 		aff_events = (__be64 *)MLX5_CAP_DEV_EVENT(dev,
1868 						user_affiliated_events);
1869 		unaff_events = (__be64 *)MLX5_CAP_DEV_EVENT(dev,
1870 						  user_unaffiliated_events);
1871 	} else {
1872 		return is_valid_events_legacy(num_events, event_type_num_list,
1873 					      obj);
1874 	}
1875 
1876 	for (i = 0; i < num_events; i++) {
1877 		if (event_type_num_list[i] > MAX_SUPP_EVENT_NUM)
1878 			return false;
1879 
1880 		mask_entry = event_type_num_list[i] / 64;
1881 		mask_bit = event_type_num_list[i] % 64;
1882 
1883 		if (obj) {
1884 			/* CQ completion */
1885 			if (event_type_num_list[i] == 0)
1886 				continue;
1887 
1888 			if (!(be64_to_cpu(aff_events[mask_entry]) &
1889 					(1ull << mask_bit)))
1890 				return false;
1891 
1892 			continue;
1893 		}
1894 
1895 		if (!(be64_to_cpu(unaff_events[mask_entry]) &
1896 				(1ull << mask_bit)))
1897 			return false;
1898 	}
1899 
1900 	return true;
1901 }
1902 
1903 #define MAX_NUM_EVENTS 16
1904 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)(
1905 	struct uverbs_attr_bundle *attrs)
1906 {
1907 	struct ib_uobject *devx_uobj = uverbs_attr_get_uobject(
1908 				attrs,
1909 				MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE);
1910 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1911 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1912 	struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1913 	struct ib_uobject *fd_uobj;
1914 	struct devx_obj *obj = NULL;
1915 	struct devx_async_event_file *ev_file;
1916 	struct mlx5_devx_event_table *devx_event_table = &dev->devx_event_table;
1917 	u16 *event_type_num_list;
1918 	struct devx_event_subscription *event_sub, *tmp_sub;
1919 	struct list_head sub_list;
1920 	int redirect_fd;
1921 	bool use_eventfd = false;
1922 	int num_events;
1923 	int num_alloc_xa_entries = 0;
1924 	u16 obj_type = 0;
1925 	u64 cookie = 0;
1926 	u32 obj_id = 0;
1927 	int err;
1928 	int i;
1929 
1930 	if (!c->devx_uid)
1931 		return -EINVAL;
1932 
1933 	if (!IS_ERR(devx_uobj)) {
1934 		obj = (struct devx_obj *)devx_uobj->object;
1935 		if (obj)
1936 			obj_id = get_dec_obj_id(obj->obj_id);
1937 	}
1938 
1939 	fd_uobj = uverbs_attr_get_uobject(attrs,
1940 				MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE);
1941 	if (IS_ERR(fd_uobj))
1942 		return PTR_ERR(fd_uobj);
1943 
1944 	ev_file = container_of(fd_uobj, struct devx_async_event_file,
1945 			       uobj);
1946 
1947 	if (uverbs_attr_is_valid(attrs,
1948 				 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM)) {
1949 		err = uverbs_copy_from(&redirect_fd, attrs,
1950 			       MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM);
1951 		if (err)
1952 			return err;
1953 
1954 		use_eventfd = true;
1955 	}
1956 
1957 	if (uverbs_attr_is_valid(attrs,
1958 				 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE)) {
1959 		if (use_eventfd)
1960 			return -EINVAL;
1961 
1962 		err = uverbs_copy_from(&cookie, attrs,
1963 				MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE);
1964 		if (err)
1965 			return err;
1966 	}
1967 
1968 	num_events = uverbs_attr_ptr_get_array_size(
1969 		attrs, MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
1970 		sizeof(u16));
1971 
1972 	if (num_events < 0)
1973 		return num_events;
1974 
1975 	if (num_events > MAX_NUM_EVENTS)
1976 		return -EINVAL;
1977 
1978 	event_type_num_list = uverbs_attr_get_alloced_ptr(attrs,
1979 			MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST);
1980 
1981 	if (!is_valid_events(dev->mdev, num_events, event_type_num_list, obj))
1982 		return -EINVAL;
1983 
1984 	INIT_LIST_HEAD(&sub_list);
1985 
1986 	/* Protect from concurrent subscriptions to same XA entries to allow
1987 	 * both to succeed
1988 	 */
1989 	mutex_lock(&devx_event_table->event_xa_lock);
1990 	for (i = 0; i < num_events; i++) {
1991 		u32 key_level1;
1992 
1993 		if (obj)
1994 			obj_type = get_dec_obj_type(obj,
1995 						    event_type_num_list[i]);
1996 		key_level1 = event_type_num_list[i] | obj_type << 16;
1997 
1998 		err = subscribe_event_xa_alloc(devx_event_table,
1999 					       key_level1,
2000 					       obj,
2001 					       obj_id);
2002 		if (err)
2003 			goto err;
2004 
2005 		num_alloc_xa_entries++;
2006 		event_sub = kzalloc(sizeof(*event_sub), GFP_KERNEL);
2007 		if (!event_sub)
2008 			goto err;
2009 
2010 		list_add_tail(&event_sub->event_list, &sub_list);
2011 		uverbs_uobject_get(&ev_file->uobj);
2012 		if (use_eventfd) {
2013 			event_sub->eventfd =
2014 				fdget(redirect_fd);
2015 
2016 			if (event_sub->eventfd.file == NULL) {
2017 				err = -EBADF;
2018 				goto err;
2019 			}
2020 		}
2021 
2022 		event_sub->cookie = cookie;
2023 		event_sub->ev_file = ev_file;
2024 		/* May be needed upon cleanup the devx object/subscription */
2025 		event_sub->xa_key_level1 = key_level1;
2026 		event_sub->xa_key_level2 = obj_id;
2027 		INIT_LIST_HEAD(&event_sub->obj_list);
2028 	}
2029 
2030 	/* Once all the allocations and the XA data insertions were done we
2031 	 * can go ahead and add all the subscriptions to the relevant lists
2032 	 * without concern of a failure.
2033 	 */
2034 	list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2035 		struct devx_event *event;
2036 		struct devx_obj_event *obj_event;
2037 
2038 		list_del_init(&event_sub->event_list);
2039 
2040 		spin_lock_irq(&ev_file->lock);
2041 		list_add_tail_rcu(&event_sub->file_list,
2042 				  &ev_file->subscribed_events_list);
2043 		spin_unlock_irq(&ev_file->lock);
2044 
2045 		event = xa_load(&devx_event_table->event_xa,
2046 				event_sub->xa_key_level1);
2047 		WARN_ON(!event);
2048 
2049 		if (!obj) {
2050 			list_add_tail_rcu(&event_sub->xa_list,
2051 					  &event->unaffiliated_list);
2052 			continue;
2053 		}
2054 
2055 		obj_event = xa_load(&event->object_ids, obj_id);
2056 		WARN_ON(!obj_event);
2057 		list_add_tail_rcu(&event_sub->xa_list,
2058 				  &obj_event->obj_sub_list);
2059 		list_add_tail_rcu(&event_sub->obj_list,
2060 				  &obj->event_sub);
2061 	}
2062 
2063 	mutex_unlock(&devx_event_table->event_xa_lock);
2064 	return 0;
2065 
2066 err:
2067 	list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2068 		list_del(&event_sub->event_list);
2069 
2070 		subscribe_event_xa_dealloc(devx_event_table,
2071 					   event_sub->xa_key_level1,
2072 					   obj,
2073 					   obj_id);
2074 
2075 		if (event_sub->eventfd.file)
2076 			fdput(event_sub->eventfd);
2077 		uverbs_uobject_put(&event_sub->ev_file->uobj);
2078 		kfree(event_sub);
2079 	}
2080 
2081 	mutex_unlock(&devx_event_table->event_xa_lock);
2082 	return err;
2083 }
2084 
2085 static int devx_umem_get(struct mlx5_ib_dev *dev, struct ib_ucontext *ucontext,
2086 			 struct uverbs_attr_bundle *attrs,
2087 			 struct devx_umem *obj)
2088 {
2089 	u64 addr;
2090 	size_t size;
2091 	u32 access;
2092 	int npages;
2093 	int err;
2094 	u32 page_mask;
2095 
2096 	if (uverbs_copy_from(&addr, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR) ||
2097 	    uverbs_copy_from(&size, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_LEN))
2098 		return -EFAULT;
2099 
2100 	err = uverbs_get_flags32(&access, attrs,
2101 				 MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2102 				 IB_ACCESS_LOCAL_WRITE |
2103 				 IB_ACCESS_REMOTE_WRITE |
2104 				 IB_ACCESS_REMOTE_READ);
2105 	if (err)
2106 		return err;
2107 
2108 	err = ib_check_mr_access(access);
2109 	if (err)
2110 		return err;
2111 
2112 	obj->umem = ib_umem_get(ucontext, addr, size, access, 0);
2113 	if (IS_ERR(obj->umem))
2114 		return PTR_ERR(obj->umem);
2115 
2116 	mlx5_ib_cont_pages(obj->umem, obj->umem->address,
2117 			   MLX5_MKEY_PAGE_SHIFT_MASK, &npages,
2118 			   &obj->page_shift, &obj->ncont, NULL);
2119 
2120 	if (!npages) {
2121 		ib_umem_release(obj->umem);
2122 		return -EINVAL;
2123 	}
2124 
2125 	page_mask = (1 << obj->page_shift) - 1;
2126 	obj->page_offset = obj->umem->address & page_mask;
2127 
2128 	return 0;
2129 }
2130 
2131 static int devx_umem_reg_cmd_alloc(struct uverbs_attr_bundle *attrs,
2132 				   struct devx_umem *obj,
2133 				   struct devx_umem_reg_cmd *cmd)
2134 {
2135 	cmd->inlen = MLX5_ST_SZ_BYTES(create_umem_in) +
2136 		    (MLX5_ST_SZ_BYTES(mtt) * obj->ncont);
2137 	cmd->in = uverbs_zalloc(attrs, cmd->inlen);
2138 	return PTR_ERR_OR_ZERO(cmd->in);
2139 }
2140 
2141 static void devx_umem_reg_cmd_build(struct mlx5_ib_dev *dev,
2142 				    struct devx_umem *obj,
2143 				    struct devx_umem_reg_cmd *cmd)
2144 {
2145 	void *umem;
2146 	__be64 *mtt;
2147 
2148 	umem = MLX5_ADDR_OF(create_umem_in, cmd->in, umem);
2149 	mtt = (__be64 *)MLX5_ADDR_OF(umem, umem, mtt);
2150 
2151 	MLX5_SET(create_umem_in, cmd->in, opcode, MLX5_CMD_OP_CREATE_UMEM);
2152 	MLX5_SET64(umem, umem, num_of_mtt, obj->ncont);
2153 	MLX5_SET(umem, umem, log_page_size, obj->page_shift -
2154 					    MLX5_ADAPTER_PAGE_SHIFT);
2155 	MLX5_SET(umem, umem, page_offset, obj->page_offset);
2156 	mlx5_ib_populate_pas(dev, obj->umem, obj->page_shift, mtt,
2157 			     (obj->umem->writable ? MLX5_IB_MTT_WRITE : 0) |
2158 			     MLX5_IB_MTT_READ);
2159 }
2160 
2161 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)(
2162 	struct uverbs_attr_bundle *attrs)
2163 {
2164 	struct devx_umem_reg_cmd cmd;
2165 	struct devx_umem *obj;
2166 	struct ib_uobject *uobj = uverbs_attr_get_uobject(
2167 		attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2168 	u32 obj_id;
2169 	struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
2170 		&attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
2171 	struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
2172 	int err;
2173 
2174 	if (!c->devx_uid)
2175 		return -EINVAL;
2176 
2177 	obj = kzalloc(sizeof(struct devx_umem), GFP_KERNEL);
2178 	if (!obj)
2179 		return -ENOMEM;
2180 
2181 	err = devx_umem_get(dev, &c->ibucontext, attrs, obj);
2182 	if (err)
2183 		goto err_obj_free;
2184 
2185 	err = devx_umem_reg_cmd_alloc(attrs, obj, &cmd);
2186 	if (err)
2187 		goto err_umem_release;
2188 
2189 	devx_umem_reg_cmd_build(dev, obj, &cmd);
2190 
2191 	MLX5_SET(create_umem_in, cmd.in, uid, c->devx_uid);
2192 	err = mlx5_cmd_exec(dev->mdev, cmd.in, cmd.inlen, cmd.out,
2193 			    sizeof(cmd.out));
2194 	if (err)
2195 		goto err_umem_release;
2196 
2197 	obj->mdev = dev->mdev;
2198 	uobj->object = obj;
2199 	devx_obj_build_destroy_cmd(cmd.in, cmd.out, obj->dinbox, &obj->dinlen, &obj_id);
2200 	err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID, &obj_id, sizeof(obj_id));
2201 	if (err)
2202 		goto err_umem_destroy;
2203 
2204 	return 0;
2205 
2206 err_umem_destroy:
2207 	mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, cmd.out, sizeof(cmd.out));
2208 err_umem_release:
2209 	ib_umem_release(obj->umem);
2210 err_obj_free:
2211 	kfree(obj);
2212 	return err;
2213 }
2214 
2215 static int devx_umem_cleanup(struct ib_uobject *uobject,
2216 			     enum rdma_remove_reason why,
2217 			     struct uverbs_attr_bundle *attrs)
2218 {
2219 	struct devx_umem *obj = uobject->object;
2220 	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
2221 	int err;
2222 
2223 	err = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
2224 	if (ib_is_destroy_retryable(err, why, uobject))
2225 		return err;
2226 
2227 	ib_umem_release(obj->umem);
2228 	kfree(obj);
2229 	return 0;
2230 }
2231 
2232 static bool is_unaffiliated_event(struct mlx5_core_dev *dev,
2233 				  unsigned long event_type)
2234 {
2235 	__be64 *unaff_events;
2236 	int mask_entry;
2237 	int mask_bit;
2238 
2239 	if (!MLX5_CAP_GEN(dev, event_cap))
2240 		return is_legacy_unaffiliated_event_num(event_type);
2241 
2242 	unaff_events = (__be64 *)MLX5_CAP_DEV_EVENT(dev,
2243 					  user_unaffiliated_events);
2244 	WARN_ON(event_type > MAX_SUPP_EVENT_NUM);
2245 
2246 	mask_entry = event_type / 64;
2247 	mask_bit = event_type % 64;
2248 
2249 	if (!(be64_to_cpu(unaff_events[mask_entry]) & (1ull << mask_bit)))
2250 		return false;
2251 
2252 	return true;
2253 }
2254 
2255 static u32 devx_get_obj_id_from_event(unsigned long event_type, void *data)
2256 {
2257 	struct mlx5_eqe *eqe = data;
2258 	u32 obj_id = 0;
2259 
2260 	switch (event_type) {
2261 	case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
2262 	case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
2263 	case MLX5_EVENT_TYPE_PATH_MIG:
2264 	case MLX5_EVENT_TYPE_COMM_EST:
2265 	case MLX5_EVENT_TYPE_SQ_DRAINED:
2266 	case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
2267 	case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
2268 	case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
2269 	case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
2270 	case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
2271 		obj_id = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff;
2272 		break;
2273 	case MLX5_EVENT_TYPE_XRQ_ERROR:
2274 		obj_id = be32_to_cpu(eqe->data.xrq_err.type_xrqn) & 0xffffff;
2275 		break;
2276 	case MLX5_EVENT_TYPE_DCT_DRAINED:
2277 	case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
2278 		obj_id = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff;
2279 		break;
2280 	case MLX5_EVENT_TYPE_CQ_ERROR:
2281 		obj_id = be32_to_cpu(eqe->data.cq_err.cqn) & 0xffffff;
2282 		break;
2283 	default:
2284 		obj_id = MLX5_GET(affiliated_event_header, &eqe->data, obj_id);
2285 		break;
2286 	}
2287 
2288 	return obj_id;
2289 }
2290 
2291 static int deliver_event(struct devx_event_subscription *event_sub,
2292 			 const void *data)
2293 {
2294 	struct devx_async_event_file *ev_file;
2295 	struct devx_async_event_data *event_data;
2296 	unsigned long flags;
2297 
2298 	ev_file = event_sub->ev_file;
2299 
2300 	if (ev_file->omit_data) {
2301 		spin_lock_irqsave(&ev_file->lock, flags);
2302 		if (!list_empty(&event_sub->event_list) ||
2303 		    ev_file->is_destroyed) {
2304 			spin_unlock_irqrestore(&ev_file->lock, flags);
2305 			return 0;
2306 		}
2307 
2308 		list_add_tail(&event_sub->event_list, &ev_file->event_list);
2309 		spin_unlock_irqrestore(&ev_file->lock, flags);
2310 		wake_up_interruptible(&ev_file->poll_wait);
2311 		return 0;
2312 	}
2313 
2314 	event_data = kzalloc(sizeof(*event_data) + sizeof(struct mlx5_eqe),
2315 			     GFP_ATOMIC);
2316 	if (!event_data) {
2317 		spin_lock_irqsave(&ev_file->lock, flags);
2318 		ev_file->is_overflow_err = 1;
2319 		spin_unlock_irqrestore(&ev_file->lock, flags);
2320 		return -ENOMEM;
2321 	}
2322 
2323 	event_data->hdr.cookie = event_sub->cookie;
2324 	memcpy(event_data->hdr.out_data, data, sizeof(struct mlx5_eqe));
2325 
2326 	spin_lock_irqsave(&ev_file->lock, flags);
2327 	if (!ev_file->is_destroyed)
2328 		list_add_tail(&event_data->list, &ev_file->event_list);
2329 	else
2330 		kfree(event_data);
2331 	spin_unlock_irqrestore(&ev_file->lock, flags);
2332 	wake_up_interruptible(&ev_file->poll_wait);
2333 
2334 	return 0;
2335 }
2336 
2337 static void dispatch_event_fd(struct list_head *fd_list,
2338 			      const void *data)
2339 {
2340 	struct devx_event_subscription *item;
2341 
2342 	list_for_each_entry_rcu(item, fd_list, xa_list) {
2343 		if (item->eventfd.file != NULL)
2344 			linux_poll_wakeup(item->eventfd.file);
2345 		else
2346 			deliver_event(item, data);
2347 	}
2348 }
2349 
2350 static bool mlx5_devx_event_notifier(struct mlx5_core_dev *mdev,
2351 				     uint8_t event_type, void *data)
2352 {
2353 	struct mlx5_ib_dev *dev;
2354 	struct mlx5_devx_event_table *table;
2355 	struct devx_event *event;
2356 	struct devx_obj_event *obj_event;
2357 	u16 obj_type = 0;
2358 	bool is_unaffiliated;
2359 	u32 obj_id;
2360 
2361 	/* Explicit filtering to kernel events which may occur frequently */
2362 	if (event_type == MLX5_EVENT_TYPE_CMD ||
2363 	    event_type == MLX5_EVENT_TYPE_PAGE_REQUEST)
2364 		return true;
2365 
2366 	dev = mdev->priv.eq_table.dev;
2367 	table = &dev->devx_event_table;
2368 	is_unaffiliated = is_unaffiliated_event(dev->mdev, event_type);
2369 
2370 	if (!is_unaffiliated)
2371 		obj_type = get_event_obj_type(event_type, data);
2372 
2373 	rcu_read_lock();
2374 	event = xa_load(&table->event_xa, event_type | (obj_type << 16));
2375 	if (!event) {
2376 		rcu_read_unlock();
2377 		return false;
2378 	}
2379 
2380 	if (is_unaffiliated) {
2381 		dispatch_event_fd(&event->unaffiliated_list, data);
2382 		rcu_read_unlock();
2383 		return true;
2384 	}
2385 
2386 	obj_id = devx_get_obj_id_from_event(event_type, data);
2387 	obj_event = xa_load(&event->object_ids, obj_id);
2388 	if (!obj_event) {
2389 		rcu_read_unlock();
2390 		return false;
2391 	}
2392 
2393 	dispatch_event_fd(&obj_event->obj_sub_list, data);
2394 
2395 	rcu_read_unlock();
2396 	return true;
2397 }
2398 
2399 void mlx5_ib_devx_init_event_table(struct mlx5_ib_dev *dev)
2400 {
2401 	struct mlx5_devx_event_table *table = &dev->devx_event_table;
2402 
2403 	xa_init_flags(&table->event_xa, 0);
2404 	mutex_init(&table->event_xa_lock);
2405 	dev->mdev->priv.eq_table.dev = dev;
2406 	dev->mdev->priv.eq_table.cb = mlx5_devx_event_notifier;
2407 }
2408 
2409 void mlx5_ib_devx_cleanup_event_table(struct mlx5_ib_dev *dev)
2410 {
2411 	struct mlx5_devx_event_table *table = &dev->devx_event_table;
2412 	struct devx_event_subscription *sub, *tmp;
2413 	struct devx_event *event;
2414 	void *entry;
2415 	unsigned long id;
2416 
2417 	dev->mdev->priv.eq_table.cb = NULL;
2418 	dev->mdev->priv.eq_table.dev = NULL;
2419 	mutex_lock(&dev->devx_event_table.event_xa_lock);
2420 	xa_for_each(&table->event_xa, id, entry) {
2421 		event = entry;
2422 		list_for_each_entry_safe(sub, tmp, &event->unaffiliated_list,
2423 					 xa_list)
2424 			devx_cleanup_subscription(dev, sub);
2425 		kfree(entry);
2426 	}
2427 	mutex_unlock(&dev->devx_event_table.event_xa_lock);
2428 	xa_destroy(&table->event_xa);
2429 }
2430 
2431 static ssize_t devx_async_cmd_event_read(struct file *filp, char __user *buf,
2432 					 size_t count, loff_t *pos)
2433 {
2434 	struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2435 	struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2436 	struct devx_async_data *event;
2437 	int ret = 0;
2438 	size_t eventsz;
2439 
2440 	spin_lock_irq(&ev_queue->lock);
2441 
2442 	while (list_empty(&ev_queue->event_list)) {
2443 		spin_unlock_irq(&ev_queue->lock);
2444 
2445 		if (filp->f_flags & O_NONBLOCK)
2446 			return -EAGAIN;
2447 
2448 		if (wait_event_interruptible(
2449 			    ev_queue->poll_wait,
2450 			    (!list_empty(&ev_queue->event_list) ||
2451 			     ev_queue->is_destroyed))) {
2452 			return -ERESTARTSYS;
2453 		}
2454 
2455 		spin_lock_irq(&ev_queue->lock);
2456 		if (ev_queue->is_destroyed) {
2457 			spin_unlock_irq(&ev_queue->lock);
2458 			return -EIO;
2459 		}
2460 	}
2461 
2462 	event = list_entry(ev_queue->event_list.next,
2463 			   struct devx_async_data, list);
2464 	eventsz = event->cmd_out_len +
2465 			sizeof(struct mlx5_ib_uapi_devx_async_cmd_hdr);
2466 
2467 	if (eventsz > count) {
2468 		spin_unlock_irq(&ev_queue->lock);
2469 		return -ENOSPC;
2470 	}
2471 
2472 	list_del(ev_queue->event_list.next);
2473 	spin_unlock_irq(&ev_queue->lock);
2474 
2475 	if (copy_to_user(buf, &event->hdr, eventsz))
2476 		ret = -EFAULT;
2477 	else
2478 		ret = eventsz;
2479 
2480 	atomic_sub(event->cmd_out_len, &ev_queue->bytes_in_use);
2481 	kvfree(event);
2482 	return ret;
2483 }
2484 
2485 static __poll_t devx_async_cmd_event_poll(struct file *filp,
2486 					  struct poll_table_struct *wait)
2487 {
2488 	struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2489 	struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2490 	__poll_t pollflags = 0;
2491 
2492 	poll_wait(filp, &ev_queue->poll_wait, wait);
2493 
2494 	spin_lock_irq(&ev_queue->lock);
2495 	if (ev_queue->is_destroyed)
2496 		pollflags = POLLIN | POLLRDNORM | POLLHUP;
2497 	else if (!list_empty(&ev_queue->event_list))
2498 		pollflags = POLLIN | POLLRDNORM;
2499 	spin_unlock_irq(&ev_queue->lock);
2500 
2501 	return pollflags;
2502 }
2503 
2504 static const struct file_operations devx_async_cmd_event_fops = {
2505 	.owner	 = THIS_MODULE,
2506 	.read	 = devx_async_cmd_event_read,
2507 	.poll    = devx_async_cmd_event_poll,
2508 	.release = uverbs_uobject_fd_release,
2509 	.llseek	 = no_llseek,
2510 };
2511 
2512 static ssize_t devx_async_event_read(struct file *filp, char __user *buf,
2513 				     size_t count, loff_t *pos)
2514 {
2515 	struct devx_async_event_file *ev_file = filp->private_data;
2516 	struct devx_event_subscription *event_sub;
2517 	struct devx_async_event_data *uninitialized_var(event);
2518 	int ret = 0;
2519 	size_t eventsz;
2520 	bool omit_data;
2521 	void *event_data;
2522 
2523 	omit_data = ev_file->omit_data;
2524 
2525 	spin_lock_irq(&ev_file->lock);
2526 
2527 	if (ev_file->is_overflow_err) {
2528 		ev_file->is_overflow_err = 0;
2529 		spin_unlock_irq(&ev_file->lock);
2530 		return -EOVERFLOW;
2531 	}
2532 
2533 
2534 	while (list_empty(&ev_file->event_list)) {
2535 		spin_unlock_irq(&ev_file->lock);
2536 
2537 		if (filp->f_flags & O_NONBLOCK)
2538 			return -EAGAIN;
2539 
2540 		if (wait_event_interruptible(ev_file->poll_wait,
2541 			    (!list_empty(&ev_file->event_list) ||
2542 			     ev_file->is_destroyed))) {
2543 			return -ERESTARTSYS;
2544 		}
2545 
2546 		spin_lock_irq(&ev_file->lock);
2547 		if (ev_file->is_destroyed) {
2548 			spin_unlock_irq(&ev_file->lock);
2549 			return -EIO;
2550 		}
2551 	}
2552 
2553 	if (omit_data) {
2554 		event_sub = list_first_entry(&ev_file->event_list,
2555 					struct devx_event_subscription,
2556 					event_list);
2557 		eventsz = sizeof(event_sub->cookie);
2558 		event_data = &event_sub->cookie;
2559 	} else {
2560 		event = list_first_entry(&ev_file->event_list,
2561 				      struct devx_async_event_data, list);
2562 		eventsz = sizeof(struct mlx5_eqe) +
2563 			sizeof(struct mlx5_ib_uapi_devx_async_event_hdr);
2564 		event_data = &event->hdr;
2565 	}
2566 
2567 	if (eventsz > count) {
2568 		spin_unlock_irq(&ev_file->lock);
2569 		return -EINVAL;
2570 	}
2571 
2572 	if (omit_data)
2573 		list_del_init(&event_sub->event_list);
2574 	else
2575 		list_del(&event->list);
2576 
2577 	spin_unlock_irq(&ev_file->lock);
2578 
2579 	if (copy_to_user(buf, event_data, eventsz))
2580 		/* This points to an application issue, not a kernel concern */
2581 		ret = -EFAULT;
2582 	else
2583 		ret = eventsz;
2584 
2585 	if (!omit_data)
2586 		kfree(event);
2587 	return ret;
2588 }
2589 
2590 static __poll_t devx_async_event_poll(struct file *filp,
2591 				      struct poll_table_struct *wait)
2592 {
2593 	struct devx_async_event_file *ev_file = filp->private_data;
2594 	__poll_t pollflags = 0;
2595 
2596 	poll_wait(filp, &ev_file->poll_wait, wait);
2597 
2598 	spin_lock_irq(&ev_file->lock);
2599 	if (ev_file->is_destroyed)
2600 		pollflags = POLLIN | POLLRDNORM | POLLHUP;
2601 	else if (!list_empty(&ev_file->event_list))
2602 		pollflags = POLLIN | POLLRDNORM;
2603 	spin_unlock_irq(&ev_file->lock);
2604 
2605 	return pollflags;
2606 }
2607 
2608 static void devx_free_subscription(struct rcu_head *rcu)
2609 {
2610 	struct devx_event_subscription *event_sub =
2611 		container_of(rcu, struct devx_event_subscription, rcu);
2612 
2613 	if (event_sub->eventfd.file)
2614 		fdput(event_sub->eventfd);
2615 	uverbs_uobject_put(&event_sub->ev_file->uobj);
2616 	kfree(event_sub);
2617 }
2618 
2619 static const struct file_operations devx_async_event_fops = {
2620 	.owner	 = THIS_MODULE,
2621 	.read	 = devx_async_event_read,
2622 	.poll    = devx_async_event_poll,
2623 	.release = uverbs_uobject_fd_release,
2624 	.llseek	 = no_llseek,
2625 };
2626 
2627 static int devx_async_cmd_event_destroy_uobj(struct ib_uobject *uobj,
2628 					     enum rdma_remove_reason why)
2629 {
2630 	struct devx_async_cmd_event_file *comp_ev_file =
2631 		container_of(uobj, struct devx_async_cmd_event_file,
2632 			     uobj);
2633 	struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2634 	struct devx_async_data *entry, *tmp;
2635 
2636 	spin_lock_irq(&ev_queue->lock);
2637 	ev_queue->is_destroyed = 1;
2638 	spin_unlock_irq(&ev_queue->lock);
2639 	wake_up_interruptible(&ev_queue->poll_wait);
2640 
2641 	mlx5_cmd_cleanup_async_ctx(&comp_ev_file->async_ctx);
2642 
2643 	spin_lock_irq(&comp_ev_file->ev_queue.lock);
2644 	list_for_each_entry_safe(entry, tmp,
2645 				 &comp_ev_file->ev_queue.event_list, list) {
2646 		list_del(&entry->list);
2647 		kvfree(entry);
2648 	}
2649 	spin_unlock_irq(&comp_ev_file->ev_queue.lock);
2650 	return 0;
2651 };
2652 
2653 static int devx_async_event_destroy_uobj(struct ib_uobject *uobj,
2654 					 enum rdma_remove_reason why)
2655 {
2656 	struct devx_async_event_file *ev_file =
2657 		container_of(uobj, struct devx_async_event_file,
2658 			     uobj);
2659 	struct devx_event_subscription *event_sub, *event_sub_tmp;
2660 	struct mlx5_ib_dev *dev = ev_file->dev;
2661 
2662 	spin_lock_irq(&ev_file->lock);
2663 	ev_file->is_destroyed = 1;
2664 
2665 	/* free the pending events allocation */
2666 	if (ev_file->omit_data) {
2667 		struct devx_event_subscription *event_sub, *tmp;
2668 
2669 		list_for_each_entry_safe(event_sub, tmp, &ev_file->event_list,
2670 					 event_list)
2671 			list_del_init(&event_sub->event_list);
2672 
2673 	} else {
2674 		struct devx_async_event_data *entry, *tmp;
2675 
2676 		list_for_each_entry_safe(entry, tmp, &ev_file->event_list,
2677 					 list) {
2678 			list_del(&entry->list);
2679 			kfree(entry);
2680 		}
2681 	}
2682 
2683 	spin_unlock_irq(&ev_file->lock);
2684 	wake_up_interruptible(&ev_file->poll_wait);
2685 
2686 	mutex_lock(&dev->devx_event_table.event_xa_lock);
2687 	/* delete the subscriptions which are related to this FD */
2688 	list_for_each_entry_safe(event_sub, event_sub_tmp,
2689 				 &ev_file->subscribed_events_list, file_list) {
2690 		devx_cleanup_subscription(dev, event_sub);
2691 		list_del_rcu(&event_sub->file_list);
2692 		/* subscription may not be used by the read API any more */
2693 		call_rcu(&event_sub->rcu, devx_free_subscription);
2694 	}
2695 	mutex_unlock(&dev->devx_event_table.event_xa_lock);
2696 
2697 	put_device(&dev->ib_dev.dev);
2698 	return 0;
2699 };
2700 
2701 DECLARE_UVERBS_NAMED_METHOD(
2702 	MLX5_IB_METHOD_DEVX_UMEM_REG,
2703 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE,
2704 			MLX5_IB_OBJECT_DEVX_UMEM,
2705 			UVERBS_ACCESS_NEW,
2706 			UA_MANDATORY),
2707 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR,
2708 			   UVERBS_ATTR_TYPE(u64),
2709 			   UA_MANDATORY),
2710 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_LEN,
2711 			   UVERBS_ATTR_TYPE(u64),
2712 			   UA_MANDATORY),
2713 	UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2714 			     enum ib_access_flags),
2715 	UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID,
2716 			    UVERBS_ATTR_TYPE(u32),
2717 			    UA_MANDATORY));
2718 
2719 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2720 	MLX5_IB_METHOD_DEVX_UMEM_DEREG,
2721 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_DEREG_HANDLE,
2722 			MLX5_IB_OBJECT_DEVX_UMEM,
2723 			UVERBS_ACCESS_DESTROY,
2724 			UA_MANDATORY));
2725 
2726 DECLARE_UVERBS_NAMED_METHOD(
2727 	MLX5_IB_METHOD_DEVX_QUERY_EQN,
2728 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC,
2729 			   UVERBS_ATTR_TYPE(u32),
2730 			   UA_MANDATORY),
2731 	UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
2732 			    UVERBS_ATTR_TYPE(u32),
2733 			    UA_MANDATORY));
2734 
2735 DECLARE_UVERBS_NAMED_METHOD(
2736 	MLX5_IB_METHOD_DEVX_QUERY_UAR,
2737 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX,
2738 			   UVERBS_ATTR_TYPE(u32),
2739 			   UA_MANDATORY),
2740 	UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
2741 			    UVERBS_ATTR_TYPE(u32),
2742 			    UA_MANDATORY));
2743 
2744 DECLARE_UVERBS_NAMED_METHOD(
2745 	MLX5_IB_METHOD_DEVX_OTHER,
2746 	UVERBS_ATTR_PTR_IN(
2747 		MLX5_IB_ATTR_DEVX_OTHER_CMD_IN,
2748 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2749 		UA_MANDATORY,
2750 		UA_ALLOC_AND_COPY),
2751 	UVERBS_ATTR_PTR_OUT(
2752 		MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT,
2753 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2754 		UA_MANDATORY));
2755 
2756 DECLARE_UVERBS_NAMED_METHOD(
2757 	MLX5_IB_METHOD_DEVX_OBJ_CREATE,
2758 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE,
2759 			MLX5_IB_OBJECT_DEVX_OBJ,
2760 			UVERBS_ACCESS_NEW,
2761 			UA_MANDATORY),
2762 	UVERBS_ATTR_PTR_IN(
2763 		MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN,
2764 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2765 		UA_MANDATORY,
2766 		UA_ALLOC_AND_COPY),
2767 	UVERBS_ATTR_PTR_OUT(
2768 		MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT,
2769 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2770 		UA_MANDATORY));
2771 
2772 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2773 	MLX5_IB_METHOD_DEVX_OBJ_DESTROY,
2774 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_DESTROY_HANDLE,
2775 			MLX5_IB_OBJECT_DEVX_OBJ,
2776 			UVERBS_ACCESS_DESTROY,
2777 			UA_MANDATORY));
2778 
2779 DECLARE_UVERBS_NAMED_METHOD(
2780 	MLX5_IB_METHOD_DEVX_OBJ_MODIFY,
2781 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE,
2782 			UVERBS_IDR_ANY_OBJECT,
2783 			UVERBS_ACCESS_WRITE,
2784 			UA_MANDATORY),
2785 	UVERBS_ATTR_PTR_IN(
2786 		MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN,
2787 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2788 		UA_MANDATORY,
2789 		UA_ALLOC_AND_COPY),
2790 	UVERBS_ATTR_PTR_OUT(
2791 		MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
2792 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2793 		UA_MANDATORY));
2794 
2795 DECLARE_UVERBS_NAMED_METHOD(
2796 	MLX5_IB_METHOD_DEVX_OBJ_QUERY,
2797 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2798 			UVERBS_IDR_ANY_OBJECT,
2799 			UVERBS_ACCESS_READ,
2800 			UA_MANDATORY),
2801 	UVERBS_ATTR_PTR_IN(
2802 		MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2803 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2804 		UA_MANDATORY,
2805 		UA_ALLOC_AND_COPY),
2806 	UVERBS_ATTR_PTR_OUT(
2807 		MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
2808 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2809 		UA_MANDATORY));
2810 
2811 DECLARE_UVERBS_NAMED_METHOD(
2812 	MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY,
2813 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2814 			UVERBS_IDR_ANY_OBJECT,
2815 			UVERBS_ACCESS_READ,
2816 			UA_MANDATORY),
2817 	UVERBS_ATTR_PTR_IN(
2818 		MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2819 		UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2820 		UA_MANDATORY,
2821 		UA_ALLOC_AND_COPY),
2822 	UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN,
2823 		u16, UA_MANDATORY),
2824 	UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD,
2825 		MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2826 		UVERBS_ACCESS_READ,
2827 		UA_MANDATORY),
2828 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID,
2829 		UVERBS_ATTR_TYPE(u64),
2830 		UA_MANDATORY));
2831 
2832 DECLARE_UVERBS_NAMED_METHOD(
2833 	MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT,
2834 	UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE,
2835 		MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2836 		UVERBS_ACCESS_READ,
2837 		UA_MANDATORY),
2838 	UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE,
2839 		MLX5_IB_OBJECT_DEVX_OBJ,
2840 		UVERBS_ACCESS_READ,
2841 		UA_OPTIONAL),
2842 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
2843 		UVERBS_ATTR_MIN_SIZE(sizeof(u16)),
2844 		UA_MANDATORY,
2845 		UA_ALLOC_AND_COPY),
2846 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE,
2847 		UVERBS_ATTR_TYPE(u64),
2848 		UA_OPTIONAL),
2849 	UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM,
2850 		UVERBS_ATTR_TYPE(u32),
2851 		UA_OPTIONAL));
2852 
2853 DECLARE_UVERBS_GLOBAL_METHODS(MLX5_IB_OBJECT_DEVX,
2854 			      &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OTHER),
2855 			      &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_UAR),
2856 			      &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_EQN),
2857 			      &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT));
2858 
2859 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_OBJ,
2860 			    UVERBS_TYPE_ALLOC_IDR(devx_obj_cleanup),
2861 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_CREATE),
2862 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_DESTROY),
2863 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_MODIFY),
2864 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_QUERY),
2865 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY));
2866 
2867 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_UMEM,
2868 			    UVERBS_TYPE_ALLOC_IDR(devx_umem_cleanup),
2869 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_REG),
2870 			    &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_DEREG));
2871 
2872 
2873 DECLARE_UVERBS_NAMED_METHOD(
2874 	MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC,
2875 	UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE,
2876 			MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2877 			UVERBS_ACCESS_NEW,
2878 			UA_MANDATORY));
2879 
2880 DECLARE_UVERBS_NAMED_OBJECT(
2881 	MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2882 	UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_cmd_event_file),
2883 			     devx_async_cmd_event_destroy_uobj,
2884 			     &devx_async_cmd_event_fops, "[devx_async_cmd]",
2885 			     FMODE_READ),
2886 	&UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC));
2887 
2888 DECLARE_UVERBS_NAMED_METHOD(
2889 	MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC,
2890 	UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE,
2891 			MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2892 			UVERBS_ACCESS_NEW,
2893 			UA_MANDATORY),
2894 	UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
2895 			enum mlx5_ib_uapi_devx_create_event_channel_flags,
2896 			UA_MANDATORY));
2897 
2898 DECLARE_UVERBS_NAMED_OBJECT(
2899 	MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2900 	UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_event_file),
2901 			     devx_async_event_destroy_uobj,
2902 			     &devx_async_event_fops, "[devx_async_event]",
2903 			     FMODE_READ),
2904 	&UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC));
2905 
2906 static bool devx_is_supported(struct ib_device *device)
2907 {
2908 	struct mlx5_ib_dev *dev = to_mdev(device);
2909 
2910 	return MLX5_CAP_GEN(dev->mdev, log_max_uctx);
2911 }
2912 
2913 const struct uapi_definition mlx5_ib_devx_defs[] = {
2914 	UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2915 		MLX5_IB_OBJECT_DEVX,
2916 		UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2917 	UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2918 		MLX5_IB_OBJECT_DEVX_OBJ,
2919 		UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2920 	UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2921 		MLX5_IB_OBJECT_DEVX_UMEM,
2922 		UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2923 	UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2924 		MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2925 		UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2926 	UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2927 		MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2928 		UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2929 	{},
2930 };
2931