1 /*- 2 * Copyright (c) 2006 Bernd Walter. All rights reserved. 3 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 4 * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * Portions of this software may have been developed with reference to 27 * the SD Simplified Specification. The following disclaimer may apply: 28 * 29 * The following conditions apply to the release of the simplified 30 * specification ("Simplified Specification") by the SD Card Association and 31 * the SD Group. The Simplified Specification is a subset of the complete SD 32 * Specification which is owned by the SD Card Association and the SD 33 * Group. This Simplified Specification is provided on a non-confidential 34 * basis subject to the disclaimers below. Any implementation of the 35 * Simplified Specification may require a license from the SD Card 36 * Association, SD Group, SD-3C LLC or other third parties. 37 * 38 * Disclaimers: 39 * 40 * The information contained in the Simplified Specification is presented only 41 * as a standard specification for SD Cards and SD Host/Ancillary products and 42 * is provided "AS-IS" without any representations or warranties of any 43 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 44 * Card Association for any damages, any infringements of patents or other 45 * right of the SD Group, SD-3C LLC, the SD Card Association or any third 46 * parties, which may result from its use. No license is granted by 47 * implication, estoppel or otherwise under any patent or other rights of the 48 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 49 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC 50 * or the SD Card Association to disclose or distribute any technical 51 * information, know-how or other confidential information to any third party. 52 */ 53 54 #include <sys/cdefs.h> 55 __FBSDID("$FreeBSD$"); 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/kernel.h> 60 #include <sys/malloc.h> 61 #include <sys/lock.h> 62 #include <sys/module.h> 63 #include <sys/mutex.h> 64 #include <sys/bus.h> 65 #include <sys/endian.h> 66 #include <sys/sysctl.h> 67 #include <sys/time.h> 68 69 #include <dev/mmc/bridge.h> 70 #include <dev/mmc/mmc_private.h> 71 #include <dev/mmc/mmc_subr.h> 72 #include <dev/mmc/mmcreg.h> 73 #include <dev/mmc/mmcbrvar.h> 74 #include <dev/mmc/mmcvar.h> 75 76 #include "mmcbr_if.h" 77 #include "mmcbus_if.h" 78 79 CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY); 80 81 /* 82 * Per-card data 83 */ 84 struct mmc_ivars { 85 uint32_t raw_cid[4]; /* Raw bits of the CID */ 86 uint32_t raw_csd[4]; /* Raw bits of the CSD */ 87 uint32_t raw_scr[2]; /* Raw bits of the SCR */ 88 uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */ 89 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */ 90 uint16_t rca; 91 u_char read_only; /* True when the device is read-only */ 92 u_char high_cap; /* High Capacity device (block addressed) */ 93 enum mmc_card_mode mode; 94 enum mmc_bus_width bus_width; /* Bus width to use */ 95 struct mmc_cid cid; /* cid decoded */ 96 struct mmc_csd csd; /* csd decoded */ 97 struct mmc_scr scr; /* scr decoded */ 98 struct mmc_sd_status sd_status; /* SD_STATUS decoded */ 99 uint32_t sec_count; /* Card capacity in 512byte blocks */ 100 uint32_t timings; /* Mask of bus timings supported */ 101 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */ 102 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */ 103 uint32_t tran_speed; /* Max speed in normal mode */ 104 uint32_t hs_tran_speed; /* Max speed in high speed mode */ 105 uint32_t erase_sector; /* Card native erase sector size */ 106 uint32_t cmd6_time; /* Generic switch timeout [us] */ 107 uint32_t quirks; /* Quirks as per mmc_quirk->quirks */ 108 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ 109 char card_sn_string[16];/* Formatted serial # for disk->d_ident */ 110 }; 111 112 #define CMD_RETRIES 3 113 114 static const struct mmc_quirk mmc_quirks[] = { 115 /* 116 * For some SanDisk iNAND devices, the CMD38 argument needs to be 117 * provided in EXT_CSD[113]. 118 */ 119 { 0x2, 0x100, "SEM02G", MMC_QUIRK_INAND_CMD38 }, 120 { 0x2, 0x100, "SEM04G", MMC_QUIRK_INAND_CMD38 }, 121 { 0x2, 0x100, "SEM08G", MMC_QUIRK_INAND_CMD38 }, 122 { 0x2, 0x100, "SEM16G", MMC_QUIRK_INAND_CMD38 }, 123 { 0x2, 0x100, "SEM32G", MMC_QUIRK_INAND_CMD38 }, 124 125 /* 126 * Disable TRIM for Kingston eMMCs where a firmware bug can lead to 127 * unrecoverable data corruption. 128 */ 129 { 0x70, MMC_QUIRK_OID_ANY, "V10008", MMC_QUIRK_BROKEN_TRIM }, 130 { 0x70, MMC_QUIRK_OID_ANY, "V10016", MMC_QUIRK_BROKEN_TRIM }, 131 132 { 0x0, 0x0, NULL, 0x0 } 133 }; 134 135 static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD, NULL, "mmc driver"); 136 137 static int mmc_debug; 138 SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0, 139 "Debug level"); 140 141 /* bus entry points */ 142 static int mmc_acquire_bus(device_t busdev, device_t dev); 143 static int mmc_attach(device_t dev); 144 static int mmc_child_location_str(device_t dev, device_t child, char *buf, 145 size_t buflen); 146 static int mmc_detach(device_t dev); 147 static int mmc_probe(device_t dev); 148 static int mmc_read_ivar(device_t bus, device_t child, int which, 149 uintptr_t *result); 150 static int mmc_release_bus(device_t busdev, device_t dev); 151 static int mmc_resume(device_t dev); 152 static void mmc_retune_pause(device_t busdev, device_t dev, bool retune); 153 static void mmc_retune_unpause(device_t busdev, device_t dev); 154 static int mmc_suspend(device_t dev); 155 static int mmc_wait_for_request(device_t busdev, device_t dev, 156 struct mmc_request *req); 157 static int mmc_write_ivar(device_t bus, device_t child, int which, 158 uintptr_t value); 159 160 #define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 161 #define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 162 #define MMC_LOCK_INIT(_sc) \ 163 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \ 164 "mmc", MTX_DEF) 165 #define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx); 166 #define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED); 167 #define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED); 168 169 static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid); 170 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr); 171 static void mmc_app_decode_sd_status(uint32_t *raw_sd_status, 172 struct mmc_sd_status *sd_status); 173 static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, 174 uint32_t *rawsdstatus); 175 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, 176 uint32_t *rawscr); 177 static int mmc_calculate_clock(struct mmc_softc *sc); 178 static void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, 179 bool is_4_41p); 180 static void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid); 181 static void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd); 182 static int mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd); 183 static void mmc_delayed_attach(void *xsc); 184 static int mmc_delete_cards(struct mmc_softc *sc, bool final); 185 static void mmc_discover_cards(struct mmc_softc *sc); 186 static void mmc_format_card_id_string(struct mmc_ivars *ivar); 187 static void mmc_go_discovery(struct mmc_softc *sc); 188 static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start, 189 int size); 190 static int mmc_highest_voltage(uint32_t ocr); 191 static bool mmc_host_timing(device_t dev, enum mmc_bus_timing timing); 192 static void mmc_idle_cards(struct mmc_softc *sc); 193 static void mmc_ms_delay(int ms); 194 static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard); 195 static void mmc_power_down(struct mmc_softc *sc); 196 static void mmc_power_up(struct mmc_softc *sc); 197 static void mmc_rescan_cards(struct mmc_softc *sc); 198 static int mmc_retune(device_t busdev, device_t dev, bool reset); 199 static void mmc_scan(struct mmc_softc *sc); 200 static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, 201 uint8_t value, uint8_t *res); 202 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca); 203 static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr); 204 static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, 205 uint32_t *rocr); 206 static int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd); 207 static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs); 208 static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, 209 uint32_t *rocr); 210 static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp); 211 static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len); 212 static int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar, 213 enum mmc_bus_timing timing); 214 static int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar); 215 static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp); 216 static int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 217 enum mmc_bus_timing timing); 218 static int mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar, 219 enum mmc_bus_timing timing); 220 static int mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar, 221 uint32_t clock); 222 static int mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar, 223 uint32_t max_dtr, enum mmc_bus_timing max_timing); 224 static int mmc_test_bus_width(struct mmc_softc *sc); 225 static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar, 226 enum mmc_bus_timing timing); 227 static const char *mmc_timing_to_string(enum mmc_bus_timing timing); 228 static void mmc_update_child_list(struct mmc_softc *sc); 229 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 230 uint32_t arg, uint32_t flags, uint32_t *resp, int retries); 231 static int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req); 232 static void mmc_wakeup(struct mmc_request *req); 233 234 static void 235 mmc_ms_delay(int ms) 236 { 237 238 DELAY(1000 * ms); /* XXX BAD */ 239 } 240 241 static int 242 mmc_probe(device_t dev) 243 { 244 245 device_set_desc(dev, "MMC/SD bus"); 246 return (0); 247 } 248 249 static int 250 mmc_attach(device_t dev) 251 { 252 struct mmc_softc *sc; 253 254 sc = device_get_softc(dev); 255 sc->dev = dev; 256 MMC_LOCK_INIT(sc); 257 258 /* We'll probe and attach our children later, but before / mount */ 259 sc->config_intrhook.ich_func = mmc_delayed_attach; 260 sc->config_intrhook.ich_arg = sc; 261 if (config_intrhook_establish(&sc->config_intrhook) != 0) 262 device_printf(dev, "config_intrhook_establish failed\n"); 263 return (0); 264 } 265 266 static int 267 mmc_detach(device_t dev) 268 { 269 struct mmc_softc *sc = device_get_softc(dev); 270 int err; 271 272 err = mmc_delete_cards(sc, true); 273 if (err != 0) 274 return (err); 275 mmc_power_down(sc); 276 MMC_LOCK_DESTROY(sc); 277 278 return (0); 279 } 280 281 static int 282 mmc_suspend(device_t dev) 283 { 284 struct mmc_softc *sc = device_get_softc(dev); 285 int err; 286 287 err = bus_generic_suspend(dev); 288 if (err != 0) 289 return (err); 290 /* 291 * We power down with the bus acquired here, mainly so that no device 292 * is selected any longer and sc->last_rca gets set to 0. Otherwise, 293 * the deselect as part of the bus acquisition in mmc_scan() may fail 294 * during resume, as the bus isn't powered up again before later in 295 * mmc_go_discovery(). 296 */ 297 err = mmc_acquire_bus(dev, dev); 298 if (err != 0) 299 return (err); 300 mmc_power_down(sc); 301 err = mmc_release_bus(dev, dev); 302 return (err); 303 } 304 305 static int 306 mmc_resume(device_t dev) 307 { 308 struct mmc_softc *sc = device_get_softc(dev); 309 310 mmc_scan(sc); 311 return (bus_generic_resume(dev)); 312 } 313 314 static int 315 mmc_acquire_bus(device_t busdev, device_t dev) 316 { 317 struct mmc_softc *sc; 318 struct mmc_ivars *ivar; 319 int err; 320 uint16_t rca; 321 enum mmc_bus_timing timing; 322 323 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev); 324 if (err) 325 return (err); 326 sc = device_get_softc(busdev); 327 MMC_LOCK(sc); 328 if (sc->owner) 329 panic("mmc: host bridge didn't serialize us."); 330 sc->owner = dev; 331 MMC_UNLOCK(sc); 332 333 if (busdev != dev) { 334 /* 335 * Keep track of the last rca that we've selected. If 336 * we're asked to do it again, don't. We never 337 * unselect unless the bus code itself wants the mmc 338 * bus, and constantly reselecting causes problems. 339 */ 340 ivar = device_get_ivars(dev); 341 rca = ivar->rca; 342 if (sc->last_rca != rca) { 343 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { 344 device_printf(busdev, "Card at relative " 345 "address %d failed to select\n", rca); 346 return (ENXIO); 347 } 348 sc->last_rca = rca; 349 timing = mmcbr_get_timing(busdev); 350 /* 351 * For eMMC modes, setting/updating bus width and VCCQ 352 * only really is necessary if there actually is more 353 * than one device on the bus as generally that already 354 * had to be done by mmc_calculate_clock() or one of 355 * its calees. Moreover, setting the bus width anew 356 * can trigger re-tuning (via a CRC error on the next 357 * CMD), even if not switching between devices an the 358 * previously selected one is still tuned. Obviously, 359 * we need to re-tune the host controller if devices 360 * are actually switched, though. 361 */ 362 if (timing >= bus_timing_mmc_ddr52 && 363 sc->child_count == 1) 364 return (0); 365 /* Prepare bus width for the new card. */ 366 if (bootverbose || mmc_debug) { 367 device_printf(busdev, 368 "setting bus width to %d bits %s timing\n", 369 (ivar->bus_width == bus_width_4) ? 4 : 370 (ivar->bus_width == bus_width_8) ? 8 : 1, 371 mmc_timing_to_string(timing)); 372 } 373 if (mmc_set_card_bus_width(sc, ivar, timing) != 374 MMC_ERR_NONE) { 375 device_printf(busdev, "Card at relative " 376 "address %d failed to set bus width\n", 377 rca); 378 return (ENXIO); 379 } 380 mmcbr_set_bus_width(busdev, ivar->bus_width); 381 mmcbr_update_ios(busdev); 382 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 383 device_printf(busdev, "Failed to set VCCQ " 384 "for card at relative address %d\n", rca); 385 return (ENXIO); 386 } 387 if (timing >= bus_timing_mmc_hs200 && 388 mmc_retune(busdev, dev, true) != 0) { 389 device_printf(busdev, "Card at relative " 390 "address %d failed to re-tune\n", rca); 391 return (ENXIO); 392 } 393 } 394 } else { 395 /* 396 * If there's a card selected, stand down. 397 */ 398 if (sc->last_rca != 0) { 399 if (mmc_select_card(sc, 0) != MMC_ERR_NONE) 400 return (ENXIO); 401 sc->last_rca = 0; 402 } 403 } 404 405 return (0); 406 } 407 408 static int 409 mmc_release_bus(device_t busdev, device_t dev) 410 { 411 struct mmc_softc *sc; 412 int err; 413 414 sc = device_get_softc(busdev); 415 416 MMC_LOCK(sc); 417 if (!sc->owner) 418 panic("mmc: releasing unowned bus."); 419 if (sc->owner != dev) 420 panic("mmc: you don't own the bus. game over."); 421 MMC_UNLOCK(sc); 422 err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev); 423 if (err) 424 return (err); 425 MMC_LOCK(sc); 426 sc->owner = NULL; 427 MMC_UNLOCK(sc); 428 return (0); 429 } 430 431 static uint32_t 432 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr) 433 { 434 435 return (ocr & MMC_OCR_VOLTAGE); 436 } 437 438 static int 439 mmc_highest_voltage(uint32_t ocr) 440 { 441 int i; 442 443 for (i = MMC_OCR_MAX_VOLTAGE_SHIFT; 444 i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--) 445 if (ocr & (1 << i)) 446 return (i); 447 return (-1); 448 } 449 450 static void 451 mmc_wakeup(struct mmc_request *req) 452 { 453 struct mmc_softc *sc; 454 455 sc = (struct mmc_softc *)req->done_data; 456 MMC_LOCK(sc); 457 req->flags |= MMC_REQ_DONE; 458 MMC_UNLOCK(sc); 459 wakeup(req); 460 } 461 462 static int 463 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req) 464 { 465 466 req->done = mmc_wakeup; 467 req->done_data = sc; 468 if (__predict_false(mmc_debug > 1)) { 469 device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x", 470 req->cmd->opcode, req->cmd->arg, req->cmd->flags); 471 if (req->cmd->data) { 472 printf(" data %d\n", (int)req->cmd->data->len); 473 } else 474 printf("\n"); 475 } 476 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req); 477 MMC_LOCK(sc); 478 while ((req->flags & MMC_REQ_DONE) == 0) 479 msleep(req, &sc->sc_mtx, 0, "mmcreq", 0); 480 MMC_UNLOCK(sc); 481 if (__predict_false(mmc_debug > 2 || (mmc_debug > 0 && 482 req->cmd->error != MMC_ERR_NONE))) 483 device_printf(sc->dev, "CMD%d RESULT: %d\n", 484 req->cmd->opcode, req->cmd->error); 485 return (0); 486 } 487 488 static int 489 mmc_wait_for_request(device_t busdev, device_t dev, struct mmc_request *req) 490 { 491 struct mmc_softc *sc; 492 struct mmc_ivars *ivar; 493 int err, i; 494 enum mmc_retune_req retune_req; 495 496 sc = device_get_softc(busdev); 497 KASSERT(sc->owner != NULL, 498 ("%s: Request from %s without bus being acquired.", __func__, 499 device_get_nameunit(dev))); 500 501 /* 502 * Unless no device is selected or re-tuning is already ongoing, 503 * execute re-tuning if a) the bridge is requesting to do so and 504 * re-tuning hasn't been otherwise paused, or b) if a child asked 505 * to be re-tuned prior to pausing (see also mmc_retune_pause()). 506 */ 507 if (__predict_false(sc->last_rca != 0 && sc->retune_ongoing == 0 && 508 (((retune_req = mmcbr_get_retune_req(busdev)) != retune_req_none && 509 sc->retune_paused == 0) || sc->retune_needed == 1))) { 510 if (__predict_false(mmc_debug > 1)) { 511 device_printf(busdev, 512 "Re-tuning with%s circuit reset required\n", 513 retune_req == retune_req_reset ? "" : "out"); 514 } 515 if (device_get_parent(dev) == busdev) 516 ivar = device_get_ivars(dev); 517 else { 518 for (i = 0; i < sc->child_count; i++) { 519 ivar = device_get_ivars(sc->child_list[i]); 520 if (ivar->rca == sc->last_rca) 521 break; 522 } 523 if (ivar->rca != sc->last_rca) 524 return (EINVAL); 525 } 526 sc->retune_ongoing = 1; 527 err = mmc_retune(busdev, dev, retune_req == retune_req_reset); 528 sc->retune_ongoing = 0; 529 switch (err) { 530 case MMC_ERR_NONE: 531 case MMC_ERR_FAILED: /* Re-tune error but still might work */ 532 break; 533 case MMC_ERR_BADCRC: /* Switch failure on HS400 recovery */ 534 return (ENXIO); 535 case MMC_ERR_INVALID: /* Driver implementation b0rken */ 536 default: /* Unknown error, should not happen */ 537 return (EINVAL); 538 } 539 sc->retune_needed = 0; 540 } 541 return (mmc_wait_for_req(sc, req)); 542 } 543 544 static int 545 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, 546 uint32_t arg, uint32_t flags, uint32_t *resp, int retries) 547 { 548 struct mmc_command cmd; 549 int err; 550 551 memset(&cmd, 0, sizeof(cmd)); 552 cmd.opcode = opcode; 553 cmd.arg = arg; 554 cmd.flags = flags; 555 cmd.data = NULL; 556 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries); 557 if (err) 558 return (err); 559 if (resp) { 560 if (flags & MMC_RSP_136) 561 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t)); 562 else 563 *resp = cmd.resp[0]; 564 } 565 return (0); 566 } 567 568 static void 569 mmc_idle_cards(struct mmc_softc *sc) 570 { 571 device_t dev; 572 struct mmc_command cmd; 573 574 dev = sc->dev; 575 mmcbr_set_chip_select(dev, cs_high); 576 mmcbr_update_ios(dev); 577 mmc_ms_delay(1); 578 579 memset(&cmd, 0, sizeof(cmd)); 580 cmd.opcode = MMC_GO_IDLE_STATE; 581 cmd.arg = 0; 582 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC; 583 cmd.data = NULL; 584 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 585 mmc_ms_delay(1); 586 587 mmcbr_set_chip_select(dev, cs_dontcare); 588 mmcbr_update_ios(dev); 589 mmc_ms_delay(1); 590 } 591 592 static int 593 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 594 { 595 struct mmc_command cmd; 596 int err = MMC_ERR_NONE, i; 597 598 memset(&cmd, 0, sizeof(cmd)); 599 cmd.opcode = ACMD_SD_SEND_OP_COND; 600 cmd.arg = ocr; 601 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 602 cmd.data = NULL; 603 604 for (i = 0; i < 1000; i++) { 605 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd, 606 CMD_RETRIES); 607 if (err != MMC_ERR_NONE) 608 break; 609 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 610 (ocr & MMC_OCR_VOLTAGE) == 0) 611 break; 612 err = MMC_ERR_TIMEOUT; 613 mmc_ms_delay(10); 614 } 615 if (rocr && err == MMC_ERR_NONE) 616 *rocr = cmd.resp[0]; 617 return (err); 618 } 619 620 static int 621 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) 622 { 623 struct mmc_command cmd; 624 int err = MMC_ERR_NONE, i; 625 626 memset(&cmd, 0, sizeof(cmd)); 627 cmd.opcode = MMC_SEND_OP_COND; 628 cmd.arg = ocr; 629 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 630 cmd.data = NULL; 631 632 for (i = 0; i < 1000; i++) { 633 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 634 if (err != MMC_ERR_NONE) 635 break; 636 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || 637 (ocr & MMC_OCR_VOLTAGE) == 0) 638 break; 639 err = MMC_ERR_TIMEOUT; 640 mmc_ms_delay(10); 641 } 642 if (rocr && err == MMC_ERR_NONE) 643 *rocr = cmd.resp[0]; 644 return (err); 645 } 646 647 static int 648 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) 649 { 650 struct mmc_command cmd; 651 int err; 652 653 memset(&cmd, 0, sizeof(cmd)); 654 cmd.opcode = SD_SEND_IF_COND; 655 cmd.arg = (vhs << 8) + 0xAA; 656 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR; 657 cmd.data = NULL; 658 659 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 660 return (err); 661 } 662 663 static void 664 mmc_power_up(struct mmc_softc *sc) 665 { 666 device_t dev; 667 enum mmc_vccq vccq; 668 669 dev = sc->dev; 670 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev))); 671 mmcbr_set_bus_mode(dev, opendrain); 672 mmcbr_set_chip_select(dev, cs_dontcare); 673 mmcbr_set_bus_width(dev, bus_width_1); 674 mmcbr_set_power_mode(dev, power_up); 675 mmcbr_set_clock(dev, 0); 676 mmcbr_update_ios(dev); 677 for (vccq = vccq_330; ; vccq--) { 678 mmcbr_set_vccq(dev, vccq); 679 if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120) 680 break; 681 } 682 mmc_ms_delay(1); 683 684 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 685 mmcbr_set_timing(dev, bus_timing_normal); 686 mmcbr_set_power_mode(dev, power_on); 687 mmcbr_update_ios(dev); 688 mmc_ms_delay(2); 689 } 690 691 static void 692 mmc_power_down(struct mmc_softc *sc) 693 { 694 device_t dev = sc->dev; 695 696 mmcbr_set_bus_mode(dev, opendrain); 697 mmcbr_set_chip_select(dev, cs_dontcare); 698 mmcbr_set_bus_width(dev, bus_width_1); 699 mmcbr_set_power_mode(dev, power_off); 700 mmcbr_set_clock(dev, 0); 701 mmcbr_set_timing(dev, bus_timing_normal); 702 mmcbr_update_ios(dev); 703 } 704 705 static int 706 mmc_select_card(struct mmc_softc *sc, uint16_t rca) 707 { 708 int err, flags; 709 710 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 711 sc->retune_paused++; 712 err = mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16, 713 flags, NULL, CMD_RETRIES); 714 sc->retune_paused--; 715 return (err); 716 } 717 718 static int 719 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value, 720 uint8_t *res) 721 { 722 int err; 723 struct mmc_command cmd; 724 struct mmc_data data; 725 726 memset(&cmd, 0, sizeof(cmd)); 727 memset(&data, 0, sizeof(data)); 728 memset(res, 0, 64); 729 730 cmd.opcode = SD_SWITCH_FUNC; 731 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 732 cmd.arg = mode << 31; /* 0 - check, 1 - set */ 733 cmd.arg |= 0x00FFFFFF; 734 cmd.arg &= ~(0xF << (grp * 4)); 735 cmd.arg |= value << (grp * 4); 736 cmd.data = &data; 737 738 data.data = res; 739 data.len = 64; 740 data.flags = MMC_DATA_READ; 741 742 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 743 return (err); 744 } 745 746 static int 747 mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar, 748 enum mmc_bus_timing timing) 749 { 750 struct mmc_command cmd; 751 int err; 752 uint8_t value; 753 754 if (mmcbr_get_mode(sc->dev) == mode_sd) { 755 memset(&cmd, 0, sizeof(cmd)); 756 cmd.opcode = ACMD_SET_CLR_CARD_DETECT; 757 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 758 cmd.arg = SD_CLR_CARD_DETECT; 759 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 760 CMD_RETRIES); 761 if (err != 0) 762 return (err); 763 memset(&cmd, 0, sizeof(cmd)); 764 cmd.opcode = ACMD_SET_BUS_WIDTH; 765 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 766 switch (ivar->bus_width) { 767 case bus_width_1: 768 cmd.arg = SD_BUS_WIDTH_1; 769 break; 770 case bus_width_4: 771 cmd.arg = SD_BUS_WIDTH_4; 772 break; 773 default: 774 return (MMC_ERR_INVALID); 775 } 776 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd, 777 CMD_RETRIES); 778 } else { 779 switch (ivar->bus_width) { 780 case bus_width_1: 781 if (timing == bus_timing_mmc_hs400 || 782 timing == bus_timing_mmc_hs400es) 783 return (MMC_ERR_INVALID); 784 value = EXT_CSD_BUS_WIDTH_1; 785 break; 786 case bus_width_4: 787 switch (timing) { 788 case bus_timing_mmc_ddr52: 789 value = EXT_CSD_BUS_WIDTH_4_DDR; 790 break; 791 case bus_timing_mmc_hs400: 792 case bus_timing_mmc_hs400es: 793 return (MMC_ERR_INVALID); 794 default: 795 value = EXT_CSD_BUS_WIDTH_4; 796 break; 797 } 798 break; 799 case bus_width_8: 800 value = 0; 801 switch (timing) { 802 case bus_timing_mmc_hs400es: 803 value = EXT_CSD_BUS_WIDTH_ES; 804 /* FALLTHROUGH */ 805 case bus_timing_mmc_ddr52: 806 case bus_timing_mmc_hs400: 807 value |= EXT_CSD_BUS_WIDTH_8_DDR; 808 break; 809 default: 810 value = EXT_CSD_BUS_WIDTH_8; 811 break; 812 } 813 break; 814 default: 815 return (MMC_ERR_INVALID); 816 } 817 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 818 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value, 819 ivar->cmd6_time, true); 820 } 821 return (err); 822 } 823 824 static int 825 mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar) 826 { 827 device_t dev; 828 const uint8_t *ext_csd; 829 uint32_t clock; 830 uint8_t value; 831 832 dev = sc->dev; 833 if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4) 834 return (MMC_ERR_NONE); 835 836 value = 0; 837 ext_csd = ivar->raw_ext_csd; 838 clock = mmcbr_get_clock(dev); 839 switch (1 << mmcbr_get_vdd(dev)) { 840 case MMC_OCR_LOW_VOLTAGE: 841 if (clock <= MMC_TYPE_HS_26_MAX) 842 value = ext_csd[EXT_CSD_PWR_CL_26_195]; 843 else if (clock <= MMC_TYPE_HS_52_MAX) { 844 if (mmcbr_get_timing(dev) >= bus_timing_mmc_ddr52 && 845 ivar->bus_width >= bus_width_4) 846 value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR]; 847 else 848 value = ext_csd[EXT_CSD_PWR_CL_52_195]; 849 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) 850 value = ext_csd[EXT_CSD_PWR_CL_200_195]; 851 break; 852 case MMC_OCR_270_280: 853 case MMC_OCR_280_290: 854 case MMC_OCR_290_300: 855 case MMC_OCR_300_310: 856 case MMC_OCR_310_320: 857 case MMC_OCR_320_330: 858 case MMC_OCR_330_340: 859 case MMC_OCR_340_350: 860 case MMC_OCR_350_360: 861 if (clock <= MMC_TYPE_HS_26_MAX) 862 value = ext_csd[EXT_CSD_PWR_CL_26_360]; 863 else if (clock <= MMC_TYPE_HS_52_MAX) { 864 if (mmcbr_get_timing(dev) == bus_timing_mmc_ddr52 && 865 ivar->bus_width >= bus_width_4) 866 value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR]; 867 else 868 value = ext_csd[EXT_CSD_PWR_CL_52_360]; 869 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) { 870 if (ivar->bus_width == bus_width_8) 871 value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR]; 872 else 873 value = ext_csd[EXT_CSD_PWR_CL_200_360]; 874 } 875 break; 876 default: 877 device_printf(dev, "No power class support for VDD 0x%x\n", 878 1 << mmcbr_get_vdd(dev)); 879 return (MMC_ERR_INVALID); 880 } 881 882 if (ivar->bus_width == bus_width_8) 883 value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >> 884 EXT_CSD_POWER_CLASS_8BIT_SHIFT; 885 else 886 value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >> 887 EXT_CSD_POWER_CLASS_4BIT_SHIFT; 888 889 if (value == 0) 890 return (MMC_ERR_NONE); 891 892 return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL, 893 EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true)); 894 } 895 896 static int 897 mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar, 898 enum mmc_bus_timing timing) 899 { 900 u_char switch_res[64]; 901 uint8_t value; 902 int err; 903 904 if (mmcbr_get_mode(sc->dev) == mode_sd) { 905 switch (timing) { 906 case bus_timing_normal: 907 value = SD_SWITCH_NORMAL_MODE; 908 break; 909 case bus_timing_hs: 910 value = SD_SWITCH_HS_MODE; 911 break; 912 default: 913 return (MMC_ERR_INVALID); 914 } 915 err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, 916 value, switch_res); 917 if (err != MMC_ERR_NONE) 918 return (err); 919 if ((switch_res[16] & 0xf) != value) 920 return (MMC_ERR_FAILED); 921 mmcbr_set_timing(sc->dev, timing); 922 mmcbr_update_ios(sc->dev); 923 } else { 924 switch (timing) { 925 case bus_timing_normal: 926 value = EXT_CSD_HS_TIMING_BC; 927 break; 928 case bus_timing_hs: 929 case bus_timing_mmc_ddr52: 930 value = EXT_CSD_HS_TIMING_HS; 931 break; 932 case bus_timing_mmc_hs200: 933 value = EXT_CSD_HS_TIMING_HS200; 934 break; 935 case bus_timing_mmc_hs400: 936 case bus_timing_mmc_hs400es: 937 value = EXT_CSD_HS_TIMING_HS400; 938 break; 939 default: 940 return (MMC_ERR_INVALID); 941 } 942 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 943 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value, 944 ivar->cmd6_time, false); 945 if (err != MMC_ERR_NONE) 946 return (err); 947 mmcbr_set_timing(sc->dev, timing); 948 mmcbr_update_ios(sc->dev); 949 err = mmc_switch_status(sc->dev, sc->dev, ivar->rca, 950 ivar->cmd6_time); 951 } 952 return (err); 953 } 954 955 static int 956 mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar, 957 enum mmc_bus_timing timing) 958 { 959 960 if (isset(&ivar->vccq_120, timing)) 961 mmcbr_set_vccq(sc->dev, vccq_120); 962 else if (isset(&ivar->vccq_180, timing)) 963 mmcbr_set_vccq(sc->dev, vccq_180); 964 else 965 mmcbr_set_vccq(sc->dev, vccq_330); 966 if (mmcbr_switch_vccq(sc->dev) != 0) 967 return (MMC_ERR_INVALID); 968 else 969 return (MMC_ERR_NONE); 970 } 971 972 static const uint8_t p8[8] = { 973 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 974 }; 975 976 static const uint8_t p8ok[8] = { 977 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 978 }; 979 980 static const uint8_t p4[4] = { 981 0x5A, 0x00, 0x00, 0x00 982 }; 983 984 static const uint8_t p4ok[4] = { 985 0xA5, 0x00, 0x00, 0x00 986 }; 987 988 static int 989 mmc_test_bus_width(struct mmc_softc *sc) 990 { 991 struct mmc_command cmd; 992 struct mmc_data data; 993 uint8_t buf[8]; 994 int err; 995 996 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) { 997 mmcbr_set_bus_width(sc->dev, bus_width_8); 998 mmcbr_update_ios(sc->dev); 999 1000 sc->squelched++; /* Errors are expected, squelch reporting. */ 1001 memset(&cmd, 0, sizeof(cmd)); 1002 memset(&data, 0, sizeof(data)); 1003 cmd.opcode = MMC_BUSTEST_W; 1004 cmd.arg = 0; 1005 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1006 cmd.data = &data; 1007 1008 data.data = __DECONST(void *, p8); 1009 data.len = 8; 1010 data.flags = MMC_DATA_WRITE; 1011 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1012 1013 memset(&cmd, 0, sizeof(cmd)); 1014 memset(&data, 0, sizeof(data)); 1015 cmd.opcode = MMC_BUSTEST_R; 1016 cmd.arg = 0; 1017 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1018 cmd.data = &data; 1019 1020 data.data = buf; 1021 data.len = 8; 1022 data.flags = MMC_DATA_READ; 1023 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1024 sc->squelched--; 1025 1026 mmcbr_set_bus_width(sc->dev, bus_width_1); 1027 mmcbr_update_ios(sc->dev); 1028 1029 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0) 1030 return (bus_width_8); 1031 } 1032 1033 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) { 1034 mmcbr_set_bus_width(sc->dev, bus_width_4); 1035 mmcbr_update_ios(sc->dev); 1036 1037 sc->squelched++; /* Errors are expected, squelch reporting. */ 1038 memset(&cmd, 0, sizeof(cmd)); 1039 memset(&data, 0, sizeof(data)); 1040 cmd.opcode = MMC_BUSTEST_W; 1041 cmd.arg = 0; 1042 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1043 cmd.data = &data; 1044 1045 data.data = __DECONST(void *, p4); 1046 data.len = 4; 1047 data.flags = MMC_DATA_WRITE; 1048 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1049 1050 memset(&cmd, 0, sizeof(cmd)); 1051 memset(&data, 0, sizeof(data)); 1052 cmd.opcode = MMC_BUSTEST_R; 1053 cmd.arg = 0; 1054 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1055 cmd.data = &data; 1056 1057 data.data = buf; 1058 data.len = 4; 1059 data.flags = MMC_DATA_READ; 1060 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0); 1061 sc->squelched--; 1062 1063 mmcbr_set_bus_width(sc->dev, bus_width_1); 1064 mmcbr_update_ios(sc->dev); 1065 1066 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0) 1067 return (bus_width_4); 1068 } 1069 return (bus_width_1); 1070 } 1071 1072 static uint32_t 1073 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 1074 { 1075 const int i = (bit_len / 32) - (start / 32) - 1; 1076 const int shift = start & 31; 1077 uint32_t retval = bits[i] >> shift; 1078 1079 if (size + shift > 32) 1080 retval |= bits[i - 1] << (32 - shift); 1081 return (retval & ((1llu << size) - 1)); 1082 } 1083 1084 static void 1085 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 1086 { 1087 int i; 1088 1089 /* There's no version info, so we take it on faith */ 1090 memset(cid, 0, sizeof(*cid)); 1091 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 1092 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 1093 for (i = 0; i < 5; i++) 1094 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 1095 cid->pnm[5] = 0; 1096 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 1097 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 1098 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000; 1099 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 1100 } 1101 1102 static void 1103 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p) 1104 { 1105 int i; 1106 1107 /* There's no version info, so we take it on faith */ 1108 memset(cid, 0, sizeof(*cid)); 1109 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 1110 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 1111 for (i = 0; i < 6; i++) 1112 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 1113 cid->pnm[6] = 0; 1114 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 1115 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 1116 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 1117 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4); 1118 if (is_4_41p) 1119 cid->mdt_year += 2013; 1120 else 1121 cid->mdt_year += 1997; 1122 } 1123 1124 static void 1125 mmc_format_card_id_string(struct mmc_ivars *ivar) 1126 { 1127 char oidstr[8]; 1128 uint8_t c1; 1129 uint8_t c2; 1130 1131 /* 1132 * Format a card ID string for use by the mmcsd driver, it's what 1133 * appears between the <> in the following: 1134 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 MFG 08/2008 by 3 TN> at mmc0 1135 * 22.5MHz/4bit/128-block 1136 * 1137 * Also format just the card serial number, which the mmcsd driver will 1138 * use as the disk->d_ident string. 1139 * 1140 * The card_id_string in mmc_ivars is currently allocated as 64 bytes, 1141 * and our max formatted length is currently 55 bytes if every field 1142 * contains the largest value. 1143 * 1144 * Sometimes the oid is two printable ascii chars; when it's not, 1145 * format it as 0xnnnn instead. 1146 */ 1147 c1 = (ivar->cid.oid >> 8) & 0x0ff; 1148 c2 = ivar->cid.oid & 0x0ff; 1149 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f) 1150 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2); 1151 else 1152 snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid); 1153 snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string), 1154 "%08X", ivar->cid.psn); 1155 snprintf(ivar->card_id_string, sizeof(ivar->card_id_string), 1156 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s", 1157 ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "", 1158 ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f, 1159 ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year, 1160 ivar->cid.mid, oidstr); 1161 } 1162 1163 static const int exp[8] = { 1164 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 1165 }; 1166 1167 static const int mant[16] = { 1168 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 1169 }; 1170 1171 static const int cur_min[8] = { 1172 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 1173 }; 1174 1175 static const int cur_max[8] = { 1176 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 1177 }; 1178 1179 static int 1180 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 1181 { 1182 int v; 1183 int m; 1184 int e; 1185 1186 memset(csd, 0, sizeof(*csd)); 1187 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 1188 if (v == 0) { 1189 m = mmc_get_bits(raw_csd, 128, 115, 4); 1190 e = mmc_get_bits(raw_csd, 128, 112, 3); 1191 csd->tacc = (exp[e] * mant[m] + 9) / 10; 1192 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1193 m = mmc_get_bits(raw_csd, 128, 99, 4); 1194 e = mmc_get_bits(raw_csd, 128, 96, 3); 1195 csd->tran_speed = exp[e] * 10000 * mant[m]; 1196 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1197 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1198 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1199 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1200 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1201 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1202 csd->vdd_r_curr_min = 1203 cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1204 csd->vdd_r_curr_max = 1205 cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1206 csd->vdd_w_curr_min = 1207 cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1208 csd->vdd_w_curr_max = 1209 cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1210 m = mmc_get_bits(raw_csd, 128, 62, 12); 1211 e = mmc_get_bits(raw_csd, 128, 47, 3); 1212 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1213 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1214 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1215 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1216 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1217 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1218 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1219 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1220 return (MMC_ERR_NONE); 1221 } else if (v == 1) { 1222 m = mmc_get_bits(raw_csd, 128, 115, 4); 1223 e = mmc_get_bits(raw_csd, 128, 112, 3); 1224 csd->tacc = (exp[e] * mant[m] + 9) / 10; 1225 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1226 m = mmc_get_bits(raw_csd, 128, 99, 4); 1227 e = mmc_get_bits(raw_csd, 128, 96, 3); 1228 csd->tran_speed = exp[e] * 10000 * mant[m]; 1229 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1230 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1231 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1232 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1233 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1234 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1235 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1236 1) * 512 * 1024; 1237 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 1238 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 1239 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 1240 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1241 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1242 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1243 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1244 return (MMC_ERR_NONE); 1245 } 1246 return (MMC_ERR_INVALID); 1247 } 1248 1249 static void 1250 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 1251 { 1252 int m; 1253 int e; 1254 1255 memset(csd, 0, sizeof(*csd)); 1256 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 1257 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 1258 m = mmc_get_bits(raw_csd, 128, 115, 4); 1259 e = mmc_get_bits(raw_csd, 128, 112, 3); 1260 csd->tacc = exp[e] * mant[m] + 9 / 10; 1261 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 1262 m = mmc_get_bits(raw_csd, 128, 99, 4); 1263 e = mmc_get_bits(raw_csd, 128, 96, 3); 1264 csd->tran_speed = exp[e] * 10000 * mant[m]; 1265 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 1266 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 1267 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 1268 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 1269 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 1270 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 1271 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 1272 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 1273 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 1274 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 1275 m = mmc_get_bits(raw_csd, 128, 62, 12); 1276 e = mmc_get_bits(raw_csd, 128, 47, 3); 1277 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 1278 csd->erase_blk_en = 0; 1279 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 1280 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 1281 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 1282 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 1283 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 1284 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 1285 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 1286 } 1287 1288 static void 1289 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 1290 { 1291 unsigned int scr_struct; 1292 1293 memset(scr, 0, sizeof(*scr)); 1294 1295 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 1296 if (scr_struct != 0) { 1297 printf("Unrecognised SCR structure version %d\n", 1298 scr_struct); 1299 return; 1300 } 1301 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 1302 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 1303 } 1304 1305 static void 1306 mmc_app_decode_sd_status(uint32_t *raw_sd_status, 1307 struct mmc_sd_status *sd_status) 1308 { 1309 1310 memset(sd_status, 0, sizeof(*sd_status)); 1311 1312 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2); 1313 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1); 1314 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16); 1315 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12); 1316 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8); 1317 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8); 1318 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4); 1319 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16); 1320 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6); 1321 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); 1322 } 1323 1324 static int 1325 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) 1326 { 1327 struct mmc_command cmd; 1328 int err; 1329 1330 memset(&cmd, 0, sizeof(cmd)); 1331 cmd.opcode = MMC_ALL_SEND_CID; 1332 cmd.arg = 0; 1333 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1334 cmd.data = NULL; 1335 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1336 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t)); 1337 return (err); 1338 } 1339 1340 static int 1341 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd) 1342 { 1343 struct mmc_command cmd; 1344 int err; 1345 1346 memset(&cmd, 0, sizeof(cmd)); 1347 cmd.opcode = MMC_SEND_CSD; 1348 cmd.arg = rca << 16; 1349 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 1350 cmd.data = NULL; 1351 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1352 memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t)); 1353 return (err); 1354 } 1355 1356 static int 1357 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr) 1358 { 1359 int err; 1360 struct mmc_command cmd; 1361 struct mmc_data data; 1362 1363 memset(&cmd, 0, sizeof(cmd)); 1364 memset(&data, 0, sizeof(data)); 1365 1366 memset(rawscr, 0, 8); 1367 cmd.opcode = ACMD_SEND_SCR; 1368 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1369 cmd.arg = 0; 1370 cmd.data = &data; 1371 1372 data.data = rawscr; 1373 data.len = 8; 1374 data.flags = MMC_DATA_READ; 1375 1376 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1377 rawscr[0] = be32toh(rawscr[0]); 1378 rawscr[1] = be32toh(rawscr[1]); 1379 return (err); 1380 } 1381 1382 static int 1383 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus) 1384 { 1385 struct mmc_command cmd; 1386 struct mmc_data data; 1387 int err, i; 1388 1389 memset(&cmd, 0, sizeof(cmd)); 1390 memset(&data, 0, sizeof(data)); 1391 1392 memset(rawsdstatus, 0, 64); 1393 cmd.opcode = ACMD_SD_STATUS; 1394 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1395 cmd.arg = 0; 1396 cmd.data = &data; 1397 1398 data.data = rawsdstatus; 1399 data.len = 64; 1400 data.flags = MMC_DATA_READ; 1401 1402 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES); 1403 for (i = 0; i < 16; i++) 1404 rawsdstatus[i] = be32toh(rawsdstatus[i]); 1405 return (err); 1406 } 1407 1408 static int 1409 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) 1410 { 1411 struct mmc_command cmd; 1412 int err; 1413 1414 memset(&cmd, 0, sizeof(cmd)); 1415 cmd.opcode = MMC_SET_RELATIVE_ADDR; 1416 cmd.arg = resp << 16; 1417 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1418 cmd.data = NULL; 1419 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1420 return (err); 1421 } 1422 1423 static int 1424 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) 1425 { 1426 struct mmc_command cmd; 1427 int err; 1428 1429 memset(&cmd, 0, sizeof(cmd)); 1430 cmd.opcode = SD_SEND_RELATIVE_ADDR; 1431 cmd.arg = 0; 1432 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 1433 cmd.data = NULL; 1434 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1435 *resp = cmd.resp[0]; 1436 return (err); 1437 } 1438 1439 static int 1440 mmc_set_blocklen(struct mmc_softc *sc, uint32_t len) 1441 { 1442 struct mmc_command cmd; 1443 int err; 1444 1445 memset(&cmd, 0, sizeof(cmd)); 1446 cmd.opcode = MMC_SET_BLOCKLEN; 1447 cmd.arg = len; 1448 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1449 cmd.data = NULL; 1450 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES); 1451 return (err); 1452 } 1453 1454 static uint32_t 1455 mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing) 1456 { 1457 1458 switch (timing) { 1459 case bus_timing_normal: 1460 return (ivar->tran_speed); 1461 case bus_timing_hs: 1462 return (ivar->hs_tran_speed); 1463 case bus_timing_uhs_sdr12: 1464 return (SD_SDR12_MAX); 1465 case bus_timing_uhs_sdr25: 1466 return (SD_SDR25_MAX); 1467 case bus_timing_uhs_ddr50: 1468 return (SD_DDR50_MAX); 1469 case bus_timing_uhs_sdr50: 1470 return (SD_SDR50_MAX); 1471 case bus_timing_uhs_sdr104: 1472 return (SD_SDR104_MAX); 1473 case bus_timing_mmc_ddr52: 1474 return (MMC_TYPE_DDR52_MAX); 1475 case bus_timing_mmc_hs200: 1476 case bus_timing_mmc_hs400: 1477 case bus_timing_mmc_hs400es: 1478 return (MMC_TYPE_HS200_HS400ES_MAX); 1479 } 1480 return (0); 1481 } 1482 1483 static const char * 1484 mmc_timing_to_string(enum mmc_bus_timing timing) 1485 { 1486 1487 switch (timing) { 1488 case bus_timing_normal: 1489 return ("normal speed"); 1490 case bus_timing_hs: 1491 return ("high speed"); 1492 case bus_timing_uhs_sdr12: 1493 case bus_timing_uhs_sdr25: 1494 case bus_timing_uhs_sdr50: 1495 case bus_timing_uhs_sdr104: 1496 return ("single data rate"); 1497 case bus_timing_uhs_ddr50: 1498 case bus_timing_mmc_ddr52: 1499 return ("dual data rate"); 1500 case bus_timing_mmc_hs200: 1501 return ("HS200"); 1502 case bus_timing_mmc_hs400: 1503 return ("HS400"); 1504 case bus_timing_mmc_hs400es: 1505 return ("HS400 with enhanced strobe"); 1506 } 1507 return (""); 1508 } 1509 1510 static bool 1511 mmc_host_timing(device_t dev, enum mmc_bus_timing timing) 1512 { 1513 int host_caps; 1514 1515 host_caps = mmcbr_get_caps(dev); 1516 1517 #define HOST_TIMING_CAP(host_caps, cap) ({ \ 1518 bool retval; \ 1519 if (((host_caps) & (cap)) == (cap)) \ 1520 retval = true; \ 1521 else \ 1522 retval = false; \ 1523 retval; \ 1524 }) 1525 1526 switch (timing) { 1527 case bus_timing_normal: 1528 return (true); 1529 case bus_timing_hs: 1530 return (HOST_TIMING_CAP(host_caps, MMC_CAP_HSPEED)); 1531 case bus_timing_uhs_sdr12: 1532 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR12)); 1533 case bus_timing_uhs_sdr25: 1534 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR25)); 1535 case bus_timing_uhs_ddr50: 1536 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_DDR50)); 1537 case bus_timing_uhs_sdr50: 1538 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR50)); 1539 case bus_timing_uhs_sdr104: 1540 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR104)); 1541 case bus_timing_mmc_ddr52: 1542 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_DDR52)); 1543 case bus_timing_mmc_hs200: 1544 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS200)); 1545 case bus_timing_mmc_hs400: 1546 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400)); 1547 case bus_timing_mmc_hs400es: 1548 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400 | 1549 MMC_CAP_MMC_ENH_STROBE)); 1550 } 1551 1552 #undef HOST_TIMING_CAP 1553 1554 return (false); 1555 } 1556 1557 static void 1558 mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard) 1559 { 1560 enum mmc_bus_timing max_timing, timing; 1561 1562 device_printf(dev, "Card at relative address 0x%04x%s:\n", 1563 ivar->rca, newcard ? " added" : ""); 1564 device_printf(dev, " card: %s\n", ivar->card_id_string); 1565 max_timing = bus_timing_normal; 1566 for (timing = bus_timing_max; timing > bus_timing_normal; timing--) { 1567 if (isset(&ivar->timings, timing)) { 1568 max_timing = timing; 1569 break; 1570 } 1571 } 1572 device_printf(dev, " quirks: %b\n", ivar->quirks, MMC_QUIRKS_FMT); 1573 device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n", 1574 (ivar->bus_width == bus_width_1 ? 1 : 1575 (ivar->bus_width == bus_width_4 ? 4 : 8)), 1576 mmc_timing_to_dtr(ivar, timing) / 1000000, 1577 mmc_timing_to_string(timing)); 1578 device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n", 1579 ivar->sec_count, ivar->erase_sector, 1580 ivar->read_only ? ", read-only" : ""); 1581 } 1582 1583 static void 1584 mmc_discover_cards(struct mmc_softc *sc) 1585 { 1586 u_char switch_res[64]; 1587 uint32_t raw_cid[4]; 1588 struct mmc_ivars *ivar = NULL; 1589 const struct mmc_quirk *quirk; 1590 device_t child; 1591 int err, host_caps, i, newcard; 1592 uint32_t resp, sec_count, status; 1593 uint16_t rca = 2; 1594 1595 host_caps = mmcbr_get_caps(sc->dev); 1596 if (bootverbose || mmc_debug) 1597 device_printf(sc->dev, "Probing cards\n"); 1598 while (1) { 1599 child = NULL; 1600 sc->squelched++; /* Errors are expected, squelch reporting. */ 1601 err = mmc_all_send_cid(sc, raw_cid); 1602 sc->squelched--; 1603 if (err == MMC_ERR_TIMEOUT) 1604 break; 1605 if (err != MMC_ERR_NONE) { 1606 device_printf(sc->dev, "Error reading CID %d\n", err); 1607 break; 1608 } 1609 newcard = 1; 1610 for (i = 0; i < sc->child_count; i++) { 1611 ivar = device_get_ivars(sc->child_list[i]); 1612 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) == 1613 0) { 1614 newcard = 0; 1615 break; 1616 } 1617 } 1618 if (bootverbose || mmc_debug) { 1619 device_printf(sc->dev, 1620 "%sard detected (CID %08x%08x%08x%08x)\n", 1621 newcard ? "New c" : "C", 1622 raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]); 1623 } 1624 if (newcard) { 1625 ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF, 1626 M_WAITOK | M_ZERO); 1627 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid)); 1628 } 1629 if (mmcbr_get_ro(sc->dev)) 1630 ivar->read_only = 1; 1631 ivar->bus_width = bus_width_1; 1632 setbit(&ivar->timings, bus_timing_normal); 1633 ivar->mode = mmcbr_get_mode(sc->dev); 1634 if (ivar->mode == mode_sd) { 1635 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid); 1636 err = mmc_send_relative_addr(sc, &resp); 1637 if (err != MMC_ERR_NONE) { 1638 device_printf(sc->dev, 1639 "Error getting RCA %d\n", err); 1640 goto free_ivar; 1641 } 1642 ivar->rca = resp >> 16; 1643 /* Get card CSD. */ 1644 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1645 if (err != MMC_ERR_NONE) { 1646 device_printf(sc->dev, 1647 "Error getting CSD %d\n", err); 1648 goto free_ivar; 1649 } 1650 if (bootverbose || mmc_debug) 1651 device_printf(sc->dev, 1652 "%sard detected (CSD %08x%08x%08x%08x)\n", 1653 newcard ? "New c" : "C", ivar->raw_csd[0], 1654 ivar->raw_csd[1], ivar->raw_csd[2], 1655 ivar->raw_csd[3]); 1656 err = mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd); 1657 if (err != MMC_ERR_NONE) { 1658 device_printf(sc->dev, "Error decoding CSD\n"); 1659 goto free_ivar; 1660 } 1661 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1662 if (ivar->csd.csd_structure > 0) 1663 ivar->high_cap = 1; 1664 ivar->tran_speed = ivar->csd.tran_speed; 1665 ivar->erase_sector = ivar->csd.erase_sector * 1666 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1667 1668 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, 1669 &status); 1670 if (err != MMC_ERR_NONE) { 1671 device_printf(sc->dev, 1672 "Error reading card status %d\n", err); 1673 goto free_ivar; 1674 } 1675 if ((status & R1_CARD_IS_LOCKED) != 0) { 1676 device_printf(sc->dev, 1677 "Card is password protected, skipping\n"); 1678 goto free_ivar; 1679 } 1680 1681 /* Get card SCR. Card must be selected to fetch it. */ 1682 err = mmc_select_card(sc, ivar->rca); 1683 if (err != MMC_ERR_NONE) { 1684 device_printf(sc->dev, 1685 "Error selecting card %d\n", err); 1686 goto free_ivar; 1687 } 1688 err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr); 1689 if (err != MMC_ERR_NONE) { 1690 device_printf(sc->dev, 1691 "Error reading SCR %d\n", err); 1692 goto free_ivar; 1693 } 1694 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr); 1695 /* Get card switch capabilities (command class 10). */ 1696 if ((ivar->scr.sda_vsn >= 1) && 1697 (ivar->csd.ccc & (1 << 10))) { 1698 err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK, 1699 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, 1700 switch_res); 1701 if (err == MMC_ERR_NONE && 1702 switch_res[13] & (1 << SD_SWITCH_HS_MODE)) { 1703 setbit(&ivar->timings, bus_timing_hs); 1704 ivar->hs_tran_speed = SD_HS_MAX; 1705 } 1706 } 1707 1708 /* 1709 * We deselect then reselect the card here. Some cards 1710 * become unselected and timeout with the above two 1711 * commands, although the state tables / diagrams in the 1712 * standard suggest they go back to the transfer state. 1713 * Other cards don't become deselected, and if we 1714 * attempt to blindly re-select them, we get timeout 1715 * errors from some controllers. So we deselect then 1716 * reselect to handle all situations. The only thing we 1717 * use from the sd_status is the erase sector size, but 1718 * it is still nice to get that right. 1719 */ 1720 (void)mmc_select_card(sc, 0); 1721 (void)mmc_select_card(sc, ivar->rca); 1722 (void)mmc_app_sd_status(sc, ivar->rca, 1723 ivar->raw_sd_status); 1724 mmc_app_decode_sd_status(ivar->raw_sd_status, 1725 &ivar->sd_status); 1726 if (ivar->sd_status.au_size != 0) { 1727 ivar->erase_sector = 1728 16 << ivar->sd_status.au_size; 1729 } 1730 /* Find maximum supported bus width. */ 1731 if ((host_caps & MMC_CAP_4_BIT_DATA) && 1732 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) 1733 ivar->bus_width = bus_width_4; 1734 1735 goto child_common; 1736 } 1737 ivar->rca = rca++; 1738 err = mmc_set_relative_addr(sc, ivar->rca); 1739 if (err != MMC_ERR_NONE) { 1740 device_printf(sc->dev, "Error setting RCA %d\n", err); 1741 goto free_ivar; 1742 } 1743 /* Get card CSD. */ 1744 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd); 1745 if (err != MMC_ERR_NONE) { 1746 device_printf(sc->dev, "Error getting CSD %d\n", err); 1747 goto free_ivar; 1748 } 1749 if (bootverbose || mmc_debug) 1750 device_printf(sc->dev, 1751 "%sard detected (CSD %08x%08x%08x%08x)\n", 1752 newcard ? "New c" : "C", ivar->raw_csd[0], 1753 ivar->raw_csd[1], ivar->raw_csd[2], 1754 ivar->raw_csd[3]); 1755 1756 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd); 1757 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE; 1758 ivar->tran_speed = ivar->csd.tran_speed; 1759 ivar->erase_sector = ivar->csd.erase_sector * 1760 ivar->csd.write_bl_len / MMC_SECTOR_SIZE; 1761 1762 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status); 1763 if (err != MMC_ERR_NONE) { 1764 device_printf(sc->dev, 1765 "Error reading card status %d\n", err); 1766 goto free_ivar; 1767 } 1768 if ((status & R1_CARD_IS_LOCKED) != 0) { 1769 device_printf(sc->dev, 1770 "Card is password protected, skipping\n"); 1771 goto free_ivar; 1772 } 1773 1774 err = mmc_select_card(sc, ivar->rca); 1775 if (err != MMC_ERR_NONE) { 1776 device_printf(sc->dev, "Error selecting card %d\n", 1777 err); 1778 goto free_ivar; 1779 } 1780 1781 /* Only MMC >= 4.x devices support EXT_CSD. */ 1782 if (ivar->csd.spec_vers >= 4) { 1783 err = mmc_send_ext_csd(sc->dev, sc->dev, 1784 ivar->raw_ext_csd); 1785 if (err != MMC_ERR_NONE) { 1786 device_printf(sc->dev, 1787 "Error reading EXT_CSD %d\n", err); 1788 goto free_ivar; 1789 } 1790 /* Handle extended capacity from EXT_CSD */ 1791 sec_count = ivar->raw_ext_csd[EXT_CSD_SEC_CNT] + 1792 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) + 1793 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) + 1794 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1795 if (sec_count != 0) { 1796 ivar->sec_count = sec_count; 1797 ivar->high_cap = 1; 1798 } 1799 /* Find maximum supported bus width. */ 1800 ivar->bus_width = mmc_test_bus_width(sc); 1801 /* Get device speeds beyond normal mode. */ 1802 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1803 EXT_CSD_CARD_TYPE_HS_52) != 0) { 1804 setbit(&ivar->timings, bus_timing_hs); 1805 ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX; 1806 } else if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1807 EXT_CSD_CARD_TYPE_HS_26) != 0) { 1808 setbit(&ivar->timings, bus_timing_hs); 1809 ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX; 1810 } 1811 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1812 EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 && 1813 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1814 setbit(&ivar->timings, bus_timing_mmc_ddr52); 1815 setbit(&ivar->vccq_120, bus_timing_mmc_ddr52); 1816 } 1817 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1818 EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 && 1819 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1820 setbit(&ivar->timings, bus_timing_mmc_ddr52); 1821 setbit(&ivar->vccq_180, bus_timing_mmc_ddr52); 1822 } 1823 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1824 EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 && 1825 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1826 setbit(&ivar->timings, bus_timing_mmc_hs200); 1827 setbit(&ivar->vccq_120, bus_timing_mmc_hs200); 1828 } 1829 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1830 EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 && 1831 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1832 setbit(&ivar->timings, bus_timing_mmc_hs200); 1833 setbit(&ivar->vccq_180, bus_timing_mmc_hs200); 1834 } 1835 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1836 EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 && 1837 (host_caps & MMC_CAP_SIGNALING_120) != 0 && 1838 ivar->bus_width == bus_width_8) { 1839 setbit(&ivar->timings, bus_timing_mmc_hs400); 1840 setbit(&ivar->vccq_120, bus_timing_mmc_hs400); 1841 } 1842 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1843 EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 && 1844 (host_caps & MMC_CAP_SIGNALING_180) != 0 && 1845 ivar->bus_width == bus_width_8) { 1846 setbit(&ivar->timings, bus_timing_mmc_hs400); 1847 setbit(&ivar->vccq_180, bus_timing_mmc_hs400); 1848 } 1849 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1850 EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 && 1851 (ivar->raw_ext_csd[EXT_CSD_STROBE_SUPPORT] & 1852 EXT_CSD_STROBE_SUPPORT_EN) != 0 && 1853 (host_caps & MMC_CAP_SIGNALING_120) != 0 && 1854 ivar->bus_width == bus_width_8) { 1855 setbit(&ivar->timings, bus_timing_mmc_hs400es); 1856 setbit(&ivar->vccq_120, bus_timing_mmc_hs400es); 1857 } 1858 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] & 1859 EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 && 1860 (ivar->raw_ext_csd[EXT_CSD_STROBE_SUPPORT] & 1861 EXT_CSD_STROBE_SUPPORT_EN) != 0 && 1862 (host_caps & MMC_CAP_SIGNALING_180) != 0 && 1863 ivar->bus_width == bus_width_8) { 1864 setbit(&ivar->timings, bus_timing_mmc_hs400es); 1865 setbit(&ivar->vccq_180, bus_timing_mmc_hs400es); 1866 } 1867 /* 1868 * Determine generic switch timeout (provided in 1869 * units of 10 ms), defaulting to 500 ms. 1870 */ 1871 ivar->cmd6_time = 500 * 1000; 1872 if (ivar->csd.spec_vers >= 6) 1873 ivar->cmd6_time = 10 * 1874 ivar->raw_ext_csd[EXT_CSD_GEN_CMD6_TIME]; 1875 /* Handle HC erase sector size. */ 1876 if (ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) { 1877 ivar->erase_sector = 1024 * 1878 ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE]; 1879 err = mmc_switch(sc->dev, sc->dev, ivar->rca, 1880 EXT_CSD_CMD_SET_NORMAL, 1881 EXT_CSD_ERASE_GRP_DEF, 1882 EXT_CSD_ERASE_GRP_DEF_EN, 1883 ivar->cmd6_time, true); 1884 if (err != MMC_ERR_NONE) { 1885 device_printf(sc->dev, 1886 "Error setting erase group %d\n", 1887 err); 1888 goto free_ivar; 1889 } 1890 } 1891 } 1892 1893 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid, 1894 ivar->raw_ext_csd[EXT_CSD_REV] >= 5); 1895 1896 child_common: 1897 for (quirk = &mmc_quirks[0]; quirk->mid != 0x0; quirk++) { 1898 if ((quirk->mid == MMC_QUIRK_MID_ANY || 1899 quirk->mid == ivar->cid.mid) && 1900 (quirk->oid == MMC_QUIRK_OID_ANY || 1901 quirk->oid == ivar->cid.oid) && 1902 strncmp(quirk->pnm, ivar->cid.pnm, 1903 sizeof(ivar->cid.pnm)) == 0) { 1904 ivar->quirks = quirk->quirks; 1905 break; 1906 } 1907 } 1908 1909 /* 1910 * Some cards that report maximum I/O block sizes greater 1911 * than 512 require the block length to be set to 512, even 1912 * though that is supposed to be the default. Example: 1913 * 1914 * Transcend 2GB SDSC card, CID: 1915 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000 1916 */ 1917 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE || 1918 ivar->csd.write_bl_len != MMC_SECTOR_SIZE) 1919 mmc_set_blocklen(sc, MMC_SECTOR_SIZE); 1920 1921 mmc_format_card_id_string(ivar); 1922 1923 if (bootverbose || mmc_debug) 1924 mmc_log_card(sc->dev, ivar, newcard); 1925 if (newcard) { 1926 /* Add device. */ 1927 child = device_add_child(sc->dev, NULL, -1); 1928 if (child != NULL) { 1929 device_set_ivars(child, ivar); 1930 sc->child_list = realloc(sc->child_list, 1931 sizeof(device_t) * sc->child_count + 1, 1932 M_DEVBUF, M_WAITOK); 1933 sc->child_list[sc->child_count++] = child; 1934 } else 1935 device_printf(sc->dev, "Error adding child\n"); 1936 } 1937 1938 free_ivar: 1939 if (newcard && child == NULL) 1940 free(ivar, M_DEVBUF); 1941 (void)mmc_select_card(sc, 0); 1942 /* 1943 * Not returning here when one MMC device could no be added 1944 * potentially would mean looping forever when that device 1945 * is broken (in which case it also may impact the remainder 1946 * of the bus anyway, though). 1947 */ 1948 if ((newcard && child == NULL) || 1949 mmcbr_get_mode(sc->dev) == mode_sd) 1950 return; 1951 } 1952 } 1953 1954 static void 1955 mmc_update_child_list(struct mmc_softc *sc) 1956 { 1957 device_t child; 1958 int i, j; 1959 1960 if (sc->child_count == 0) { 1961 free(sc->child_list, M_DEVBUF); 1962 return; 1963 } 1964 for (i = j = 0; i < sc->child_count; i++) { 1965 for (;;) { 1966 child = sc->child_list[j++]; 1967 if (child != NULL) 1968 break; 1969 } 1970 if (i != j) 1971 sc->child_list[i] = child; 1972 } 1973 sc->child_list = realloc(sc->child_list, sizeof(device_t) * 1974 sc->child_count, M_DEVBUF, M_WAITOK); 1975 } 1976 1977 static void 1978 mmc_rescan_cards(struct mmc_softc *sc) 1979 { 1980 struct mmc_ivars *ivar; 1981 int err, i, j; 1982 1983 for (i = j = 0; i < sc->child_count; i++) { 1984 ivar = device_get_ivars(sc->child_list[i]); 1985 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) { 1986 if (bootverbose || mmc_debug) 1987 device_printf(sc->dev, 1988 "Card at relative address %d lost\n", 1989 ivar->rca); 1990 err = device_delete_child(sc->dev, sc->child_list[i]); 1991 if (err != 0) { 1992 j++; 1993 continue; 1994 } 1995 free(ivar, M_DEVBUF); 1996 } else 1997 j++; 1998 } 1999 if (sc->child_count == j) 2000 goto out; 2001 sc->child_count = j; 2002 mmc_update_child_list(sc); 2003 out: 2004 (void)mmc_select_card(sc, 0); 2005 } 2006 2007 static int 2008 mmc_delete_cards(struct mmc_softc *sc, bool final) 2009 { 2010 struct mmc_ivars *ivar; 2011 int err, i, j; 2012 2013 err = 0; 2014 for (i = j = 0; i < sc->child_count; i++) { 2015 ivar = device_get_ivars(sc->child_list[i]); 2016 if (bootverbose || mmc_debug) 2017 device_printf(sc->dev, 2018 "Card at relative address %d deleted\n", 2019 ivar->rca); 2020 err = device_delete_child(sc->dev, sc->child_list[i]); 2021 if (err != 0) { 2022 j++; 2023 if (final == false) 2024 continue; 2025 else 2026 break; 2027 } 2028 free(ivar, M_DEVBUF); 2029 } 2030 sc->child_count = j; 2031 mmc_update_child_list(sc); 2032 return (err); 2033 } 2034 2035 static void 2036 mmc_go_discovery(struct mmc_softc *sc) 2037 { 2038 uint32_t ocr; 2039 device_t dev; 2040 int err; 2041 2042 dev = sc->dev; 2043 if (mmcbr_get_power_mode(dev) != power_on) { 2044 /* 2045 * First, try SD modes 2046 */ 2047 sc->squelched++; /* Errors are expected, squelch reporting. */ 2048 mmcbr_set_mode(dev, mode_sd); 2049 mmc_power_up(sc); 2050 mmcbr_set_bus_mode(dev, pushpull); 2051 if (bootverbose || mmc_debug) 2052 device_printf(sc->dev, "Probing bus\n"); 2053 mmc_idle_cards(sc); 2054 err = mmc_send_if_cond(sc, 1); 2055 if ((bootverbose || mmc_debug) && err == 0) 2056 device_printf(sc->dev, 2057 "SD 2.0 interface conditions: OK\n"); 2058 if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 2059 if (bootverbose || mmc_debug) 2060 device_printf(sc->dev, "SD probe: failed\n"); 2061 /* 2062 * Failed, try MMC 2063 */ 2064 mmcbr_set_mode(dev, mode_mmc); 2065 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { 2066 if (bootverbose || mmc_debug) 2067 device_printf(sc->dev, 2068 "MMC probe: failed\n"); 2069 ocr = 0; /* Failed both, powerdown. */ 2070 } else if (bootverbose || mmc_debug) 2071 device_printf(sc->dev, 2072 "MMC probe: OK (OCR: 0x%08x)\n", ocr); 2073 } else if (bootverbose || mmc_debug) 2074 device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n", 2075 ocr); 2076 sc->squelched--; 2077 2078 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr)); 2079 if (mmcbr_get_ocr(dev) != 0) 2080 mmc_idle_cards(sc); 2081 } else { 2082 mmcbr_set_bus_mode(dev, opendrain); 2083 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY); 2084 mmcbr_update_ios(dev); 2085 /* XXX recompute vdd based on new cards? */ 2086 } 2087 /* 2088 * Make sure that we have a mutually agreeable voltage to at least 2089 * one card on the bus. 2090 */ 2091 if (bootverbose || mmc_debug) 2092 device_printf(sc->dev, "Current OCR: 0x%08x\n", 2093 mmcbr_get_ocr(dev)); 2094 if (mmcbr_get_ocr(dev) == 0) { 2095 device_printf(sc->dev, "No compatible cards found on bus\n"); 2096 (void)mmc_delete_cards(sc, false); 2097 mmc_power_down(sc); 2098 return; 2099 } 2100 /* 2101 * Reselect the cards after we've idled them above. 2102 */ 2103 if (mmcbr_get_mode(dev) == mode_sd) { 2104 err = mmc_send_if_cond(sc, 1); 2105 mmc_send_app_op_cond(sc, 2106 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); 2107 } else 2108 mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL); 2109 mmc_discover_cards(sc); 2110 mmc_rescan_cards(sc); 2111 2112 mmcbr_set_bus_mode(dev, pushpull); 2113 mmcbr_update_ios(dev); 2114 mmc_calculate_clock(sc); 2115 } 2116 2117 static int 2118 mmc_calculate_clock(struct mmc_softc *sc) 2119 { 2120 device_t dev; 2121 struct mmc_ivars *ivar; 2122 int i; 2123 uint32_t dtr, max_dtr; 2124 uint16_t rca; 2125 enum mmc_bus_timing max_timing, timing; 2126 bool changed, hs400; 2127 2128 dev = sc->dev; 2129 max_dtr = mmcbr_get_f_max(dev); 2130 max_timing = bus_timing_max; 2131 do { 2132 changed = false; 2133 for (i = 0; i < sc->child_count; i++) { 2134 ivar = device_get_ivars(sc->child_list[i]); 2135 if (isclr(&ivar->timings, max_timing) || 2136 !mmc_host_timing(dev, max_timing)) { 2137 for (timing = max_timing - 1; timing >= 2138 bus_timing_normal; timing--) { 2139 if (isset(&ivar->timings, timing) && 2140 mmc_host_timing(dev, timing)) { 2141 max_timing = timing; 2142 break; 2143 } 2144 } 2145 changed = true; 2146 } 2147 dtr = mmc_timing_to_dtr(ivar, max_timing); 2148 if (dtr < max_dtr) { 2149 max_dtr = dtr; 2150 changed = true; 2151 } 2152 } 2153 } while (changed == true); 2154 2155 if (bootverbose || mmc_debug) { 2156 device_printf(dev, 2157 "setting transfer rate to %d.%03dMHz (%s timing)\n", 2158 max_dtr / 1000000, (max_dtr / 1000) % 1000, 2159 mmc_timing_to_string(max_timing)); 2160 } 2161 2162 /* 2163 * HS400 must be tuned in HS200 mode, so in case of HS400 we begin 2164 * with HS200 following the sequence as described in "6.6.2.2 HS200 2165 * timing mode selection" of the eMMC specification v5.1, too, and 2166 * switch to max_timing later. HS400ES requires no tuning and, thus, 2167 * can be switch to directly, but requires the same detour via high 2168 * speed mode as does HS400 (see mmc_switch_to_hs400()). 2169 */ 2170 hs400 = max_timing == bus_timing_mmc_hs400; 2171 timing = hs400 == true ? bus_timing_mmc_hs200 : max_timing; 2172 for (i = 0; i < sc->child_count; i++) { 2173 ivar = device_get_ivars(sc->child_list[i]); 2174 if ((ivar->timings & ~(1 << bus_timing_normal)) == 0) 2175 continue; 2176 2177 rca = ivar->rca; 2178 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) { 2179 device_printf(dev, "Card at relative address %d " 2180 "failed to select\n", rca); 2181 continue; 2182 } 2183 2184 if (timing == bus_timing_mmc_hs200 || /* includes HS400 */ 2185 timing == bus_timing_mmc_hs400es) { 2186 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 2187 device_printf(dev, "Failed to set VCCQ for " 2188 "card at relative address %d\n", rca); 2189 continue; 2190 } 2191 } 2192 2193 if (timing == bus_timing_mmc_hs200) { /* includes HS400 */ 2194 /* Set bus width (required for initial tuning). */ 2195 if (mmc_set_card_bus_width(sc, ivar, timing) != 2196 MMC_ERR_NONE) { 2197 device_printf(dev, "Card at relative address " 2198 "%d failed to set bus width\n", rca); 2199 continue; 2200 } 2201 mmcbr_set_bus_width(dev, ivar->bus_width); 2202 mmcbr_update_ios(dev); 2203 } else if (timing == bus_timing_mmc_hs400es) { 2204 if (mmc_switch_to_hs400(sc, ivar, max_dtr, timing) != 2205 MMC_ERR_NONE) { 2206 device_printf(dev, "Card at relative address " 2207 "%d failed to set %s timing\n", rca, 2208 mmc_timing_to_string(timing)); 2209 continue; 2210 } 2211 goto power_class; 2212 } 2213 2214 if (mmc_set_timing(sc, ivar, timing) != MMC_ERR_NONE) { 2215 device_printf(dev, "Card at relative address %d " 2216 "failed to set %s timing\n", rca, 2217 mmc_timing_to_string(timing)); 2218 continue; 2219 } 2220 2221 if (timing == bus_timing_mmc_ddr52) { 2222 /* 2223 * Set EXT_CSD_BUS_WIDTH_n_DDR in EXT_CSD_BUS_WIDTH 2224 * (must be done after switching to EXT_CSD_HS_TIMING). 2225 */ 2226 if (mmc_set_card_bus_width(sc, ivar, timing) != 2227 MMC_ERR_NONE) { 2228 device_printf(dev, "Card at relative address " 2229 "%d failed to set bus width\n", rca); 2230 continue; 2231 } 2232 mmcbr_set_bus_width(dev, ivar->bus_width); 2233 mmcbr_update_ios(dev); 2234 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) { 2235 device_printf(dev, "Failed to set VCCQ for " 2236 "card at relative address %d\n", rca); 2237 continue; 2238 } 2239 } 2240 2241 /* Set clock (must be done before initial tuning). */ 2242 mmcbr_set_clock(dev, max_dtr); 2243 mmcbr_update_ios(dev); 2244 2245 if (mmcbr_tune(dev, hs400) != 0) { 2246 device_printf(dev, "Card at relative address %d " 2247 "failed to execute initial tuning\n", rca); 2248 continue; 2249 } 2250 2251 if (hs400 == true && mmc_switch_to_hs400(sc, ivar, max_dtr, 2252 max_timing) != MMC_ERR_NONE) { 2253 device_printf(dev, "Card at relative address %d " 2254 "failed to set %s timing\n", rca, 2255 mmc_timing_to_string(max_timing)); 2256 continue; 2257 } 2258 2259 power_class: 2260 if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) { 2261 device_printf(dev, "Card at relative address %d " 2262 "failed to set power class\n", rca); 2263 } 2264 } 2265 (void)mmc_select_card(sc, 0); 2266 return (max_dtr); 2267 } 2268 2269 /* 2270 * Switch from HS200 to HS400 (either initially or for re-tuning) or directly 2271 * to HS400ES. This follows the sequences described in "6.6.2.3 HS400 timing 2272 * mode selection" of the eMMC specification v5.1. 2273 */ 2274 static int 2275 mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar, 2276 uint32_t clock, enum mmc_bus_timing max_timing) 2277 { 2278 device_t dev; 2279 int err; 2280 uint16_t rca; 2281 2282 dev = sc->dev; 2283 rca = ivar->rca; 2284 2285 /* 2286 * Both clock and timing must be set as appropriate for high speed 2287 * before eventually switching to HS400/HS400ES; mmc_set_timing() 2288 * will issue mmcbr_update_ios(). 2289 */ 2290 mmcbr_set_clock(dev, ivar->hs_tran_speed); 2291 err = mmc_set_timing(sc, ivar, bus_timing_hs); 2292 if (err != MMC_ERR_NONE) 2293 return (err); 2294 2295 /* 2296 * Set EXT_CSD_BUS_WIDTH_8_DDR in EXT_CSD_BUS_WIDTH (and additionally 2297 * EXT_CSD_BUS_WIDTH_ES for HS400ES). 2298 */ 2299 err = mmc_set_card_bus_width(sc, ivar, max_timing); 2300 if (err != MMC_ERR_NONE) 2301 return (err); 2302 mmcbr_set_bus_width(dev, ivar->bus_width); 2303 mmcbr_update_ios(dev); 2304 2305 /* Finally, switch to HS400/HS400ES mode. */ 2306 err = mmc_set_timing(sc, ivar, max_timing); 2307 if (err != MMC_ERR_NONE) 2308 return (err); 2309 mmcbr_set_clock(dev, clock); 2310 mmcbr_update_ios(dev); 2311 return (MMC_ERR_NONE); 2312 } 2313 2314 /* 2315 * Switch from HS400 to HS200 (for re-tuning). 2316 */ 2317 static int 2318 mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar, 2319 uint32_t clock) 2320 { 2321 device_t dev; 2322 int err; 2323 uint16_t rca; 2324 2325 dev = sc->dev; 2326 rca = ivar->rca; 2327 2328 /* 2329 * Both clock and timing must initially be set as appropriate for 2330 * DDR52 before eventually switching to HS200; mmc_set_timing() 2331 * will issue mmcbr_update_ios(). 2332 */ 2333 mmcbr_set_clock(dev, ivar->hs_tran_speed); 2334 err = mmc_set_timing(sc, ivar, bus_timing_mmc_ddr52); 2335 if (err != MMC_ERR_NONE) 2336 return (err); 2337 2338 /* 2339 * Next, switch to high speed. Thus, clear EXT_CSD_BUS_WIDTH_n_DDR 2340 * in EXT_CSD_BUS_WIDTH and update bus width and timing in ios. 2341 */ 2342 err = mmc_set_card_bus_width(sc, ivar, bus_timing_hs); 2343 if (err != MMC_ERR_NONE) 2344 return (err); 2345 mmcbr_set_bus_width(dev, ivar->bus_width); 2346 mmcbr_set_timing(sc->dev, bus_timing_hs); 2347 mmcbr_update_ios(dev); 2348 2349 /* Finally, switch to HS200 mode. */ 2350 err = mmc_set_timing(sc, ivar, bus_timing_mmc_hs200); 2351 if (err != MMC_ERR_NONE) 2352 return (err); 2353 mmcbr_set_clock(dev, clock); 2354 mmcbr_update_ios(dev); 2355 return (MMC_ERR_NONE); 2356 } 2357 2358 static int 2359 mmc_retune(device_t busdev, device_t dev, bool reset) 2360 { 2361 struct mmc_softc *sc; 2362 struct mmc_ivars *ivar; 2363 int err; 2364 uint32_t clock; 2365 enum mmc_bus_timing timing; 2366 2367 if (device_get_parent(dev) != busdev) 2368 return (MMC_ERR_INVALID); 2369 2370 sc = device_get_softc(busdev); 2371 if (sc->retune_needed != 1 && sc->retune_paused != 0) 2372 return (MMC_ERR_INVALID); 2373 2374 timing = mmcbr_get_timing(busdev); 2375 if (timing == bus_timing_mmc_hs400) { 2376 /* 2377 * Controllers use the data strobe line to latch data from 2378 * the devices in HS400 mode so periodic re-tuning isn't 2379 * expected to be required, i. e. only if a CRC or tuning 2380 * error is signaled to the bridge. In these latter cases 2381 * we are asked to reset the tuning circuit and need to do 2382 * the switch timing dance. 2383 */ 2384 if (reset == false) 2385 return (0); 2386 ivar = device_get_ivars(dev); 2387 clock = mmcbr_get_clock(busdev); 2388 if (mmc_switch_to_hs200(sc, ivar, clock) != MMC_ERR_NONE) 2389 return (MMC_ERR_BADCRC); 2390 } 2391 err = mmcbr_retune(busdev, reset); 2392 if (err != 0 && timing == bus_timing_mmc_hs400) 2393 return (MMC_ERR_BADCRC); 2394 switch (err) { 2395 case 0: 2396 break; 2397 case EIO: 2398 return (MMC_ERR_FAILED); 2399 default: 2400 return (MMC_ERR_INVALID); 2401 } 2402 if (timing == bus_timing_mmc_hs400) { 2403 if (mmc_switch_to_hs400(sc, ivar, clock, timing) != 2404 MMC_ERR_NONE) 2405 return (MMC_ERR_BADCRC); 2406 } 2407 return (MMC_ERR_NONE); 2408 } 2409 2410 static void 2411 mmc_retune_pause(device_t busdev, device_t dev, bool retune) 2412 { 2413 struct mmc_softc *sc; 2414 2415 sc = device_get_softc(busdev); 2416 KASSERT(device_get_parent(dev) == busdev, 2417 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev), 2418 device_get_nameunit(busdev))); 2419 KASSERT(sc->owner != NULL, 2420 ("%s: Request from %s without bus being acquired.", __func__, 2421 device_get_nameunit(dev))); 2422 2423 if (retune == true && sc->retune_paused == 0) 2424 sc->retune_needed = 1; 2425 sc->retune_paused++; 2426 } 2427 2428 static void 2429 mmc_retune_unpause(device_t busdev, device_t dev) 2430 { 2431 struct mmc_softc *sc; 2432 2433 sc = device_get_softc(busdev); 2434 KASSERT(device_get_parent(dev) == busdev, 2435 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev), 2436 device_get_nameunit(busdev))); 2437 KASSERT(sc->owner != NULL, 2438 ("%s: Request from %s without bus being acquired.", __func__, 2439 device_get_nameunit(dev))); 2440 KASSERT(sc->retune_paused != 0, 2441 ("%s: Re-tune pause count already at 0", __func__)); 2442 2443 sc->retune_paused--; 2444 } 2445 2446 static void 2447 mmc_scan(struct mmc_softc *sc) 2448 { 2449 device_t dev = sc->dev; 2450 int err; 2451 2452 err = mmc_acquire_bus(dev, dev); 2453 if (err != 0) { 2454 device_printf(dev, "Failed to acquire bus for scanning\n"); 2455 return; 2456 } 2457 mmc_go_discovery(sc); 2458 err = mmc_release_bus(dev, dev); 2459 if (err != 0) { 2460 device_printf(dev, "Failed to release bus after scanning\n"); 2461 return; 2462 } 2463 (void)bus_generic_attach(dev); 2464 } 2465 2466 static int 2467 mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) 2468 { 2469 struct mmc_ivars *ivar = device_get_ivars(child); 2470 2471 switch (which) { 2472 default: 2473 return (EINVAL); 2474 case MMC_IVAR_SPEC_VERS: 2475 *result = ivar->csd.spec_vers; 2476 break; 2477 case MMC_IVAR_DSR_IMP: 2478 *result = ivar->csd.dsr_imp; 2479 break; 2480 case MMC_IVAR_MEDIA_SIZE: 2481 *result = ivar->sec_count; 2482 break; 2483 case MMC_IVAR_RCA: 2484 *result = ivar->rca; 2485 break; 2486 case MMC_IVAR_SECTOR_SIZE: 2487 *result = MMC_SECTOR_SIZE; 2488 break; 2489 case MMC_IVAR_TRAN_SPEED: 2490 *result = mmcbr_get_clock(bus); 2491 break; 2492 case MMC_IVAR_READ_ONLY: 2493 *result = ivar->read_only; 2494 break; 2495 case MMC_IVAR_HIGH_CAP: 2496 *result = ivar->high_cap; 2497 break; 2498 case MMC_IVAR_CARD_TYPE: 2499 *result = ivar->mode; 2500 break; 2501 case MMC_IVAR_BUS_WIDTH: 2502 *result = ivar->bus_width; 2503 break; 2504 case MMC_IVAR_ERASE_SECTOR: 2505 *result = ivar->erase_sector; 2506 break; 2507 case MMC_IVAR_MAX_DATA: 2508 *result = mmcbr_get_max_data(bus); 2509 break; 2510 case MMC_IVAR_CMD6_TIMEOUT: 2511 *result = ivar->cmd6_time; 2512 break; 2513 case MMC_IVAR_QUIRKS: 2514 *result = ivar->quirks; 2515 break; 2516 case MMC_IVAR_CARD_ID_STRING: 2517 *(char **)result = ivar->card_id_string; 2518 break; 2519 case MMC_IVAR_CARD_SN_STRING: 2520 *(char **)result = ivar->card_sn_string; 2521 break; 2522 } 2523 return (0); 2524 } 2525 2526 static int 2527 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value) 2528 { 2529 2530 /* 2531 * None are writable ATM 2532 */ 2533 return (EINVAL); 2534 } 2535 2536 static void 2537 mmc_delayed_attach(void *xsc) 2538 { 2539 struct mmc_softc *sc = xsc; 2540 2541 mmc_scan(sc); 2542 config_intrhook_disestablish(&sc->config_intrhook); 2543 } 2544 2545 static int 2546 mmc_child_location_str(device_t dev, device_t child, char *buf, 2547 size_t buflen) 2548 { 2549 2550 snprintf(buf, buflen, "rca=0x%04x", mmc_get_rca(child)); 2551 return (0); 2552 } 2553 2554 static device_method_t mmc_methods[] = { 2555 /* device_if */ 2556 DEVMETHOD(device_probe, mmc_probe), 2557 DEVMETHOD(device_attach, mmc_attach), 2558 DEVMETHOD(device_detach, mmc_detach), 2559 DEVMETHOD(device_suspend, mmc_suspend), 2560 DEVMETHOD(device_resume, mmc_resume), 2561 2562 /* Bus interface */ 2563 DEVMETHOD(bus_read_ivar, mmc_read_ivar), 2564 DEVMETHOD(bus_write_ivar, mmc_write_ivar), 2565 DEVMETHOD(bus_child_location_str, mmc_child_location_str), 2566 2567 /* MMC Bus interface */ 2568 DEVMETHOD(mmcbus_retune_pause, mmc_retune_pause), 2569 DEVMETHOD(mmcbus_retune_unpause, mmc_retune_unpause), 2570 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request), 2571 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus), 2572 DEVMETHOD(mmcbus_release_bus, mmc_release_bus), 2573 2574 DEVMETHOD_END 2575 }; 2576 2577 driver_t mmc_driver = { 2578 "mmc", 2579 mmc_methods, 2580 sizeof(struct mmc_softc), 2581 }; 2582 devclass_t mmc_devclass; 2583 2584 MODULE_VERSION(mmc, MMC_VERSION); 2585