1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */ 31 32 /* TODO Move headers to mprvar */ 33 #include <sys/types.h> 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/bus.h> 39 #include <sys/conf.h> 40 #include <sys/malloc.h> 41 #include <sys/sysctl.h> 42 #include <sys/uio.h> 43 44 #include <machine/bus.h> 45 #include <machine/resource.h> 46 #include <sys/rman.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pci_private.h> 51 52 #include <dev/mpr/mpi/mpi2_type.h> 53 #include <dev/mpr/mpi/mpi2.h> 54 #include <dev/mpr/mpi/mpi2_ioc.h> 55 #include <dev/mpr/mpi/mpi2_cnfg.h> 56 #include <dev/mpr/mpi/mpi2_tool.h> 57 #include <dev/mpr/mpi/mpi2_pci.h> 58 59 #include <sys/queue.h> 60 #include <sys/kthread.h> 61 #include <dev/mpr/mpr_ioctl.h> 62 #include <dev/mpr/mprvar.h> 63 64 static int mpr_pci_probe(device_t); 65 static int mpr_pci_attach(device_t); 66 static int mpr_pci_detach(device_t); 67 static int mpr_pci_suspend(device_t); 68 static int mpr_pci_resume(device_t); 69 static void mpr_pci_free(struct mpr_softc *); 70 static int mpr_alloc_msix(struct mpr_softc *sc, int msgs); 71 static int mpr_alloc_msi(struct mpr_softc *sc, int msgs); 72 static int mpr_pci_alloc_interrupts(struct mpr_softc *sc); 73 74 static device_method_t mpr_methods[] = { 75 DEVMETHOD(device_probe, mpr_pci_probe), 76 DEVMETHOD(device_attach, mpr_pci_attach), 77 DEVMETHOD(device_detach, mpr_pci_detach), 78 DEVMETHOD(device_suspend, mpr_pci_suspend), 79 DEVMETHOD(device_resume, mpr_pci_resume), 80 DEVMETHOD(bus_print_child, bus_generic_print_child), 81 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 82 { 0, 0 } 83 }; 84 85 static driver_t mpr_pci_driver = { 86 "mpr", 87 mpr_methods, 88 sizeof(struct mpr_softc) 89 }; 90 91 92 struct mpr_ident { 93 uint16_t vendor; 94 uint16_t device; 95 uint16_t subvendor; 96 uint16_t subdevice; 97 u_int flags; 98 const char *desc; 99 } mpr_identifiers[] = { 100 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004, 101 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3004" }, 102 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008, 103 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3008" }, 104 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1, 105 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_1" }, 106 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2, 107 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_2" }, 108 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5, 109 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" }, 110 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6, 111 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" }, 112 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216, 113 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3216" }, 114 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224, 115 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3224" }, 116 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1, 117 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_1" }, 118 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2, 119 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_2" }, 120 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1, 121 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_1" }, 122 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2, 123 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_2" }, 124 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3408, 125 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 126 "Avago Technologies (LSI) SAS3408" }, 127 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3416, 128 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 129 "Avago Technologies (LSI) SAS3416" }, 130 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508, 131 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 132 "Avago Technologies (LSI) SAS3508" }, 133 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508_1, 134 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 135 "Avago Technologies (LSI) SAS3508_1" }, 136 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516, 137 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 138 "Avago Technologies (LSI) SAS3516" }, 139 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516_1, 140 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 141 "Avago Technologies (LSI) SAS3516_1" }, 142 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3616, 143 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 144 "Avago Technologies (LSI) SAS3616" }, 145 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3708, 146 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 147 "Avago Technologies (LSI) SAS3708" }, 148 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3716, 149 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC, 150 "Avago Technologies (LSI) SAS3716" }, 151 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID0_SAS3816, 152 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 153 "Broadcom Inc. (LSI) INVALID0 SAS3816" }, 154 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3816, 155 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 156 "Broadcom Inc. (LSI) CFG SEC SAS3816" }, 157 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_SAS3816, 158 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 159 "Broadcom Inc. (LSI) HARD SEC SAS3816" }, 160 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID1_SAS3816, 161 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 162 "Broadcom Inc. (LSI) INVALID1 SAS3816" }, 163 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID0_SAS3916, 164 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 165 "Broadcom Inc. (LSI) INVALID0 SAS3916" }, 166 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3916, 167 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 168 "Broadcom Inc. (LSI) CFG SEC SAS3916" }, 169 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_SAS3916, 170 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 171 "Broadcom Inc. (LSI) HARD SEC SAS3916" }, 172 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID1_SAS3916, 173 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC), 174 "Broadcom Inc. (LSI) INVALID1 SAS3916" }, 175 { 0, 0, 0, 0, 0, NULL } 176 }; 177 178 179 static devclass_t mpr_devclass; 180 DRIVER_MODULE(mpr, pci, mpr_pci_driver, mpr_devclass, 0, 0); 181 MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice;D:#", pci, 182 mpr, mpr_identifiers, nitems(mpr_identifiers) - 1); 183 184 MODULE_DEPEND(mpr, cam, 1, 1, 1); 185 186 static struct mpr_ident * 187 mpr_find_ident(device_t dev) 188 { 189 struct mpr_ident *m; 190 191 for (m = mpr_identifiers; m->vendor != 0; m++) { 192 if (m->vendor != pci_get_vendor(dev)) 193 continue; 194 if (m->device != pci_get_device(dev)) 195 continue; 196 if ((m->subvendor != 0xffff) && 197 (m->subvendor != pci_get_subvendor(dev))) 198 continue; 199 if ((m->subdevice != 0xffff) && 200 (m->subdevice != pci_get_subdevice(dev))) 201 continue; 202 return (m); 203 } 204 205 return (NULL); 206 } 207 208 static int 209 mpr_pci_probe(device_t dev) 210 { 211 struct mpr_ident *id; 212 213 if ((id = mpr_find_ident(dev)) != NULL) { 214 device_set_desc(dev, id->desc); 215 return (BUS_PROBE_DEFAULT); 216 } 217 return (ENXIO); 218 } 219 220 static int 221 mpr_pci_attach(device_t dev) 222 { 223 bus_dma_tag_template_t t; 224 struct mpr_softc *sc; 225 struct mpr_ident *m; 226 int error, i; 227 228 sc = device_get_softc(dev); 229 bzero(sc, sizeof(*sc)); 230 sc->mpr_dev = dev; 231 m = mpr_find_ident(dev); 232 sc->mpr_flags = m->flags; 233 234 switch (m->device) { 235 case MPI26_MFGPAGE_DEVID_INVALID0_SAS3816: 236 case MPI26_MFGPAGE_DEVID_INVALID1_SAS3816: 237 case MPI26_MFGPAGE_DEVID_INVALID0_SAS3916: 238 case MPI26_MFGPAGE_DEVID_INVALID1_SAS3916: 239 mpr_printf(sc, "HBA is in Non Secure mode\n"); 240 return (ENXIO); 241 case MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3816: 242 case MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3916: 243 mpr_printf(sc, "HBA is in Configurable Secure mode\n"); 244 break; 245 default: 246 break; 247 } 248 249 mpr_get_tunables(sc); 250 251 /* Twiddle basic PCI config bits for a sanity check */ 252 pci_enable_busmaster(dev); 253 254 for (i = 0; i < PCI_MAXMAPS_0; i++) { 255 sc->mpr_regs_rid = PCIR_BAR(i); 256 257 if ((sc->mpr_regs_resource = bus_alloc_resource_any(dev, 258 SYS_RES_MEMORY, &sc->mpr_regs_rid, RF_ACTIVE)) != NULL) 259 break; 260 } 261 262 if (sc->mpr_regs_resource == NULL) { 263 mpr_printf(sc, "Cannot allocate PCI registers\n"); 264 return (ENXIO); 265 } 266 267 sc->mpr_btag = rman_get_bustag(sc->mpr_regs_resource); 268 sc->mpr_bhandle = rman_get_bushandle(sc->mpr_regs_resource); 269 270 /* Allocate the parent DMA tag */ 271 bus_dma_template_init(&t, bus_get_dma_tag(dev)); 272 if (bus_dma_template_tag(&t, &sc->mpr_parent_dmat)) { 273 mpr_printf(sc, "Cannot allocate parent DMA tag\n"); 274 mpr_pci_free(sc); 275 return (ENOMEM); 276 } 277 278 if (((error = mpr_pci_alloc_interrupts(sc)) != 0) || 279 ((error = mpr_attach(sc)) != 0)) 280 mpr_pci_free(sc); 281 282 return (error); 283 } 284 285 /* 286 * Allocate, but don't assign interrupts early. Doing it before requesting 287 * the IOCFacts message informs the firmware that we want to do MSI-X 288 * multiqueue. We might not use all of the available messages, but there's 289 * no reason to re-alloc if we don't. 290 */ 291 int 292 mpr_pci_alloc_interrupts(struct mpr_softc *sc) 293 { 294 device_t dev; 295 int error, msgs; 296 297 dev = sc->mpr_dev; 298 error = 0; 299 msgs = 0; 300 301 if (sc->disable_msix == 0) { 302 msgs = pci_msix_count(dev); 303 mpr_dprint(sc, MPR_INIT, "Counted %d MSI-X messages\n", msgs); 304 msgs = min(msgs, sc->max_msix); 305 msgs = min(msgs, MPR_MSIX_MAX); 306 msgs = min(msgs, 1); /* XXX */ 307 if (msgs != 0) { 308 mpr_dprint(sc, MPR_INIT, "Attempting to allocate %d " 309 "MSI-X messages\n", msgs); 310 error = mpr_alloc_msix(sc, msgs); 311 } 312 } 313 if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) { 314 msgs = pci_msi_count(dev); 315 mpr_dprint(sc, MPR_INIT, "Counted %d MSI messages\n", msgs); 316 msgs = min(msgs, MPR_MSI_MAX); 317 if (msgs != 0) { 318 mpr_dprint(sc, MPR_INIT, "Attempting to allocated %d " 319 "MSI messages\n", MPR_MSI_MAX); 320 error = mpr_alloc_msi(sc, MPR_MSI_MAX); 321 } 322 } 323 if ((error != 0) || (msgs == 0)) { 324 /* 325 * If neither MSI or MSI-X are available, assume legacy INTx. 326 * This also implies that there will be only 1 queue. 327 */ 328 mpr_dprint(sc, MPR_INIT, "Falling back to legacy INTx\n"); 329 sc->mpr_flags |= MPR_FLAGS_INTX; 330 msgs = 1; 331 } else 332 sc->mpr_flags |= MPR_FLAGS_MSI; 333 334 sc->msi_msgs = msgs; 335 mpr_dprint(sc, MPR_INIT, "Allocated %d interrupts\n", msgs); 336 337 return (error); 338 } 339 340 int 341 mpr_pci_setup_interrupts(struct mpr_softc *sc) 342 { 343 device_t dev; 344 struct mpr_queue *q; 345 void *ihandler; 346 int i, error, rid, initial_rid; 347 348 dev = sc->mpr_dev; 349 error = ENXIO; 350 351 if (sc->mpr_flags & MPR_FLAGS_INTX) { 352 initial_rid = 0; 353 ihandler = mpr_intr; 354 } else if (sc->mpr_flags & MPR_FLAGS_MSI) { 355 initial_rid = 1; 356 ihandler = mpr_intr_msi; 357 } else { 358 mpr_dprint(sc, MPR_ERROR|MPR_INIT, 359 "Unable to set up interrupts\n"); 360 return (EINVAL); 361 } 362 363 for (i = 0; i < sc->msi_msgs; i++) { 364 q = &sc->queues[i]; 365 rid = i + initial_rid; 366 q->irq_rid = rid; 367 q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 368 &q->irq_rid, RF_ACTIVE); 369 if (q->irq == NULL) { 370 mpr_dprint(sc, MPR_ERROR|MPR_INIT, 371 "Cannot allocate interrupt RID %d\n", rid); 372 sc->msi_msgs = i; 373 break; 374 } 375 error = bus_setup_intr(dev, q->irq, 376 INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler, 377 sc, &q->intrhand); 378 if (error) { 379 mpr_dprint(sc, MPR_ERROR|MPR_INIT, 380 "Cannot setup interrupt RID %d\n", rid); 381 sc->msi_msgs = i; 382 break; 383 } 384 } 385 386 mpr_dprint(sc, MPR_INIT, "Set up %d interrupts\n", sc->msi_msgs); 387 return (error); 388 } 389 390 static int 391 mpr_pci_detach(device_t dev) 392 { 393 struct mpr_softc *sc; 394 int error; 395 396 sc = device_get_softc(dev); 397 398 if ((error = mpr_free(sc)) != 0) 399 return (error); 400 401 mpr_pci_free(sc); 402 return (0); 403 } 404 405 void 406 mpr_pci_free_interrupts(struct mpr_softc *sc) 407 { 408 struct mpr_queue *q; 409 int i; 410 411 if (sc->queues == NULL) 412 return; 413 414 for (i = 0; i < sc->msi_msgs; i++) { 415 q = &sc->queues[i]; 416 if (q->irq != NULL) { 417 bus_teardown_intr(sc->mpr_dev, q->irq, 418 q->intrhand); 419 bus_release_resource(sc->mpr_dev, SYS_RES_IRQ, 420 q->irq_rid, q->irq); 421 } 422 } 423 } 424 425 static void 426 mpr_pci_free(struct mpr_softc *sc) 427 { 428 429 if (sc->mpr_parent_dmat != NULL) { 430 bus_dma_tag_destroy(sc->mpr_parent_dmat); 431 } 432 433 mpr_pci_free_interrupts(sc); 434 435 if (sc->mpr_flags & MPR_FLAGS_MSI) 436 pci_release_msi(sc->mpr_dev); 437 438 if (sc->mpr_regs_resource != NULL) { 439 bus_release_resource(sc->mpr_dev, SYS_RES_MEMORY, 440 sc->mpr_regs_rid, sc->mpr_regs_resource); 441 } 442 443 return; 444 } 445 446 static int 447 mpr_pci_suspend(device_t dev) 448 { 449 return (EINVAL); 450 } 451 452 static int 453 mpr_pci_resume(device_t dev) 454 { 455 return (EINVAL); 456 } 457 458 static int 459 mpr_alloc_msix(struct mpr_softc *sc, int msgs) 460 { 461 int error; 462 463 error = pci_alloc_msix(sc->mpr_dev, &msgs); 464 return (error); 465 } 466 467 static int 468 mpr_alloc_msi(struct mpr_softc *sc, int msgs) 469 { 470 int error; 471 472 error = pci_alloc_msi(sc->mpr_dev, &msgs); 473 return (error); 474 } 475 476 int 477 mpr_pci_restore(struct mpr_softc *sc) 478 { 479 struct pci_devinfo *dinfo; 480 481 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); 482 483 dinfo = device_get_ivars(sc->mpr_dev); 484 if (dinfo == NULL) { 485 mpr_dprint(sc, MPR_FAULT, "%s: NULL dinfo\n", __func__); 486 return (EINVAL); 487 } 488 489 pci_cfg_restore(sc->mpr_dev, dinfo); 490 return (0); 491 } 492 493