1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 /* Debugging tables for MPT2 */ 31 32 /* TODO Move headers to mprvar */ 33 #include <sys/types.h> 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/selinfo.h> 38 #include <sys/module.h> 39 #include <sys/bus.h> 40 #include <sys/conf.h> 41 #include <sys/bio.h> 42 #include <sys/malloc.h> 43 #include <sys/uio.h> 44 #include <sys/sysctl.h> 45 #include <sys/queue.h> 46 #include <sys/kthread.h> 47 #include <sys/taskqueue.h> 48 49 #include <machine/bus.h> 50 #include <machine/resource.h> 51 #include <sys/rman.h> 52 53 #include <cam/scsi/scsi_all.h> 54 55 #include <dev/mpr/mpi/mpi2_type.h> 56 #include <dev/mpr/mpi/mpi2.h> 57 #include <dev/mpr/mpi/mpi2_ioc.h> 58 #include <dev/mpr/mpi/mpi2_cnfg.h> 59 #include <dev/mpr/mpi/mpi2_init.h> 60 #include <dev/mpr/mpi/mpi2_tool.h> 61 #include <dev/mpr/mpi/mpi2_pci.h> 62 #include <dev/mpr/mpr_ioctl.h> 63 #include <dev/mpr/mprvar.h> 64 #include <dev/mpr/mpr_table.h> 65 66 char * 67 mpr_describe_table(struct mpr_table_lookup *table, u_int code) 68 { 69 int i; 70 71 for (i = 0; table[i].string != NULL; i++) { 72 if (table[i].code == code) 73 return(table[i].string); 74 } 75 return(table[i+1].string); 76 } 77 78 //SLM-Add new PCIe info to all of these tables 79 struct mpr_table_lookup mpr_event_names[] = { 80 {"LogData", 0x01}, 81 {"StateChange", 0x02}, 82 {"HardResetReceived", 0x05}, 83 {"EventChange", 0x0a}, 84 {"TaskSetFull", 0x0e}, 85 {"SasDeviceStatusChange", 0x0f}, 86 {"IrOperationStatus", 0x14}, 87 {"SasDiscovery", 0x16}, 88 {"SasBroadcastPrimitive", 0x17}, 89 {"SasInitDeviceStatusChange", 0x18}, 90 {"SasInitTableOverflow", 0x19}, 91 {"SasTopologyChangeList", 0x1c}, 92 {"SasEnclDeviceStatusChange", 0x1d}, 93 {"IrVolume", 0x1e}, 94 {"IrPhysicalDisk", 0x1f}, 95 {"IrConfigurationChangeList", 0x20}, 96 {"LogEntryAdded", 0x21}, 97 {"SasPhyCounter", 0x22}, 98 {"GpioInterrupt", 0x23}, 99 {"HbdPhyEvent", 0x24}, 100 {"SasQuiesce", 0x25}, 101 {"SasNotifyPrimitive", 0x26}, 102 {"TempThreshold", 0x27}, 103 {"HostMessage", 0x28}, 104 {"PowerPerformanceChange", 0x29}, 105 {"PCIeDeviceStatusChange", 0x30}, 106 {"PCIeEnumeration", 0x31}, 107 {"PCIeTopologyChangeList", 0x32}, 108 {"PCIeLinkCounter", 0x33}, 109 {"CableEvent", 0x34}, 110 {NULL, 0}, 111 {"Unknown Event", 0} 112 }; 113 114 struct mpr_table_lookup mpr_phystatus_names[] = { 115 {"NewTargetAdded", 0x01}, 116 {"TargetGone", 0x02}, 117 {"PHYLinkStatusChange", 0x03}, 118 {"PHYLinkStatusUnchanged", 0x04}, 119 {"TargetMissing", 0x05}, 120 {NULL, 0}, 121 {"Unknown Status", 0} 122 }; 123 124 struct mpr_table_lookup mpr_linkrate_names[] = { 125 {"PHY disabled", 0x01}, 126 {"Speed Negotiation Failed", 0x02}, 127 {"SATA OOB Complete", 0x03}, 128 {"SATA Port Selector", 0x04}, 129 {"SMP Reset in Progress", 0x05}, 130 {"1.5Gbps", 0x08}, 131 {"3.0Gbps", 0x09}, 132 {"6.0Gbps", 0x0a}, 133 {"12.0Gbps", 0x0b}, 134 {NULL, 0}, 135 {"LinkRate Unknown", 0x00} 136 }; 137 138 struct mpr_table_lookup mpr_sasdev0_devtype[] = { 139 {"End Device", 0x01}, 140 {"Edge Expander", 0x02}, 141 {"Fanout Expander", 0x03}, 142 {NULL, 0}, 143 {"No Device", 0x00} 144 }; 145 146 struct mpr_table_lookup mpr_phyinfo_reason_names[] = { 147 {"Power On", 0x01}, 148 {"Hard Reset", 0x02}, 149 {"SMP Phy Control Link Reset", 0x03}, 150 {"Loss DWORD Sync", 0x04}, 151 {"Multiplex Sequence", 0x05}, 152 {"I-T Nexus Loss Timer", 0x06}, 153 {"Break Timeout Timer", 0x07}, 154 {"PHY Test Function", 0x08}, 155 {NULL, 0}, 156 {"Unknown Reason", 0x00} 157 }; 158 159 struct mpr_table_lookup mpr_whoinit_names[] = { 160 {"System BIOS", 0x01}, 161 {"ROM BIOS", 0x02}, 162 {"PCI Peer", 0x03}, 163 {"Host Driver", 0x04}, 164 {"Manufacturing", 0x05}, 165 {NULL, 0}, 166 {"Not Initialized", 0x00} 167 }; 168 169 struct mpr_table_lookup mpr_sasdisc_reason[] = { 170 {"Discovery Started", 0x01}, 171 {"Discovery Complete", 0x02}, 172 {NULL, 0}, 173 {"Unknown", 0x00} 174 }; 175 176 struct mpr_table_lookup mpr_sastopo_exp[] = { 177 {"Added", 0x01}, 178 {"Not Responding", 0x02}, 179 {"Responding", 0x03}, 180 {"Delay Not Responding", 0x04}, 181 {NULL, 0}, 182 {"Unknown", 0x00} 183 }; 184 185 struct mpr_table_lookup mpr_sasdev_reason[] = { 186 {"SMART Data", 0x05}, 187 {"Unsupported", 0x07}, 188 {"Internal Device Reset", 0x08}, 189 {"Task Abort Internal", 0x09}, 190 {"Abort Task Set Internal", 0x0a}, 191 {"Clear Task Set Internal", 0x0b}, 192 {"Query Task Internal", 0x0c}, 193 {"Async Notification", 0x0d}, 194 {"Cmp Internal Device Reset", 0x0e}, 195 {"Cmp Task Abort Internal", 0x0f}, 196 {"Sata Init Failure", 0x10}, 197 {NULL, 0}, 198 {"Unknown", 0x00} 199 }; 200 201 struct mpr_table_lookup mpr_pcie_linkrate_names[] = { 202 {"Port disabled", 0x01}, 203 {"2.5GT/sec", 0x02}, 204 {"5.0GT/sec", 0x03}, 205 {"8.0GT/sec", 0x04}, 206 {"16.0GT/sec", 0x05}, 207 {NULL, 0}, 208 {"LinkRate Unknown", 0x00} 209 }; 210 211 void 212 mpr_describe_devinfo(uint32_t devinfo, char *string, int len) 213 { 214 snprintf(string, len, "%b,%s", devinfo, 215 "\20" "\4SataHost" "\5SmpInit" "\6StpInit" "\7SspInit" 216 "\10SataDev" "\11SmpTarg" "\12StpTarg" "\13SspTarg" "\14Direct" 217 "\15LsiDev" "\16AtapiDev" "\17SepDev", 218 mpr_describe_table(mpr_sasdev0_devtype, devinfo & 0x03)); 219 } 220 221 void 222 _mpr_print_iocfacts(struct mpr_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 223 { 224 MPR_PRINTFIELD_START(sc, "IOCFacts"); 225 MPR_PRINTFIELD(sc, facts, MsgVersion, 0x%x); 226 MPR_PRINTFIELD(sc, facts, HeaderVersion, 0x%x); 227 MPR_PRINTFIELD(sc, facts, IOCNumber, %d); 228 MPR_PRINTFIELD(sc, facts, IOCExceptions, 0x%x); 229 MPR_PRINTFIELD(sc, facts, MaxChainDepth, %d); 230 mpr_print_field(sc, "WhoInit: %s\n", 231 mpr_describe_table(mpr_whoinit_names, facts->WhoInit)); 232 MPR_PRINTFIELD(sc, facts, NumberOfPorts, %d); 233 MPR_PRINTFIELD(sc, facts, MaxMSIxVectors, %d); 234 MPR_PRINTFIELD(sc, facts, RequestCredit, %d); 235 MPR_PRINTFIELD(sc, facts, ProductID, 0x%x); 236 mpr_print_field(sc, "IOCCapabilities: %b\n", 237 facts->IOCCapabilities, "\20" "\3ScsiTaskFull" "\4DiagTrace" 238 "\5SnapBuf" "\6ExtBuf" "\7EEDP" "\10BiDirTarg" "\11Multicast" 239 "\14TransRetry" "\15IR" "\16EventReplay" "\17RaidAccel" 240 "\20MSIXIndex" "\21HostDisc"); 241 mpr_print_field(sc, "FWVersion= %d-%d-%d-%d\n", 242 facts->FWVersion.Struct.Major, 243 facts->FWVersion.Struct.Minor, 244 facts->FWVersion.Struct.Unit, 245 facts->FWVersion.Struct.Dev); 246 MPR_PRINTFIELD(sc, facts, IOCRequestFrameSize, %d); 247 MPR_PRINTFIELD(sc, facts, MaxInitiators, %d); 248 MPR_PRINTFIELD(sc, facts, MaxTargets, %d); 249 MPR_PRINTFIELD(sc, facts, MaxSasExpanders, %d); 250 MPR_PRINTFIELD(sc, facts, MaxEnclosures, %d); 251 mpr_print_field(sc, "ProtocolFlags: %b\n", 252 facts->ProtocolFlags, "\20" "\1ScsiTarg" "\2ScsiInit"); 253 MPR_PRINTFIELD(sc, facts, HighPriorityCredit, %d); 254 MPR_PRINTFIELD(sc, facts, MaxReplyDescriptorPostQueueDepth, %d); 255 MPR_PRINTFIELD(sc, facts, ReplyFrameSize, %d); 256 MPR_PRINTFIELD(sc, facts, MaxVolumes, %d); 257 MPR_PRINTFIELD(sc, facts, MaxDevHandle, %d); 258 MPR_PRINTFIELD(sc, facts, MaxPersistentEntries, %d); 259 } 260 261 void 262 _mpr_print_portfacts(struct mpr_softc *sc, MPI2_PORT_FACTS_REPLY *facts) 263 { 264 265 MPR_PRINTFIELD_START(sc, "PortFacts"); 266 MPR_PRINTFIELD(sc, facts, PortNumber, %d); 267 MPR_PRINTFIELD(sc, facts, PortType, 0x%x); 268 MPR_PRINTFIELD(sc, facts, MaxPostedCmdBuffers, %d); 269 } 270 271 void 272 _mpr_print_event(struct mpr_softc *sc, MPI2_EVENT_NOTIFICATION_REPLY *event) 273 { 274 275 MPR_PRINTFIELD_START(sc, "EventReply"); 276 MPR_PRINTFIELD(sc, event, EventDataLength, %d); 277 MPR_PRINTFIELD(sc, event, AckRequired, %d); 278 mpr_print_field(sc, "Event: %s (0x%x)\n", 279 mpr_describe_table(mpr_event_names, event->Event), event->Event); 280 MPR_PRINTFIELD(sc, event, EventContext, 0x%x); 281 } 282 283 void 284 _mpr_print_sasdev0(struct mpr_softc *sc, MPI2_CONFIG_PAGE_SAS_DEV_0 *buf) 285 { 286 MPR_PRINTFIELD_START(sc, "SAS Device Page 0"); 287 MPR_PRINTFIELD(sc, buf, Slot, %d); 288 MPR_PRINTFIELD(sc, buf, EnclosureHandle, 0x%x); 289 mpr_print_field(sc, "SASAddress: 0x%jx\n", 290 mpr_to_u64(&buf->SASAddress)); 291 MPR_PRINTFIELD(sc, buf, ParentDevHandle, 0x%x); 292 MPR_PRINTFIELD(sc, buf, PhyNum, %d); 293 MPR_PRINTFIELD(sc, buf, AccessStatus, 0x%x); 294 MPR_PRINTFIELD(sc, buf, DevHandle, 0x%x); 295 MPR_PRINTFIELD(sc, buf, AttachedPhyIdentifier, 0x%x); 296 MPR_PRINTFIELD(sc, buf, ZoneGroup, %d); 297 mpr_print_field(sc, "DeviceInfo: %b,%s\n", buf->DeviceInfo, 298 "\20" "\4SataHost" "\5SmpInit" "\6StpInit" "\7SspInit" 299 "\10SataDev" "\11SmpTarg" "\12StpTarg" "\13SspTarg" "\14Direct" 300 "\15LsiDev" "\16AtapiDev" "\17SepDev", 301 mpr_describe_table(mpr_sasdev0_devtype, buf->DeviceInfo & 0x03)); 302 MPR_PRINTFIELD(sc, buf, Flags, 0x%x); 303 MPR_PRINTFIELD(sc, buf, PhysicalPort, %d); 304 MPR_PRINTFIELD(sc, buf, MaxPortConnections, %d); 305 mpr_print_field(sc, "DeviceName: 0x%jx\n", 306 mpr_to_u64(&buf->DeviceName)); 307 MPR_PRINTFIELD(sc, buf, PortGroups, %d); 308 MPR_PRINTFIELD(sc, buf, DmaGroup, %d); 309 MPR_PRINTFIELD(sc, buf, ControlGroup, %d); 310 } 311 312 void 313 _mpr_print_evt_sas(struct mpr_softc *sc, MPI2_EVENT_NOTIFICATION_REPLY *event) 314 { 315 316 _mpr_print_event(sc, event); 317 318 switch(event->Event) { 319 case MPI2_EVENT_SAS_DISCOVERY: 320 { 321 MPI2_EVENT_DATA_SAS_DISCOVERY *data; 322 323 data = (MPI2_EVENT_DATA_SAS_DISCOVERY *)&event->EventData; 324 mpr_print_field(sc, "Flags: %b\n", data->Flags, 325 "\20" "\1InProgress" "\2DeviceChange"); 326 mpr_print_field(sc, "ReasonCode: %s\n", 327 mpr_describe_table(mpr_sasdisc_reason, data->ReasonCode)); 328 MPR_PRINTFIELD(sc, data, PhysicalPort, %d); 329 mpr_print_field(sc, "DiscoveryStatus: %b\n", 330 data->DiscoveryStatus, "\20" 331 "\1Loop" "\2UnaddressableDev" "\3DupSasAddr" "\5SmpTimeout" 332 "\6ExpRouteFull" "\7RouteIndexError" "\10SmpFailed" 333 "\11SmpCrcError" "\12SubSubLink" "\13TableTableLink" 334 "\14UnsupDevice" "\15TableSubLink" "\16MultiDomain" 335 "\17MultiSub" "\20MultiSubSub" "\34DownstreamInit" 336 "\35MaxPhys" "\36MaxTargs" "\37MaxExpanders" 337 "\40MaxEnclosures"); 338 break; 339 } 340 //SLM-add for PCIE EVENT too 341 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 342 { 343 MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST *data; 344 MPI2_EVENT_SAS_TOPO_PHY_ENTRY *phy; 345 int i, phynum; 346 347 data = (MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST *) 348 &event->EventData; 349 MPR_PRINTFIELD(sc, data, EnclosureHandle, 0x%x); 350 MPR_PRINTFIELD(sc, data, ExpanderDevHandle, 0x%x); 351 MPR_PRINTFIELD(sc, data, NumPhys, %d); 352 MPR_PRINTFIELD(sc, data, NumEntries, %d); 353 MPR_PRINTFIELD(sc, data, StartPhyNum, %d); 354 mpr_print_field(sc, "ExpStatus: %s (0x%x)\n", 355 mpr_describe_table(mpr_sastopo_exp, data->ExpStatus), 356 data->ExpStatus); 357 MPR_PRINTFIELD(sc, data, PhysicalPort, %d); 358 for (i = 0; i < data->NumEntries; i++) { 359 phy = &data->PHY[i]; 360 phynum = data->StartPhyNum + i; 361 mpr_print_field(sc, 362 "PHY[%d].AttachedDevHandle: 0x%04x\n", phynum, 363 phy->AttachedDevHandle); 364 mpr_print_field(sc, 365 "PHY[%d].LinkRate: %s (0x%x)\n", phynum, 366 mpr_describe_table(mpr_linkrate_names, 367 (phy->LinkRate >> 4) & 0xf), phy->LinkRate); 368 mpr_print_field(sc, "PHY[%d].PhyStatus: %s\n", 369 phynum, mpr_describe_table(mpr_phystatus_names, 370 phy->PhyStatus)); 371 } 372 break; 373 } 374 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: 375 { 376 MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE *data; 377 378 data = (MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE *) 379 &event->EventData; 380 MPR_PRINTFIELD(sc, data, EnclosureHandle, 0x%x); 381 mpr_print_field(sc, "ReasonCode: %s\n", 382 mpr_describe_table(mpr_sastopo_exp, data->ReasonCode)); 383 MPR_PRINTFIELD(sc, data, PhysicalPort, %d); 384 MPR_PRINTFIELD(sc, data, NumSlots, %d); 385 MPR_PRINTFIELD(sc, data, StartSlot, %d); 386 MPR_PRINTFIELD(sc, data, PhyBits, 0x%x); 387 break; 388 } 389 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 390 { 391 MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE *data; 392 393 data = (MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE *) 394 &event->EventData; 395 MPR_PRINTFIELD(sc, data, TaskTag, 0x%x); 396 mpr_print_field(sc, "ReasonCode: %s\n", 397 mpr_describe_table(mpr_sasdev_reason, data->ReasonCode)); 398 MPR_PRINTFIELD(sc, data, ASC, 0x%x); 399 MPR_PRINTFIELD(sc, data, ASCQ, 0x%x); 400 MPR_PRINTFIELD(sc, data, DevHandle, 0x%x); 401 mpr_print_field(sc, "SASAddress: 0x%jx\n", 402 mpr_to_u64(&data->SASAddress)); 403 } 404 default: 405 break; 406 } 407 } 408 409 void 410 _mpr_print_expander1(struct mpr_softc *sc, MPI2_CONFIG_PAGE_EXPANDER_1 *buf) 411 { 412 MPR_PRINTFIELD_START(sc, "SAS Expander Page 1 #%d", buf->Phy); 413 MPR_PRINTFIELD(sc, buf, PhysicalPort, %d); 414 MPR_PRINTFIELD(sc, buf, NumPhys, %d); 415 MPR_PRINTFIELD(sc, buf, Phy, %d); 416 MPR_PRINTFIELD(sc, buf, NumTableEntriesProgrammed, %d); 417 mpr_print_field(sc, "ProgrammedLinkRate: %s (0x%x)\n", 418 mpr_describe_table(mpr_linkrate_names, 419 (buf->ProgrammedLinkRate >> 4) & 0xf), buf->ProgrammedLinkRate); 420 mpr_print_field(sc, "HwLinkRate: %s (0x%x)\n", 421 mpr_describe_table(mpr_linkrate_names, 422 (buf->HwLinkRate >> 4) & 0xf), buf->HwLinkRate); 423 MPR_PRINTFIELD(sc, buf, AttachedDevHandle, 0x%04x); 424 mpr_print_field(sc, "PhyInfo Reason: %s (0x%x)\n", 425 mpr_describe_table(mpr_phyinfo_reason_names, 426 (buf->PhyInfo >> 16) & 0xf), buf->PhyInfo); 427 mpr_print_field(sc, "AttachedDeviceInfo: %b,%s\n", 428 buf->AttachedDeviceInfo, "\20" "\4SATAhost" "\5SMPinit" "\6STPinit" 429 "\7SSPinit" "\10SATAdev" "\11SMPtarg" "\12STPtarg" "\13SSPtarg" 430 "\14Direct" "\15LSIdev" "\16ATAPIdev" "\17SEPdev", 431 mpr_describe_table(mpr_sasdev0_devtype, 432 buf->AttachedDeviceInfo & 0x03)); 433 MPR_PRINTFIELD(sc, buf, ExpanderDevHandle, 0x%04x); 434 MPR_PRINTFIELD(sc, buf, ChangeCount, %d); 435 mpr_print_field(sc, "NegotiatedLinkRate: %s (0x%x)\n", 436 mpr_describe_table(mpr_linkrate_names, 437 buf->NegotiatedLinkRate & 0xf), buf->NegotiatedLinkRate); 438 MPR_PRINTFIELD(sc, buf, PhyIdentifier, %d); 439 MPR_PRINTFIELD(sc, buf, AttachedPhyIdentifier, %d); 440 MPR_PRINTFIELD(sc, buf, DiscoveryInfo, 0x%x); 441 MPR_PRINTFIELD(sc, buf, AttachedPhyInfo, 0x%x); 442 mpr_print_field(sc, "AttachedPhyInfo Reason: %s (0x%x)\n", 443 mpr_describe_table(mpr_phyinfo_reason_names, 444 buf->AttachedPhyInfo & 0xf), buf->AttachedPhyInfo); 445 MPR_PRINTFIELD(sc, buf, ZoneGroup, %d); 446 MPR_PRINTFIELD(sc, buf, SelfConfigStatus, 0x%x); 447 } 448 449 void 450 _mpr_print_sasphy0(struct mpr_softc *sc, MPI2_CONFIG_PAGE_SAS_PHY_0 *buf) 451 { 452 MPR_PRINTFIELD_START(sc, "SAS PHY Page 0"); 453 MPR_PRINTFIELD(sc, buf, OwnerDevHandle, 0x%04x); 454 MPR_PRINTFIELD(sc, buf, AttachedDevHandle, 0x%04x); 455 MPR_PRINTFIELD(sc, buf, AttachedPhyIdentifier, %d); 456 mpr_print_field(sc, "AttachedPhyInfo Reason: %s (0x%x)\n", 457 mpr_describe_table(mpr_phyinfo_reason_names, 458 buf->AttachedPhyInfo & 0xf), buf->AttachedPhyInfo); 459 mpr_print_field(sc, "ProgrammedLinkRate: %s (0x%x)\n", 460 mpr_describe_table(mpr_linkrate_names, 461 (buf->ProgrammedLinkRate >> 4) & 0xf), buf->ProgrammedLinkRate); 462 mpr_print_field(sc, "HwLinkRate: %s (0x%x)\n", 463 mpr_describe_table(mpr_linkrate_names, 464 (buf->HwLinkRate >> 4) & 0xf), buf->HwLinkRate); 465 MPR_PRINTFIELD(sc, buf, ChangeCount, %d); 466 MPR_PRINTFIELD(sc, buf, Flags, 0x%x); 467 mpr_print_field(sc, "PhyInfo Reason: %s (0x%x)\n", 468 mpr_describe_table(mpr_phyinfo_reason_names, 469 (buf->PhyInfo >> 16) & 0xf), buf->PhyInfo); 470 mpr_print_field(sc, "NegotiatedLinkRate: %s (0x%x)\n", 471 mpr_describe_table(mpr_linkrate_names, 472 buf->NegotiatedLinkRate & 0xf), buf->NegotiatedLinkRate); 473 } 474 475 void 476 mpr_print_sgl(struct mpr_softc *sc, struct mpr_command *cm, int offset) 477 { 478 MPI2_IEEE_SGE_SIMPLE64 *ieee_sge; 479 MPI25_IEEE_SGE_CHAIN64 *ieee_sgc; 480 MPI2_SGE_SIMPLE64 *sge; 481 MPI2_REQUEST_HEADER *req; 482 struct mpr_chain *chain = NULL; 483 char *frame; 484 u_int i = 0, flags, length; 485 486 req = (MPI2_REQUEST_HEADER *)cm->cm_req; 487 frame = (char *)cm->cm_req; 488 ieee_sge = (MPI2_IEEE_SGE_SIMPLE64 *)&frame[offset * 4]; 489 sge = (MPI2_SGE_SIMPLE64 *)&frame[offset * 4]; 490 printf("SGL for command %p\n", cm); 491 492 hexdump(frame, 128, NULL, 0); 493 while ((frame != NULL) && (!(cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE))) { 494 flags = ieee_sge->Flags; 495 length = le32toh(ieee_sge->Length); 496 printf("IEEE seg%d flags=0x%02x len=0x%08x addr=0x%016jx\n", i, 497 flags, length, mpr_to_u64(&ieee_sge->Address)); 498 if (flags & MPI25_IEEE_SGE_FLAGS_END_OF_LIST) 499 break; 500 ieee_sge++; 501 i++; 502 if (flags & MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT) { 503 ieee_sgc = (MPI25_IEEE_SGE_CHAIN64 *)ieee_sge; 504 printf("IEEE chain flags=0x%x len=0x%x Offset=0x%x " 505 "Address=0x%016jx\n", ieee_sgc->Flags, 506 le32toh(ieee_sgc->Length), 507 ieee_sgc->NextChainOffset, 508 mpr_to_u64(&ieee_sgc->Address)); 509 if (chain == NULL) 510 chain = TAILQ_FIRST(&cm->cm_chain_list); 511 else 512 chain = TAILQ_NEXT(chain, chain_link); 513 frame = (char *)chain->chain; 514 ieee_sge = (MPI2_IEEE_SGE_SIMPLE64 *)frame; 515 hexdump(frame, 128, NULL, 0); 516 } 517 } 518 while ((frame != NULL) && (cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE)) { 519 flags = le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT; 520 printf("seg%d flags=0x%02x len=0x%06x addr=0x%016jx\n", i, 521 flags, le32toh(sge->FlagsLength) & 0xffffff, 522 mpr_to_u64(&sge->Address)); 523 if (flags & (MPI2_SGE_FLAGS_END_OF_LIST | 524 MPI2_SGE_FLAGS_END_OF_BUFFER)) 525 break; 526 sge++; 527 i++; 528 } 529 } 530 531 void 532 mpr_print_scsiio_cmd(struct mpr_softc *sc, struct mpr_command *cm) 533 { 534 MPI2_SCSI_IO_REQUEST *req; 535 536 req = (MPI2_SCSI_IO_REQUEST *)cm->cm_req; 537 mpr_print_sgl(sc, cm, req->SGLOffset0); 538 } 539 540