1 /*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * Copyright (c) 2011-2015 LSI Corp. 4 * Copyright (c) 2013-2015 Avago Technologies 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD 29 * 30 * $FreeBSD$ 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 /* Communications core for Avago Technologies (LSI) MPT2 */ 37 38 /* TODO Move headers to mpsvar */ 39 #include <sys/types.h> 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/selinfo.h> 44 #include <sys/lock.h> 45 #include <sys/mutex.h> 46 #include <sys/module.h> 47 #include <sys/bus.h> 48 #include <sys/conf.h> 49 #include <sys/bio.h> 50 #include <sys/malloc.h> 51 #include <sys/uio.h> 52 #include <sys/sysctl.h> 53 #include <sys/smp.h> 54 #include <sys/queue.h> 55 #include <sys/kthread.h> 56 #include <sys/taskqueue.h> 57 #include <sys/endian.h> 58 #include <sys/eventhandler.h> 59 #include <sys/sbuf.h> 60 61 #include <machine/bus.h> 62 #include <machine/resource.h> 63 #include <sys/rman.h> 64 #include <sys/proc.h> 65 66 #include <dev/pci/pcivar.h> 67 68 #include <cam/cam.h> 69 #include <cam/scsi/scsi_all.h> 70 71 #include <dev/mps/mpi/mpi2_type.h> 72 #include <dev/mps/mpi/mpi2.h> 73 #include <dev/mps/mpi/mpi2_ioc.h> 74 #include <dev/mps/mpi/mpi2_sas.h> 75 #include <dev/mps/mpi/mpi2_cnfg.h> 76 #include <dev/mps/mpi/mpi2_init.h> 77 #include <dev/mps/mpi/mpi2_tool.h> 78 #include <dev/mps/mps_ioctl.h> 79 #include <dev/mps/mpsvar.h> 80 #include <dev/mps/mps_table.h> 81 82 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag); 83 static int mps_init_queues(struct mps_softc *sc); 84 static void mps_resize_queues(struct mps_softc *sc); 85 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag); 86 static int mps_transition_operational(struct mps_softc *sc); 87 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching); 88 static void mps_iocfacts_free(struct mps_softc *sc); 89 static void mps_startup(void *arg); 90 static int mps_send_iocinit(struct mps_softc *sc); 91 static int mps_alloc_queues(struct mps_softc *sc); 92 static int mps_alloc_hw_queues(struct mps_softc *sc); 93 static int mps_alloc_replies(struct mps_softc *sc); 94 static int mps_alloc_requests(struct mps_softc *sc); 95 static int mps_attach_log(struct mps_softc *sc); 96 static __inline void mps_complete_command(struct mps_softc *sc, 97 struct mps_command *cm); 98 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 99 MPI2_EVENT_NOTIFICATION_REPLY *reply); 100 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm); 101 static void mps_periodic(void *); 102 static int mps_reregister_events(struct mps_softc *sc); 103 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm); 104 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts); 105 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag); 106 static int mps_debug_sysctl(SYSCTL_HANDLER_ARGS); 107 static void mps_parse_debug(struct mps_softc *sc, char *list); 108 109 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters"); 110 111 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory"); 112 113 /* 114 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of 115 * any state and back to its initialization state machine. 116 */ 117 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; 118 119 /* Added this union to smoothly convert le64toh cm->cm_desc.Words. 120 * Compiler only support unint64_t to be passed as argument. 121 * Otherwise it will throw below error 122 * "aggregate value used where an integer was expected" 123 */ 124 125 typedef union _reply_descriptor { 126 u64 word; 127 struct { 128 u32 low; 129 u32 high; 130 } u; 131 }reply_descriptor,address_descriptor; 132 133 /* Rate limit chain-fail messages to 1 per minute */ 134 static struct timeval mps_chainfail_interval = { 60, 0 }; 135 136 /* 137 * sleep_flag can be either CAN_SLEEP or NO_SLEEP. 138 * If this function is called from process context, it can sleep 139 * and there is no harm to sleep, in case if this fuction is called 140 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set. 141 * based on sleep flags driver will call either msleep, pause or DELAY. 142 * msleep and pause are of same variant, but pause is used when mps_mtx 143 * is not hold by driver. 144 * 145 */ 146 static int 147 mps_diag_reset(struct mps_softc *sc,int sleep_flag) 148 { 149 uint32_t reg; 150 int i, error, tries = 0; 151 uint8_t first_wait_done = FALSE; 152 153 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 154 155 /* Clear any pending interrupts */ 156 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 157 158 /* 159 * Force NO_SLEEP for threads prohibited to sleep 160 * e.a Thread from interrupt handler are prohibited to sleep. 161 */ 162 if (curthread->td_no_sleeping != 0) 163 sleep_flag = NO_SLEEP; 164 165 mps_dprint(sc, MPS_INIT, "sequence start, sleep_flag= %d\n", sleep_flag); 166 167 /* Push the magic sequence */ 168 error = ETIMEDOUT; 169 while (tries++ < 20) { 170 for (i = 0; i < sizeof(mpt2_reset_magic); i++) 171 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 172 mpt2_reset_magic[i]); 173 /* wait 100 msec */ 174 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 175 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 176 "mpsdiag", hz/10); 177 else if (sleep_flag == CAN_SLEEP) 178 pause("mpsdiag", hz/10); 179 else 180 DELAY(100 * 1000); 181 182 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 183 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { 184 error = 0; 185 break; 186 } 187 } 188 if (error) { 189 mps_dprint(sc, MPS_INIT, "sequence failed, error=%d, exit\n", 190 error); 191 return (error); 192 } 193 194 /* Send the actual reset. XXX need to refresh the reg? */ 195 reg |= MPI2_DIAG_RESET_ADAPTER; 196 mps_dprint(sc, MPS_INIT, "sequence success, sending reset, reg= 0x%x\n", 197 reg); 198 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, reg); 199 200 /* Wait up to 300 seconds in 50ms intervals */ 201 error = ETIMEDOUT; 202 for (i = 0; i < 6000; i++) { 203 /* 204 * Wait 50 msec. If this is the first time through, wait 256 205 * msec to satisfy Diag Reset timing requirements. 206 */ 207 if (first_wait_done) { 208 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 209 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 210 "mpsdiag", hz/20); 211 else if (sleep_flag == CAN_SLEEP) 212 pause("mpsdiag", hz/20); 213 else 214 DELAY(50 * 1000); 215 } else { 216 DELAY(256 * 1000); 217 first_wait_done = TRUE; 218 } 219 /* 220 * Check for the RESET_ADAPTER bit to be cleared first, then 221 * wait for the RESET state to be cleared, which takes a little 222 * longer. 223 */ 224 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); 225 if (reg & MPI2_DIAG_RESET_ADAPTER) { 226 continue; 227 } 228 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 229 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { 230 error = 0; 231 break; 232 } 233 } 234 if (error) { 235 mps_dprint(sc, MPS_INIT, "reset failed, error= %d, exit\n", 236 error); 237 return (error); 238 } 239 240 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); 241 mps_dprint(sc, MPS_INIT, "diag reset success, exit\n"); 242 243 return (0); 244 } 245 246 static int 247 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag) 248 { 249 int error; 250 251 MPS_FUNCTRACE(sc); 252 253 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 254 255 error = 0; 256 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 257 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << 258 MPI2_DOORBELL_FUNCTION_SHIFT); 259 260 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) { 261 mps_dprint(sc, MPS_INIT|MPS_FAULT, 262 "Doorbell handshake failed\n"); 263 error = ETIMEDOUT; 264 } 265 266 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 267 return (error); 268 } 269 270 static int 271 mps_transition_ready(struct mps_softc *sc) 272 { 273 uint32_t reg, state; 274 int error, tries = 0; 275 int sleep_flags; 276 277 MPS_FUNCTRACE(sc); 278 /* If we are in attach call, do not sleep */ 279 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE) 280 ? CAN_SLEEP:NO_SLEEP; 281 error = 0; 282 283 mps_dprint(sc, MPS_INIT, "%s entered, sleep_flags= %d\n", 284 __func__, sleep_flags); 285 286 while (tries++ < 1200) { 287 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 288 mps_dprint(sc, MPS_INIT, " Doorbell= 0x%x\n", reg); 289 290 /* 291 * Ensure the IOC is ready to talk. If it's not, try 292 * resetting it. 293 */ 294 if (reg & MPI2_DOORBELL_USED) { 295 mps_dprint(sc, MPS_INIT, " Not ready, sending diag " 296 "reset\n"); 297 mps_diag_reset(sc, sleep_flags); 298 DELAY(50000); 299 continue; 300 } 301 302 /* Is the adapter owned by another peer? */ 303 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == 304 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { 305 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC is under the " 306 "control of another peer host, aborting " 307 "initialization.\n"); 308 error = ENXIO; 309 break; 310 } 311 312 state = reg & MPI2_IOC_STATE_MASK; 313 if (state == MPI2_IOC_STATE_READY) { 314 /* Ready to go! */ 315 error = 0; 316 break; 317 } else if (state == MPI2_IOC_STATE_FAULT) { 318 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC in fault " 319 "state 0x%x, resetting\n", 320 state & MPI2_DOORBELL_FAULT_CODE_MASK); 321 mps_diag_reset(sc, sleep_flags); 322 } else if (state == MPI2_IOC_STATE_OPERATIONAL) { 323 /* Need to take ownership */ 324 mps_message_unit_reset(sc, sleep_flags); 325 } else if (state == MPI2_IOC_STATE_RESET) { 326 /* Wait a bit, IOC might be in transition */ 327 mps_dprint(sc, MPS_INIT|MPS_FAULT, 328 "IOC in unexpected reset state\n"); 329 } else { 330 mps_dprint(sc, MPS_INIT|MPS_FAULT, 331 "IOC in unknown state 0x%x\n", state); 332 error = EINVAL; 333 break; 334 } 335 336 /* Wait 50ms for things to settle down. */ 337 DELAY(50000); 338 } 339 340 if (error) 341 mps_dprint(sc, MPS_INIT|MPS_FAULT, 342 "Cannot transition IOC to ready\n"); 343 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 344 345 return (error); 346 } 347 348 static int 349 mps_transition_operational(struct mps_softc *sc) 350 { 351 uint32_t reg, state; 352 int error; 353 354 MPS_FUNCTRACE(sc); 355 356 error = 0; 357 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); 358 mps_dprint(sc, MPS_INIT, "%s entered, Doorbell= 0x%x\n", __func__, reg); 359 360 state = reg & MPI2_IOC_STATE_MASK; 361 if (state != MPI2_IOC_STATE_READY) { 362 mps_dprint(sc, MPS_INIT, "IOC not ready\n"); 363 if ((error = mps_transition_ready(sc)) != 0) { 364 mps_dprint(sc, MPS_INIT|MPS_FAULT, 365 "failed to transition ready, exit\n"); 366 return (error); 367 } 368 } 369 370 error = mps_send_iocinit(sc); 371 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 372 373 return (error); 374 } 375 376 static void 377 mps_resize_queues(struct mps_softc *sc) 378 { 379 int reqcr, prireqcr; 380 381 /* 382 * Size the queues. Since the reply queues always need one free 383 * entry, we'll deduct one reply message here. The LSI documents 384 * suggest instead to add a count to the request queue, but I think 385 * that it's better to deduct from reply queue. 386 */ 387 prireqcr = MAX(1, sc->max_prireqframes); 388 prireqcr = MIN(prireqcr, sc->facts->HighPriorityCredit); 389 390 reqcr = MAX(2, sc->max_reqframes); 391 reqcr = MIN(reqcr, sc->facts->RequestCredit); 392 393 sc->num_reqs = prireqcr + reqcr; 394 sc->num_replies = MIN(sc->max_replyframes + sc->max_evtframes, 395 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; 396 397 /* 398 * Figure out the number of MSIx-based queues. If the firmware or 399 * user has done something crazy and not allowed enough credit for 400 * the queues to be useful then don't enable multi-queue. 401 */ 402 if (sc->facts->MaxMSIxVectors < 2) 403 sc->msi_msgs = 1; 404 405 if (sc->msi_msgs > 1) { 406 sc->msi_msgs = MIN(sc->msi_msgs, mp_ncpus); 407 sc->msi_msgs = MIN(sc->msi_msgs, sc->facts->MaxMSIxVectors); 408 if (sc->num_reqs / sc->msi_msgs < 2) 409 sc->msi_msgs = 1; 410 } 411 412 mps_dprint(sc, MPS_INIT, "Sized queues to q=%d reqs=%d replies=%d\n", 413 sc->msi_msgs, sc->num_reqs, sc->num_replies); 414 } 415 416 /* 417 * This is called during attach and when re-initializing due to a Diag Reset. 418 * IOC Facts is used to allocate many of the structures needed by the driver. 419 * If called from attach, de-allocation is not required because the driver has 420 * not allocated any structures yet, but if called from a Diag Reset, previously 421 * allocated structures based on IOC Facts will need to be freed and re- 422 * allocated bases on the latest IOC Facts. 423 */ 424 static int 425 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching) 426 { 427 int error; 428 Mpi2IOCFactsReply_t saved_facts; 429 uint8_t saved_mode, reallocating; 430 431 mps_dprint(sc, MPS_INIT|MPS_TRACE, "%s entered\n", __func__); 432 433 /* Save old IOC Facts and then only reallocate if Facts have changed */ 434 if (!attaching) { 435 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY)); 436 } 437 438 /* 439 * Get IOC Facts. In all cases throughout this function, panic if doing 440 * a re-initialization and only return the error if attaching so the OS 441 * can handle it. 442 */ 443 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) { 444 if (attaching) { 445 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to get " 446 "IOC Facts with error %d, exit\n", error); 447 return (error); 448 } else { 449 panic("%s failed to get IOC Facts with error %d\n", 450 __func__, error); 451 } 452 } 453 454 MPS_DPRINT_PAGE(sc, MPS_XINFO, iocfacts, sc->facts); 455 456 snprintf(sc->fw_version, sizeof(sc->fw_version), 457 "%02d.%02d.%02d.%02d", 458 sc->facts->FWVersion.Struct.Major, 459 sc->facts->FWVersion.Struct.Minor, 460 sc->facts->FWVersion.Struct.Unit, 461 sc->facts->FWVersion.Struct.Dev); 462 463 mps_dprint(sc, MPS_INFO, "Firmware: %s, Driver: %s\n", sc->fw_version, 464 MPS_DRIVER_VERSION); 465 mps_dprint(sc, MPS_INFO, "IOCCapabilities: %b\n", 466 sc->facts->IOCCapabilities, 467 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" 468 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" 469 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc"); 470 471 /* 472 * If the chip doesn't support event replay then a hard reset will be 473 * required to trigger a full discovery. Do the reset here then 474 * retransition to Ready. A hard reset might have already been done, 475 * but it doesn't hurt to do it again. Only do this if attaching, not 476 * for a Diag Reset. 477 */ 478 if (attaching && ((sc->facts->IOCCapabilities & 479 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0)) { 480 mps_dprint(sc, MPS_INIT, "No event replay, reseting\n"); 481 mps_diag_reset(sc, NO_SLEEP); 482 if ((error = mps_transition_ready(sc)) != 0) { 483 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 484 "transition to ready with error %d, exit\n", 485 error); 486 return (error); 487 } 488 } 489 490 /* 491 * Set flag if IR Firmware is loaded. If the RAID Capability has 492 * changed from the previous IOC Facts, log a warning, but only if 493 * checking this after a Diag Reset and not during attach. 494 */ 495 saved_mode = sc->ir_firmware; 496 if (sc->facts->IOCCapabilities & 497 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) 498 sc->ir_firmware = 1; 499 if (!attaching) { 500 if (sc->ir_firmware != saved_mode) { 501 mps_dprint(sc, MPS_INIT|MPS_FAULT, "new IR/IT mode " 502 "in IOC Facts does not match previous mode\n"); 503 } 504 } 505 506 /* Only deallocate and reallocate if relevant IOC Facts have changed */ 507 reallocating = FALSE; 508 sc->mps_flags &= ~MPS_FLAGS_REALLOCATED; 509 510 if ((!attaching) && 511 ((saved_facts.MsgVersion != sc->facts->MsgVersion) || 512 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) || 513 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) || 514 (saved_facts.RequestCredit != sc->facts->RequestCredit) || 515 (saved_facts.ProductID != sc->facts->ProductID) || 516 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) || 517 (saved_facts.IOCRequestFrameSize != 518 sc->facts->IOCRequestFrameSize) || 519 (saved_facts.MaxTargets != sc->facts->MaxTargets) || 520 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) || 521 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) || 522 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) || 523 (saved_facts.MaxReplyDescriptorPostQueueDepth != 524 sc->facts->MaxReplyDescriptorPostQueueDepth) || 525 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) || 526 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) || 527 (saved_facts.MaxPersistentEntries != 528 sc->facts->MaxPersistentEntries))) { 529 reallocating = TRUE; 530 531 /* Record that we reallocated everything */ 532 sc->mps_flags |= MPS_FLAGS_REALLOCATED; 533 } 534 535 /* 536 * Some things should be done if attaching or re-allocating after a Diag 537 * Reset, but are not needed after a Diag Reset if the FW has not 538 * changed. 539 */ 540 if (attaching || reallocating) { 541 /* 542 * Check if controller supports FW diag buffers and set flag to 543 * enable each type. 544 */ 545 if (sc->facts->IOCCapabilities & 546 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) 547 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE]. 548 enabled = TRUE; 549 if (sc->facts->IOCCapabilities & 550 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) 551 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT]. 552 enabled = TRUE; 553 if (sc->facts->IOCCapabilities & 554 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) 555 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED]. 556 enabled = TRUE; 557 558 /* 559 * Set flag if EEDP is supported and if TLR is supported. 560 */ 561 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) 562 sc->eedp_enabled = TRUE; 563 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) 564 sc->control_TLR = TRUE; 565 566 mps_resize_queues(sc); 567 568 /* 569 * Initialize all Tail Queues 570 */ 571 TAILQ_INIT(&sc->req_list); 572 TAILQ_INIT(&sc->high_priority_req_list); 573 TAILQ_INIT(&sc->chain_list); 574 TAILQ_INIT(&sc->tm_list); 575 } 576 577 /* 578 * If doing a Diag Reset and the FW is significantly different 579 * (reallocating will be set above in IOC Facts comparison), then all 580 * buffers based on the IOC Facts will need to be freed before they are 581 * reallocated. 582 */ 583 if (reallocating) { 584 mps_iocfacts_free(sc); 585 mpssas_realloc_targets(sc, saved_facts.MaxTargets + 586 saved_facts.MaxVolumes); 587 } 588 589 /* 590 * Any deallocation has been completed. Now start reallocating 591 * if needed. Will only need to reallocate if attaching or if the new 592 * IOC Facts are different from the previous IOC Facts after a Diag 593 * Reset. Targets have already been allocated above if needed. 594 */ 595 error = 0; 596 while (attaching || reallocating) { 597 if ((error = mps_alloc_hw_queues(sc)) != 0) 598 break; 599 if ((error = mps_alloc_replies(sc)) != 0) 600 break; 601 if ((error = mps_alloc_requests(sc)) != 0) 602 break; 603 if ((error = mps_alloc_queues(sc)) != 0) 604 break; 605 606 break; 607 } 608 if (error) { 609 mps_dprint(sc, MPS_INIT|MPS_FAULT, 610 "Failed to alloc queues with error %d\n", error); 611 mps_free(sc); 612 return (error); 613 } 614 615 /* Always initialize the queues */ 616 bzero(sc->free_queue, sc->fqdepth * 4); 617 mps_init_queues(sc); 618 619 /* 620 * Always get the chip out of the reset state, but only panic if not 621 * attaching. If attaching and there is an error, that is handled by 622 * the OS. 623 */ 624 error = mps_transition_operational(sc); 625 if (error != 0) { 626 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to " 627 "transition to operational with error %d\n", error); 628 mps_free(sc); 629 return (error); 630 } 631 632 /* 633 * Finish the queue initialization. 634 * These are set here instead of in mps_init_queues() because the 635 * IOC resets these values during the state transition in 636 * mps_transition_operational(). The free index is set to 1 637 * because the corresponding index in the IOC is set to 0, and the 638 * IOC treats the queues as full if both are set to the same value. 639 * Hence the reason that the queue can't hold all of the possible 640 * replies. 641 */ 642 sc->replypostindex = 0; 643 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); 644 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); 645 646 /* 647 * Attach the subsystems so they can prepare their event masks. 648 * XXX Should be dynamic so that IM/IR and user modules can attach 649 */ 650 error = 0; 651 while (attaching) { 652 mps_dprint(sc, MPS_INIT, "Attaching subsystems\n"); 653 if ((error = mps_attach_log(sc)) != 0) 654 break; 655 if ((error = mps_attach_sas(sc)) != 0) 656 break; 657 if ((error = mps_attach_user(sc)) != 0) 658 break; 659 break; 660 } 661 if (error) { 662 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to attach all " 663 "subsystems: error %d\n", error); 664 mps_free(sc); 665 return (error); 666 } 667 668 if ((error = mps_pci_setup_interrupts(sc)) != 0) { 669 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to setup " 670 "interrupts\n"); 671 mps_free(sc); 672 return (error); 673 } 674 675 /* 676 * Set flag if this is a WD controller. This shouldn't ever change, but 677 * reset it after a Diag Reset, just in case. 678 */ 679 sc->WD_available = FALSE; 680 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200) 681 sc->WD_available = TRUE; 682 683 return (error); 684 } 685 686 /* 687 * This is called if memory is being free (during detach for example) and when 688 * buffers need to be reallocated due to a Diag Reset. 689 */ 690 static void 691 mps_iocfacts_free(struct mps_softc *sc) 692 { 693 struct mps_command *cm; 694 int i; 695 696 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 697 698 if (sc->free_busaddr != 0) 699 bus_dmamap_unload(sc->queues_dmat, sc->queues_map); 700 if (sc->free_queue != NULL) 701 bus_dmamem_free(sc->queues_dmat, sc->free_queue, 702 sc->queues_map); 703 if (sc->queues_dmat != NULL) 704 bus_dma_tag_destroy(sc->queues_dmat); 705 706 if (sc->chain_busaddr != 0) 707 bus_dmamap_unload(sc->chain_dmat, sc->chain_map); 708 if (sc->chain_frames != NULL) 709 bus_dmamem_free(sc->chain_dmat, sc->chain_frames, 710 sc->chain_map); 711 if (sc->chain_dmat != NULL) 712 bus_dma_tag_destroy(sc->chain_dmat); 713 714 if (sc->sense_busaddr != 0) 715 bus_dmamap_unload(sc->sense_dmat, sc->sense_map); 716 if (sc->sense_frames != NULL) 717 bus_dmamem_free(sc->sense_dmat, sc->sense_frames, 718 sc->sense_map); 719 if (sc->sense_dmat != NULL) 720 bus_dma_tag_destroy(sc->sense_dmat); 721 722 if (sc->reply_busaddr != 0) 723 bus_dmamap_unload(sc->reply_dmat, sc->reply_map); 724 if (sc->reply_frames != NULL) 725 bus_dmamem_free(sc->reply_dmat, sc->reply_frames, 726 sc->reply_map); 727 if (sc->reply_dmat != NULL) 728 bus_dma_tag_destroy(sc->reply_dmat); 729 730 if (sc->req_busaddr != 0) 731 bus_dmamap_unload(sc->req_dmat, sc->req_map); 732 if (sc->req_frames != NULL) 733 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); 734 if (sc->req_dmat != NULL) 735 bus_dma_tag_destroy(sc->req_dmat); 736 737 if (sc->chains != NULL) 738 free(sc->chains, M_MPT2); 739 if (sc->commands != NULL) { 740 for (i = 1; i < sc->num_reqs; i++) { 741 cm = &sc->commands[i]; 742 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); 743 } 744 free(sc->commands, M_MPT2); 745 } 746 if (sc->buffer_dmat != NULL) 747 bus_dma_tag_destroy(sc->buffer_dmat); 748 749 mps_pci_free_interrupts(sc); 750 free(sc->queues, M_MPT2); 751 sc->queues = NULL; 752 } 753 754 /* 755 * The terms diag reset and hard reset are used interchangeably in the MPI 756 * docs to mean resetting the controller chip. In this code diag reset 757 * cleans everything up, and the hard reset function just sends the reset 758 * sequence to the chip. This should probably be refactored so that every 759 * subsystem gets a reset notification of some sort, and can clean up 760 * appropriately. 761 */ 762 int 763 mps_reinit(struct mps_softc *sc) 764 { 765 int error; 766 struct mpssas_softc *sassc; 767 768 sassc = sc->sassc; 769 770 MPS_FUNCTRACE(sc); 771 772 mtx_assert(&sc->mps_mtx, MA_OWNED); 773 774 mps_dprint(sc, MPS_INIT|MPS_INFO, "Reinitializing controller\n"); 775 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) { 776 mps_dprint(sc, MPS_INIT, "Reset already in progress\n"); 777 return 0; 778 } 779 780 /* make sure the completion callbacks can recognize they're getting 781 * a NULL cm_reply due to a reset. 782 */ 783 sc->mps_flags |= MPS_FLAGS_DIAGRESET; 784 785 /* 786 * Mask interrupts here. 787 */ 788 mps_dprint(sc, MPS_INIT, "masking interrupts and resetting\n"); 789 mps_mask_intr(sc); 790 791 error = mps_diag_reset(sc, CAN_SLEEP); 792 if (error != 0) { 793 /* XXXSL No need to panic here */ 794 panic("%s hard reset failed with error %d\n", 795 __func__, error); 796 } 797 798 /* Restore the PCI state, including the MSI-X registers */ 799 mps_pci_restore(sc); 800 801 /* Give the I/O subsystem special priority to get itself prepared */ 802 mpssas_handle_reinit(sc); 803 804 /* 805 * Get IOC Facts and allocate all structures based on this information. 806 * The attach function will also call mps_iocfacts_allocate at startup. 807 * If relevant values have changed in IOC Facts, this function will free 808 * all of the memory based on IOC Facts and reallocate that memory. 809 */ 810 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) { 811 panic("%s IOC Facts based allocation failed with error %d\n", 812 __func__, error); 813 } 814 815 /* 816 * Mapping structures will be re-allocated after getting IOC Page8, so 817 * free these structures here. 818 */ 819 mps_mapping_exit(sc); 820 821 /* 822 * The static page function currently read is IOC Page8. Others can be 823 * added in future. It's possible that the values in IOC Page8 have 824 * changed after a Diag Reset due to user modification, so always read 825 * these. Interrupts are masked, so unmask them before getting config 826 * pages. 827 */ 828 mps_unmask_intr(sc); 829 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET; 830 mps_base_static_config_pages(sc); 831 832 /* 833 * Some mapping info is based in IOC Page8 data, so re-initialize the 834 * mapping tables. 835 */ 836 mps_mapping_initialize(sc); 837 838 /* 839 * Restart will reload the event masks clobbered by the reset, and 840 * then enable the port. 841 */ 842 mps_reregister_events(sc); 843 844 /* the end of discovery will release the simq, so we're done. */ 845 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Finished sc %p post %u free %u\n", 846 sc, sc->replypostindex, sc->replyfreeindex); 847 848 mpssas_release_simq_reinit(sassc); 849 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 850 851 return 0; 852 } 853 854 /* Wait for the chip to ACK a word that we've put into its FIFO 855 * Wait for <timeout> seconds. In single loop wait for busy loop 856 * for 500 microseconds. 857 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds. 858 * */ 859 static int 860 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag) 861 { 862 863 u32 cntdn, count; 864 u32 int_status; 865 u32 doorbell; 866 867 count = 0; 868 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 869 do { 870 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 871 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 872 mps_dprint(sc, MPS_TRACE, 873 "%s: successful count(%d), timeout(%d)\n", 874 __func__, count, timeout); 875 return 0; 876 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 877 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET); 878 if ((doorbell & MPI2_IOC_STATE_MASK) == 879 MPI2_IOC_STATE_FAULT) { 880 mps_dprint(sc, MPS_FAULT, 881 "fault_state(0x%04x)!\n", doorbell); 882 return (EFAULT); 883 } 884 } else if (int_status == 0xFFFFFFFF) 885 goto out; 886 887 /* If it can sleep, sleep for 1 milisecond, else busy loop for 888 * 0.5 milisecond */ 889 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) 890 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0, 891 "mpsdba", hz/1000); 892 else if (sleep_flag == CAN_SLEEP) 893 pause("mpsdba", hz/1000); 894 else 895 DELAY(500); 896 count++; 897 } while (--cntdn); 898 899 out: 900 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), " 901 "int_status(%x)!\n", __func__, count, int_status); 902 return (ETIMEDOUT); 903 904 } 905 906 /* Wait for the chip to signal that the next word in its FIFO can be fetched */ 907 static int 908 mps_wait_db_int(struct mps_softc *sc) 909 { 910 int retry; 911 912 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { 913 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & 914 MPI2_HIS_IOC2SYS_DB_STATUS) != 0) 915 return (0); 916 DELAY(2000); 917 } 918 return (ETIMEDOUT); 919 } 920 921 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */ 922 static int 923 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, 924 int req_sz, int reply_sz, int timeout) 925 { 926 uint32_t *data32; 927 uint16_t *data16; 928 int i, count, ioc_sz, residual; 929 int sleep_flags = CAN_SLEEP; 930 931 if (curthread->td_no_sleeping != 0) 932 sleep_flags = NO_SLEEP; 933 934 /* Step 1 */ 935 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 936 937 /* Step 2 */ 938 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 939 return (EBUSY); 940 941 /* Step 3 942 * Announce that a message is coming through the doorbell. Messages 943 * are pushed at 32bit words, so round up if needed. 944 */ 945 count = (req_sz + 3) / 4; 946 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, 947 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 948 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); 949 950 /* Step 4 */ 951 if (mps_wait_db_int(sc) || 952 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { 953 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n"); 954 return (ENXIO); 955 } 956 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 957 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 958 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n"); 959 return (ENXIO); 960 } 961 962 /* Step 5 */ 963 /* Clock out the message data synchronously in 32-bit dwords*/ 964 data32 = (uint32_t *)req; 965 for (i = 0; i < count; i++) { 966 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i])); 967 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) { 968 mps_dprint(sc, MPS_FAULT, 969 "Timeout while writing doorbell\n"); 970 return (ENXIO); 971 } 972 } 973 974 /* Step 6 */ 975 /* Clock in the reply in 16-bit words. The total length of the 976 * message is always in the 4th byte, so clock out the first 2 words 977 * manually, then loop the rest. 978 */ 979 data16 = (uint16_t *)reply; 980 if (mps_wait_db_int(sc) != 0) { 981 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n"); 982 return (ENXIO); 983 } 984 data16[0] = 985 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 986 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 987 if (mps_wait_db_int(sc) != 0) { 988 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n"); 989 return (ENXIO); 990 } 991 data16[1] = 992 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; 993 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 994 995 /* Number of 32bit words in the message */ 996 ioc_sz = reply->MsgLength; 997 998 /* 999 * Figure out how many 16bit words to clock in without overrunning. 1000 * The precision loss with dividing reply_sz can safely be 1001 * ignored because the messages can only be multiples of 32bits. 1002 */ 1003 residual = 0; 1004 count = MIN((reply_sz / 4), ioc_sz) * 2; 1005 if (count < ioc_sz * 2) { 1006 residual = ioc_sz * 2 - count; 1007 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d " 1008 "residual message words\n", residual); 1009 } 1010 1011 for (i = 2; i < count; i++) { 1012 if (mps_wait_db_int(sc) != 0) { 1013 mps_dprint(sc, MPS_FAULT, 1014 "Timeout reading doorbell %d\n", i); 1015 return (ENXIO); 1016 } 1017 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) & 1018 MPI2_DOORBELL_DATA_MASK; 1019 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1020 } 1021 1022 /* 1023 * Pull out residual words that won't fit into the provided buffer. 1024 * This keeps the chip from hanging due to a driver programming 1025 * error. 1026 */ 1027 while (residual--) { 1028 if (mps_wait_db_int(sc) != 0) { 1029 mps_dprint(sc, MPS_FAULT, 1030 "Timeout reading doorbell\n"); 1031 return (ENXIO); 1032 } 1033 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET); 1034 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1035 } 1036 1037 /* Step 7 */ 1038 if (mps_wait_db_int(sc) != 0) { 1039 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n"); 1040 return (ENXIO); 1041 } 1042 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) 1043 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n"); 1044 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); 1045 1046 return (0); 1047 } 1048 1049 static void 1050 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm) 1051 { 1052 reply_descriptor rd; 1053 MPS_FUNCTRACE(sc); 1054 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n", 1055 cm->cm_desc.Default.SMID, cm, cm->cm_ccb); 1056 1057 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN)) 1058 mtx_assert(&sc->mps_mtx, MA_OWNED); 1059 1060 if (++sc->io_cmds_active > sc->io_cmds_highwater) 1061 sc->io_cmds_highwater++; 1062 rd.u.low = cm->cm_desc.Words.Low; 1063 rd.u.high = cm->cm_desc.Words.High; 1064 rd.word = htole64(rd.word); 1065 /* TODO-We may need to make below regwrite atomic */ 1066 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, 1067 rd.u.low); 1068 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, 1069 rd.u.high); 1070 } 1071 1072 /* 1073 * Just the FACTS, ma'am. 1074 */ 1075 static int 1076 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts) 1077 { 1078 MPI2_DEFAULT_REPLY *reply; 1079 MPI2_IOC_FACTS_REQUEST request; 1080 int error, req_sz, reply_sz; 1081 1082 MPS_FUNCTRACE(sc); 1083 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1084 1085 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); 1086 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); 1087 reply = (MPI2_DEFAULT_REPLY *)facts; 1088 1089 bzero(&request, req_sz); 1090 request.Function = MPI2_FUNCTION_IOC_FACTS; 1091 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5); 1092 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1093 1094 return (error); 1095 } 1096 1097 static int 1098 mps_send_iocinit(struct mps_softc *sc) 1099 { 1100 MPI2_IOC_INIT_REQUEST init; 1101 MPI2_DEFAULT_REPLY reply; 1102 int req_sz, reply_sz, error; 1103 struct timeval now; 1104 uint64_t time_in_msec; 1105 1106 MPS_FUNCTRACE(sc); 1107 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1108 1109 req_sz = sizeof(MPI2_IOC_INIT_REQUEST); 1110 reply_sz = sizeof(MPI2_IOC_INIT_REPLY); 1111 bzero(&init, req_sz); 1112 bzero(&reply, reply_sz); 1113 1114 /* 1115 * Fill in the init block. Note that most addresses are 1116 * deliberately in the lower 32bits of memory. This is a micro- 1117 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. 1118 */ 1119 init.Function = MPI2_FUNCTION_IOC_INIT; 1120 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 1121 init.MsgVersion = htole16(MPI2_VERSION); 1122 init.HeaderVersion = htole16(MPI2_HEADER_VERSION); 1123 init.SystemRequestFrameSize = htole16(sc->facts->IOCRequestFrameSize); 1124 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth); 1125 init.ReplyFreeQueueDepth = htole16(sc->fqdepth); 1126 init.SenseBufferAddressHigh = 0; 1127 init.SystemReplyAddressHigh = 0; 1128 init.SystemRequestFrameBaseAddress.High = 0; 1129 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr); 1130 init.ReplyDescriptorPostQueueAddress.High = 0; 1131 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr); 1132 init.ReplyFreeQueueAddress.High = 0; 1133 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr); 1134 getmicrotime(&now); 1135 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000); 1136 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF); 1137 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF); 1138 1139 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); 1140 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 1141 error = ENXIO; 1142 1143 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus); 1144 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1145 return (error); 1146 } 1147 1148 void 1149 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1150 { 1151 bus_addr_t *addr; 1152 1153 addr = arg; 1154 *addr = segs[0].ds_addr; 1155 } 1156 1157 static int 1158 mps_alloc_queues(struct mps_softc *sc) 1159 { 1160 struct mps_queue *q; 1161 int nq, i; 1162 1163 nq = sc->msi_msgs; 1164 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Allocating %d I/O queues\n", nq); 1165 1166 sc->queues = malloc(sizeof(struct mps_queue) * nq, M_MPT2, 1167 M_NOWAIT|M_ZERO); 1168 if (sc->queues == NULL) 1169 return (ENOMEM); 1170 1171 for (i = 0; i < nq; i++) { 1172 q = &sc->queues[i]; 1173 mps_dprint(sc, MPS_INIT, "Configuring queue %d %p\n", i, q); 1174 q->sc = sc; 1175 q->qnum = i; 1176 } 1177 1178 return (0); 1179 } 1180 1181 static int 1182 mps_alloc_hw_queues(struct mps_softc *sc) 1183 { 1184 bus_addr_t queues_busaddr; 1185 uint8_t *queues; 1186 int qsize, fqsize, pqsize; 1187 1188 /* 1189 * The reply free queue contains 4 byte entries in multiples of 16 and 1190 * aligned on a 16 byte boundary. There must always be an unused entry. 1191 * This queue supplies fresh reply frames for the firmware to use. 1192 * 1193 * The reply descriptor post queue contains 8 byte entries in 1194 * multiples of 16 and aligned on a 16 byte boundary. This queue 1195 * contains filled-in reply frames sent from the firmware to the host. 1196 * 1197 * These two queues are allocated together for simplicity. 1198 */ 1199 sc->fqdepth = roundup2(sc->num_replies + 1, 16); 1200 sc->pqdepth = roundup2(sc->num_replies + 1, 16); 1201 fqsize= sc->fqdepth * 4; 1202 pqsize = sc->pqdepth * 8; 1203 qsize = fqsize + pqsize; 1204 1205 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1206 16, 0, /* algnmnt, boundary */ 1207 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1208 BUS_SPACE_MAXADDR, /* highaddr */ 1209 NULL, NULL, /* filter, filterarg */ 1210 qsize, /* maxsize */ 1211 1, /* nsegments */ 1212 qsize, /* maxsegsize */ 1213 0, /* flags */ 1214 NULL, NULL, /* lockfunc, lockarg */ 1215 &sc->queues_dmat)) { 1216 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues DMA tag\n"); 1217 return (ENOMEM); 1218 } 1219 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, 1220 &sc->queues_map)) { 1221 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues memory\n"); 1222 return (ENOMEM); 1223 } 1224 bzero(queues, qsize); 1225 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, 1226 mps_memaddr_cb, &queues_busaddr, 0); 1227 1228 sc->free_queue = (uint32_t *)queues; 1229 sc->free_busaddr = queues_busaddr; 1230 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); 1231 sc->post_busaddr = queues_busaddr + fqsize; 1232 1233 return (0); 1234 } 1235 1236 static int 1237 mps_alloc_replies(struct mps_softc *sc) 1238 { 1239 int rsize, num_replies; 1240 1241 /* 1242 * sc->num_replies should be one less than sc->fqdepth. We need to 1243 * allocate space for sc->fqdepth replies, but only sc->num_replies 1244 * replies can be used at once. 1245 */ 1246 num_replies = max(sc->fqdepth, sc->num_replies); 1247 1248 rsize = sc->facts->ReplyFrameSize * num_replies * 4; 1249 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1250 4, 0, /* algnmnt, boundary */ 1251 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1252 BUS_SPACE_MAXADDR, /* highaddr */ 1253 NULL, NULL, /* filter, filterarg */ 1254 rsize, /* maxsize */ 1255 1, /* nsegments */ 1256 rsize, /* maxsegsize */ 1257 0, /* flags */ 1258 NULL, NULL, /* lockfunc, lockarg */ 1259 &sc->reply_dmat)) { 1260 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies DMA tag\n"); 1261 return (ENOMEM); 1262 } 1263 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, 1264 BUS_DMA_NOWAIT, &sc->reply_map)) { 1265 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies memory\n"); 1266 return (ENOMEM); 1267 } 1268 bzero(sc->reply_frames, rsize); 1269 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, 1270 mps_memaddr_cb, &sc->reply_busaddr, 0); 1271 1272 return (0); 1273 } 1274 1275 static int 1276 mps_alloc_requests(struct mps_softc *sc) 1277 { 1278 struct mps_command *cm; 1279 struct mps_chain *chain; 1280 int i, rsize, nsegs; 1281 1282 rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4; 1283 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1284 16, 0, /* algnmnt, boundary */ 1285 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1286 BUS_SPACE_MAXADDR, /* highaddr */ 1287 NULL, NULL, /* filter, filterarg */ 1288 rsize, /* maxsize */ 1289 1, /* nsegments */ 1290 rsize, /* maxsegsize */ 1291 0, /* flags */ 1292 NULL, NULL, /* lockfunc, lockarg */ 1293 &sc->req_dmat)) { 1294 mps_dprint(sc, MPS_ERROR, "Cannot allocate request DMA tag\n"); 1295 return (ENOMEM); 1296 } 1297 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, 1298 BUS_DMA_NOWAIT, &sc->req_map)) { 1299 mps_dprint(sc, MPS_ERROR, "Cannot allocate request memory\n"); 1300 return (ENOMEM); 1301 } 1302 bzero(sc->req_frames, rsize); 1303 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, 1304 mps_memaddr_cb, &sc->req_busaddr, 0); 1305 1306 rsize = sc->facts->IOCRequestFrameSize * sc->max_chains * 4; 1307 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1308 16, 0, /* algnmnt, boundary */ 1309 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1310 BUS_SPACE_MAXADDR, /* highaddr */ 1311 NULL, NULL, /* filter, filterarg */ 1312 rsize, /* maxsize */ 1313 1, /* nsegments */ 1314 rsize, /* maxsegsize */ 1315 0, /* flags */ 1316 NULL, NULL, /* lockfunc, lockarg */ 1317 &sc->chain_dmat)) { 1318 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain DMA tag\n"); 1319 return (ENOMEM); 1320 } 1321 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, 1322 BUS_DMA_NOWAIT, &sc->chain_map)) { 1323 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n"); 1324 return (ENOMEM); 1325 } 1326 bzero(sc->chain_frames, rsize); 1327 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize, 1328 mps_memaddr_cb, &sc->chain_busaddr, 0); 1329 1330 rsize = MPS_SENSE_LEN * sc->num_reqs; 1331 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1332 1, 0, /* algnmnt, boundary */ 1333 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ 1334 BUS_SPACE_MAXADDR, /* highaddr */ 1335 NULL, NULL, /* filter, filterarg */ 1336 rsize, /* maxsize */ 1337 1, /* nsegments */ 1338 rsize, /* maxsegsize */ 1339 0, /* flags */ 1340 NULL, NULL, /* lockfunc, lockarg */ 1341 &sc->sense_dmat)) { 1342 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense DMA tag\n"); 1343 return (ENOMEM); 1344 } 1345 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, 1346 BUS_DMA_NOWAIT, &sc->sense_map)) { 1347 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense memory\n"); 1348 return (ENOMEM); 1349 } 1350 bzero(sc->sense_frames, rsize); 1351 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, 1352 mps_memaddr_cb, &sc->sense_busaddr, 0); 1353 1354 sc->chains = malloc(sizeof(struct mps_chain) * sc->max_chains, M_MPT2, 1355 M_WAITOK | M_ZERO); 1356 if(!sc->chains) { 1357 mps_dprint(sc, MPS_ERROR, "Cannot allocate chains memory\n"); 1358 return (ENOMEM); 1359 } 1360 for (i = 0; i < sc->max_chains; i++) { 1361 chain = &sc->chains[i]; 1362 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames + 1363 i * sc->facts->IOCRequestFrameSize * 4); 1364 chain->chain_busaddr = sc->chain_busaddr + 1365 i * sc->facts->IOCRequestFrameSize * 4; 1366 mps_free_chain(sc, chain); 1367 sc->chain_free_lowwater++; 1368 } 1369 1370 /* XXX Need to pick a more precise value */ 1371 nsegs = (MAXPHYS / PAGE_SIZE) + 1; 1372 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 1373 1, 0, /* algnmnt, boundary */ 1374 BUS_SPACE_MAXADDR, /* lowaddr */ 1375 BUS_SPACE_MAXADDR, /* highaddr */ 1376 NULL, NULL, /* filter, filterarg */ 1377 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 1378 nsegs, /* nsegments */ 1379 BUS_SPACE_MAXSIZE_24BIT,/* maxsegsize */ 1380 BUS_DMA_ALLOCNOW, /* flags */ 1381 busdma_lock_mutex, /* lockfunc */ 1382 &sc->mps_mtx, /* lockarg */ 1383 &sc->buffer_dmat)) { 1384 mps_dprint(sc, MPS_ERROR, "Cannot allocate buffer DMA tag\n"); 1385 return (ENOMEM); 1386 } 1387 1388 /* 1389 * SMID 0 cannot be used as a free command per the firmware spec. 1390 * Just drop that command instead of risking accounting bugs. 1391 */ 1392 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs, 1393 M_MPT2, M_WAITOK | M_ZERO); 1394 if(!sc->commands) { 1395 mps_dprint(sc, MPS_ERROR, "Cannot allocate command memory\n"); 1396 return (ENOMEM); 1397 } 1398 for (i = 1; i < sc->num_reqs; i++) { 1399 cm = &sc->commands[i]; 1400 cm->cm_req = sc->req_frames + 1401 i * sc->facts->IOCRequestFrameSize * 4; 1402 cm->cm_req_busaddr = sc->req_busaddr + 1403 i * sc->facts->IOCRequestFrameSize * 4; 1404 cm->cm_sense = &sc->sense_frames[i]; 1405 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN; 1406 cm->cm_desc.Default.SMID = i; 1407 cm->cm_sc = sc; 1408 TAILQ_INIT(&cm->cm_chain_list); 1409 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0); 1410 1411 /* XXX Is a failure here a critical problem? */ 1412 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0) 1413 if (i <= sc->facts->HighPriorityCredit) 1414 mps_free_high_priority_command(sc, cm); 1415 else 1416 mps_free_command(sc, cm); 1417 else { 1418 panic("failed to allocate command %d\n", i); 1419 sc->num_reqs = i; 1420 break; 1421 } 1422 } 1423 1424 return (0); 1425 } 1426 1427 static int 1428 mps_init_queues(struct mps_softc *sc) 1429 { 1430 int i; 1431 1432 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); 1433 1434 /* 1435 * According to the spec, we need to use one less reply than we 1436 * have space for on the queue. So sc->num_replies (the number we 1437 * use) should be less than sc->fqdepth (allocated size). 1438 */ 1439 if (sc->num_replies >= sc->fqdepth) 1440 return (EINVAL); 1441 1442 /* 1443 * Initialize all of the free queue entries. 1444 */ 1445 for (i = 0; i < sc->fqdepth; i++) 1446 sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4); 1447 sc->replyfreeindex = sc->num_replies; 1448 1449 return (0); 1450 } 1451 1452 /* Get the driver parameter tunables. Lowest priority are the driver defaults. 1453 * Next are the global settings, if they exist. Highest are the per-unit 1454 * settings, if they exist. 1455 */ 1456 void 1457 mps_get_tunables(struct mps_softc *sc) 1458 { 1459 char tmpstr[80], mps_debug[80]; 1460 1461 /* XXX default to some debugging for now */ 1462 sc->mps_debug = MPS_INFO|MPS_FAULT; 1463 sc->disable_msix = 0; 1464 sc->disable_msi = 0; 1465 sc->max_msix = MPS_MSIX_MAX; 1466 sc->max_chains = MPS_CHAIN_FRAMES; 1467 sc->max_io_pages = MPS_MAXIO_PAGES; 1468 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD; 1469 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; 1470 sc->use_phynum = 1; 1471 sc->max_reqframes = MPS_REQ_FRAMES; 1472 sc->max_prireqframes = MPS_PRI_REQ_FRAMES; 1473 sc->max_replyframes = MPS_REPLY_FRAMES; 1474 sc->max_evtframes = MPS_EVT_REPLY_FRAMES; 1475 1476 /* 1477 * Grab the global variables. 1478 */ 1479 bzero(mps_debug, 80); 1480 if (TUNABLE_STR_FETCH("hw.mps.debug_level", mps_debug, 80) != 0) 1481 mps_parse_debug(sc, mps_debug); 1482 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix); 1483 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi); 1484 TUNABLE_INT_FETCH("hw.mps.max_msix", &sc->max_msix); 1485 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains); 1486 TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages); 1487 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu); 1488 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time); 1489 TUNABLE_INT_FETCH("hw.mps.use_phy_num", &sc->use_phynum); 1490 TUNABLE_INT_FETCH("hw.mps.max_reqframes", &sc->max_reqframes); 1491 TUNABLE_INT_FETCH("hw.mps.max_prireqframes", &sc->max_prireqframes); 1492 TUNABLE_INT_FETCH("hw.mps.max_replyframes", &sc->max_replyframes); 1493 TUNABLE_INT_FETCH("hw.mps.max_evtframes", &sc->max_evtframes); 1494 1495 /* Grab the unit-instance variables */ 1496 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level", 1497 device_get_unit(sc->mps_dev)); 1498 bzero(mps_debug, 80); 1499 if (TUNABLE_STR_FETCH(tmpstr, mps_debug, 80) != 0) 1500 mps_parse_debug(sc, mps_debug); 1501 1502 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix", 1503 device_get_unit(sc->mps_dev)); 1504 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); 1505 1506 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi", 1507 device_get_unit(sc->mps_dev)); 1508 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi); 1509 1510 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_msix", 1511 device_get_unit(sc->mps_dev)); 1512 TUNABLE_INT_FETCH(tmpstr, &sc->max_msix); 1513 1514 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains", 1515 device_get_unit(sc->mps_dev)); 1516 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); 1517 1518 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages", 1519 device_get_unit(sc->mps_dev)); 1520 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages); 1521 1522 bzero(sc->exclude_ids, sizeof(sc->exclude_ids)); 1523 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids", 1524 device_get_unit(sc->mps_dev)); 1525 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); 1526 1527 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu", 1528 device_get_unit(sc->mps_dev)); 1529 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); 1530 1531 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time", 1532 device_get_unit(sc->mps_dev)); 1533 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); 1534 1535 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.use_phy_num", 1536 device_get_unit(sc->mps_dev)); 1537 TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum); 1538 1539 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_reqframes", 1540 device_get_unit(sc->mps_dev)); 1541 TUNABLE_INT_FETCH(tmpstr, &sc->max_reqframes); 1542 1543 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_prireqframes", 1544 device_get_unit(sc->mps_dev)); 1545 TUNABLE_INT_FETCH(tmpstr, &sc->max_prireqframes); 1546 1547 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_replyframes", 1548 device_get_unit(sc->mps_dev)); 1549 TUNABLE_INT_FETCH(tmpstr, &sc->max_replyframes); 1550 1551 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_evtframes", 1552 device_get_unit(sc->mps_dev)); 1553 TUNABLE_INT_FETCH(tmpstr, &sc->max_evtframes); 1554 1555 } 1556 1557 static void 1558 mps_setup_sysctl(struct mps_softc *sc) 1559 { 1560 struct sysctl_ctx_list *sysctl_ctx = NULL; 1561 struct sysctl_oid *sysctl_tree = NULL; 1562 char tmpstr[80], tmpstr2[80]; 1563 1564 /* 1565 * Setup the sysctl variable so the user can change the debug level 1566 * on the fly. 1567 */ 1568 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d", 1569 device_get_unit(sc->mps_dev)); 1570 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev)); 1571 1572 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev); 1573 if (sysctl_ctx != NULL) 1574 sysctl_tree = device_get_sysctl_tree(sc->mps_dev); 1575 1576 if (sysctl_tree == NULL) { 1577 sysctl_ctx_init(&sc->sysctl_ctx); 1578 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 1579 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2, 1580 CTLFLAG_RD, 0, tmpstr); 1581 if (sc->sysctl_tree == NULL) 1582 return; 1583 sysctl_ctx = &sc->sysctl_ctx; 1584 sysctl_tree = sc->sysctl_tree; 1585 } 1586 1587 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1588 OID_AUTO, "debug_level", CTLTYPE_STRING | CTLFLAG_RW |CTLFLAG_MPSAFE, 1589 sc, 0, mps_debug_sysctl, "A", "mps debug level"); 1590 1591 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1592 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, 1593 "Disable the use of MSI-X interrupts"); 1594 1595 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1596 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0, 1597 "Disable the use of MSI interrupts"); 1598 1599 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1600 OID_AUTO, "max_msix", CTLFLAG_RD, &sc->max_msix, 0, 1601 "User-defined maximum number of MSIX queues"); 1602 1603 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1604 OID_AUTO, "msix_msgs", CTLFLAG_RD, &sc->msi_msgs, 0, 1605 "Negotiated number of MSIX queues"); 1606 1607 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1608 OID_AUTO, "max_reqframes", CTLFLAG_RD, &sc->max_reqframes, 0, 1609 "Total number of allocated request frames"); 1610 1611 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1612 OID_AUTO, "max_prireqframes", CTLFLAG_RD, &sc->max_prireqframes, 0, 1613 "Total number of allocated high priority request frames"); 1614 1615 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1616 OID_AUTO, "max_replyframes", CTLFLAG_RD, &sc->max_replyframes, 0, 1617 "Total number of allocated reply frames"); 1618 1619 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1620 OID_AUTO, "max_evtframes", CTLFLAG_RD, &sc->max_evtframes, 0, 1621 "Total number of event frames allocated"); 1622 1623 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1624 OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version, 1625 strlen(sc->fw_version), "firmware version"); 1626 1627 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1628 OID_AUTO, "driver_version", CTLFLAG_RW, MPS_DRIVER_VERSION, 1629 strlen(MPS_DRIVER_VERSION), "driver version"); 1630 1631 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1632 OID_AUTO, "io_cmds_active", CTLFLAG_RD, 1633 &sc->io_cmds_active, 0, "number of currently active commands"); 1634 1635 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1636 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, 1637 &sc->io_cmds_highwater, 0, "maximum active commands seen"); 1638 1639 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1640 OID_AUTO, "chain_free", CTLFLAG_RD, 1641 &sc->chain_free, 0, "number of free chain elements"); 1642 1643 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1644 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, 1645 &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); 1646 1647 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1648 OID_AUTO, "max_chains", CTLFLAG_RD, 1649 &sc->max_chains, 0,"maximum chain frames that will be allocated"); 1650 1651 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1652 OID_AUTO, "max_io_pages", CTLFLAG_RD, 1653 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use " 1654 "IOCFacts)"); 1655 1656 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1657 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, 1658 "enable SSU to SATA SSD/HDD at shutdown"); 1659 1660 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1661 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, 1662 &sc->chain_alloc_fail, "chain allocation failures"); 1663 1664 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1665 OID_AUTO, "spinup_wait_time", CTLFLAG_RD, 1666 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " 1667 "spinup after SATA ID error"); 1668 1669 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1670 OID_AUTO, "mapping_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1671 mps_mapping_dump, "A", "Mapping Table Dump"); 1672 1673 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1674 OID_AUTO, "encl_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0, 1675 mps_mapping_encl_dump, "A", "Enclosure Table Dump"); 1676 1677 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), 1678 OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0, 1679 "Use the phy number for enumeration"); 1680 } 1681 1682 static struct mps_debug_string { 1683 char *name; 1684 int flag; 1685 } mps_debug_strings[] = { 1686 {"info", MPS_INFO}, 1687 {"fault", MPS_FAULT}, 1688 {"event", MPS_EVENT}, 1689 {"log", MPS_LOG}, 1690 {"recovery", MPS_RECOVERY}, 1691 {"error", MPS_ERROR}, 1692 {"init", MPS_INIT}, 1693 {"xinfo", MPS_XINFO}, 1694 {"user", MPS_USER}, 1695 {"mapping", MPS_MAPPING}, 1696 {"trace", MPS_TRACE} 1697 }; 1698 1699 enum mps_debug_level_combiner { 1700 COMB_NONE, 1701 COMB_ADD, 1702 COMB_SUB 1703 }; 1704 1705 static int 1706 mps_debug_sysctl(SYSCTL_HANDLER_ARGS) 1707 { 1708 struct mps_softc *sc; 1709 struct mps_debug_string *string; 1710 struct sbuf *sbuf; 1711 char *buffer; 1712 size_t sz; 1713 int i, len, debug, error; 1714 1715 sc = (struct mps_softc *)arg1; 1716 1717 error = sysctl_wire_old_buffer(req, 0); 1718 if (error != 0) 1719 return (error); 1720 1721 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req); 1722 debug = sc->mps_debug; 1723 1724 sbuf_printf(sbuf, "%#x", debug); 1725 1726 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1727 for (i = 0; i < sz; i++) { 1728 string = &mps_debug_strings[i]; 1729 if (debug & string->flag) 1730 sbuf_printf(sbuf, ",%s", string->name); 1731 } 1732 1733 error = sbuf_finish(sbuf); 1734 sbuf_delete(sbuf); 1735 1736 if (error || req->newptr == NULL) 1737 return (error); 1738 1739 len = req->newlen - req->newidx; 1740 if (len == 0) 1741 return (0); 1742 1743 buffer = malloc(len, M_MPT2, M_ZERO|M_WAITOK); 1744 error = SYSCTL_IN(req, buffer, len); 1745 1746 mps_parse_debug(sc, buffer); 1747 1748 free(buffer, M_MPT2); 1749 return (error); 1750 } 1751 1752 static void 1753 mps_parse_debug(struct mps_softc *sc, char *list) 1754 { 1755 struct mps_debug_string *string; 1756 enum mps_debug_level_combiner op; 1757 char *token, *endtoken; 1758 size_t sz; 1759 int flags, i; 1760 1761 if (list == NULL || *list == '\0') 1762 return; 1763 1764 if (*list == '+') { 1765 op = COMB_ADD; 1766 list++; 1767 } else if (*list == '-') { 1768 op = COMB_SUB; 1769 list++; 1770 } else 1771 op = COMB_NONE; 1772 if (*list == '\0') 1773 return; 1774 1775 flags = 0; 1776 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]); 1777 while ((token = strsep(&list, ":,")) != NULL) { 1778 1779 /* Handle integer flags */ 1780 flags |= strtol(token, &endtoken, 0); 1781 if (token != endtoken) 1782 continue; 1783 1784 /* Handle text flags */ 1785 for (i = 0; i < sz; i++) { 1786 string = &mps_debug_strings[i]; 1787 if (strcasecmp(token, string->name) == 0) { 1788 flags |= string->flag; 1789 break; 1790 } 1791 } 1792 } 1793 1794 switch (op) { 1795 case COMB_NONE: 1796 sc->mps_debug = flags; 1797 break; 1798 case COMB_ADD: 1799 sc->mps_debug |= flags; 1800 break; 1801 case COMB_SUB: 1802 sc->mps_debug &= (~flags); 1803 break; 1804 } 1805 1806 return; 1807 } 1808 1809 int 1810 mps_attach(struct mps_softc *sc) 1811 { 1812 int error; 1813 1814 MPS_FUNCTRACE(sc); 1815 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1816 1817 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF); 1818 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0); 1819 callout_init_mtx(&sc->device_check_callout, &sc->mps_mtx, 0); 1820 TAILQ_INIT(&sc->event_list); 1821 timevalclear(&sc->lastfail); 1822 1823 if ((error = mps_transition_ready(sc)) != 0) { 1824 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to transition " 1825 "ready\n"); 1826 return (error); 1827 } 1828 1829 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2, 1830 M_ZERO|M_NOWAIT); 1831 if(!sc->facts) { 1832 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Cannot allocate memory, " 1833 "exit\n"); 1834 return (ENOMEM); 1835 } 1836 1837 /* 1838 * Get IOC Facts and allocate all structures based on this information. 1839 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC 1840 * Facts. If relevant values have changed in IOC Facts, this function 1841 * will free all of the memory based on IOC Facts and reallocate that 1842 * memory. If this fails, any allocated memory should already be freed. 1843 */ 1844 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) { 1845 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC Facts based allocation " 1846 "failed with error %d, exit\n", error); 1847 return (error); 1848 } 1849 1850 /* Start the periodic watchdog check on the IOC Doorbell */ 1851 mps_periodic(sc); 1852 1853 /* 1854 * The portenable will kick off discovery events that will drive the 1855 * rest of the initialization process. The CAM/SAS module will 1856 * hold up the boot sequence until discovery is complete. 1857 */ 1858 sc->mps_ich.ich_func = mps_startup; 1859 sc->mps_ich.ich_arg = sc; 1860 if (config_intrhook_establish(&sc->mps_ich) != 0) { 1861 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1862 "Cannot establish MPS config hook\n"); 1863 error = EINVAL; 1864 } 1865 1866 /* 1867 * Allow IR to shutdown gracefully when shutdown occurs. 1868 */ 1869 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 1870 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); 1871 1872 if (sc->shutdown_eh == NULL) 1873 mps_dprint(sc, MPS_INIT|MPS_ERROR, 1874 "shutdown event registration failed\n"); 1875 1876 mps_setup_sysctl(sc); 1877 1878 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE; 1879 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error); 1880 1881 return (error); 1882 } 1883 1884 /* Run through any late-start handlers. */ 1885 static void 1886 mps_startup(void *arg) 1887 { 1888 struct mps_softc *sc; 1889 1890 sc = (struct mps_softc *)arg; 1891 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1892 1893 mps_lock(sc); 1894 mps_unmask_intr(sc); 1895 1896 /* initialize device mapping tables */ 1897 mps_base_static_config_pages(sc); 1898 mps_mapping_initialize(sc); 1899 mpssas_startup(sc); 1900 mps_unlock(sc); 1901 1902 mps_dprint(sc, MPS_INIT, "disestablish config intrhook\n"); 1903 config_intrhook_disestablish(&sc->mps_ich); 1904 sc->mps_ich.ich_arg = NULL; 1905 1906 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 1907 } 1908 1909 /* Periodic watchdog. Is called with the driver lock already held. */ 1910 static void 1911 mps_periodic(void *arg) 1912 { 1913 struct mps_softc *sc; 1914 uint32_t db; 1915 1916 sc = (struct mps_softc *)arg; 1917 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN) 1918 return; 1919 1920 db = mps_regread(sc, MPI2_DOORBELL_OFFSET); 1921 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 1922 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db); 1923 mps_reinit(sc); 1924 } 1925 1926 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc); 1927 } 1928 1929 static void 1930 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data, 1931 MPI2_EVENT_NOTIFICATION_REPLY *event) 1932 { 1933 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; 1934 1935 MPS_DPRINT_EVENT(sc, generic, event); 1936 1937 switch (event->Event) { 1938 case MPI2_EVENT_LOG_DATA: 1939 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n"); 1940 if (sc->mps_debug & MPS_EVENT) 1941 hexdump(event->EventData, event->EventDataLength, NULL, 0); 1942 break; 1943 case MPI2_EVENT_LOG_ENTRY_ADDED: 1944 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; 1945 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event " 1946 "0x%x Sequence %d:\n", entry->LogEntryQualifier, 1947 entry->LogSequence); 1948 break; 1949 default: 1950 break; 1951 } 1952 return; 1953 } 1954 1955 static int 1956 mps_attach_log(struct mps_softc *sc) 1957 { 1958 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1959 1960 bzero(events, 16); 1961 setbit(events, MPI2_EVENT_LOG_DATA); 1962 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); 1963 1964 mps_register_events(sc, events, mps_log_evt_handler, NULL, 1965 &sc->mps_log_eh); 1966 1967 return (0); 1968 } 1969 1970 static int 1971 mps_detach_log(struct mps_softc *sc) 1972 { 1973 1974 if (sc->mps_log_eh != NULL) 1975 mps_deregister_events(sc, sc->mps_log_eh); 1976 return (0); 1977 } 1978 1979 /* 1980 * Free all of the driver resources and detach submodules. Should be called 1981 * without the lock held. 1982 */ 1983 int 1984 mps_free(struct mps_softc *sc) 1985 { 1986 int error; 1987 1988 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__); 1989 /* Turn off the watchdog */ 1990 mps_lock(sc); 1991 sc->mps_flags |= MPS_FLAGS_SHUTDOWN; 1992 mps_unlock(sc); 1993 /* Lock must not be held for this */ 1994 callout_drain(&sc->periodic); 1995 callout_drain(&sc->device_check_callout); 1996 1997 if (((error = mps_detach_log(sc)) != 0) || 1998 ((error = mps_detach_sas(sc)) != 0)) { 1999 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to detach " 2000 "subsystems, exit\n"); 2001 return (error); 2002 } 2003 2004 mps_detach_user(sc); 2005 2006 /* Put the IOC back in the READY state. */ 2007 mps_lock(sc); 2008 if ((error = mps_transition_ready(sc)) != 0) { 2009 mps_unlock(sc); 2010 return (error); 2011 } 2012 mps_unlock(sc); 2013 2014 if (sc->facts != NULL) 2015 free(sc->facts, M_MPT2); 2016 2017 /* 2018 * Free all buffers that are based on IOC Facts. A Diag Reset may need 2019 * to free these buffers too. 2020 */ 2021 mps_iocfacts_free(sc); 2022 2023 if (sc->sysctl_tree != NULL) 2024 sysctl_ctx_free(&sc->sysctl_ctx); 2025 2026 /* Deregister the shutdown function */ 2027 if (sc->shutdown_eh != NULL) 2028 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); 2029 2030 mtx_destroy(&sc->mps_mtx); 2031 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__); 2032 2033 return (0); 2034 } 2035 2036 static __inline void 2037 mps_complete_command(struct mps_softc *sc, struct mps_command *cm) 2038 { 2039 MPS_FUNCTRACE(sc); 2040 2041 if (cm == NULL) { 2042 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n"); 2043 return; 2044 } 2045 2046 if (cm->cm_flags & MPS_CM_FLAGS_POLLED) 2047 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE; 2048 2049 if (cm->cm_complete != NULL) { 2050 mps_dprint(sc, MPS_TRACE, 2051 "%s cm %p calling cm_complete %p data %p reply %p\n", 2052 __func__, cm, cm->cm_complete, cm->cm_complete_data, 2053 cm->cm_reply); 2054 cm->cm_complete(sc, cm); 2055 } 2056 2057 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) { 2058 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm); 2059 wakeup(cm); 2060 } 2061 2062 if (cm->cm_sc->io_cmds_active != 0) { 2063 cm->cm_sc->io_cmds_active--; 2064 } else { 2065 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is " 2066 "out of sync - resynching to 0\n"); 2067 } 2068 } 2069 2070 2071 static void 2072 mps_sas_log_info(struct mps_softc *sc , u32 log_info) 2073 { 2074 union loginfo_type { 2075 u32 loginfo; 2076 struct { 2077 u32 subcode:16; 2078 u32 code:8; 2079 u32 originator:4; 2080 u32 bus_type:4; 2081 } dw; 2082 }; 2083 union loginfo_type sas_loginfo; 2084 char *originator_str = NULL; 2085 2086 sas_loginfo.loginfo = log_info; 2087 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 2088 return; 2089 2090 /* each nexus loss loginfo */ 2091 if (log_info == 0x31170000) 2092 return; 2093 2094 /* eat the loginfos associated with task aborts */ 2095 if ((log_info == 30050000 || log_info == 2096 0x31140000 || log_info == 0x31130000)) 2097 return; 2098 2099 switch (sas_loginfo.dw.originator) { 2100 case 0: 2101 originator_str = "IOP"; 2102 break; 2103 case 1: 2104 originator_str = "PL"; 2105 break; 2106 case 2: 2107 originator_str = "IR"; 2108 break; 2109 } 2110 2111 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), " 2112 "code(0x%02x), sub_code(0x%04x)\n", log_info, 2113 originator_str, sas_loginfo.dw.code, 2114 sas_loginfo.dw.subcode); 2115 } 2116 2117 static void 2118 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply) 2119 { 2120 MPI2DefaultReply_t *mpi_reply; 2121 u16 sc_status; 2122 2123 mpi_reply = (MPI2DefaultReply_t*)reply; 2124 sc_status = le16toh(mpi_reply->IOCStatus); 2125 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 2126 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo)); 2127 } 2128 void 2129 mps_intr(void *data) 2130 { 2131 struct mps_softc *sc; 2132 uint32_t status; 2133 2134 sc = (struct mps_softc *)data; 2135 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2136 2137 /* 2138 * Check interrupt status register to flush the bus. This is 2139 * needed for both INTx interrupts and driver-driven polling 2140 */ 2141 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); 2142 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) 2143 return; 2144 2145 mps_lock(sc); 2146 mps_intr_locked(data); 2147 mps_unlock(sc); 2148 return; 2149 } 2150 2151 /* 2152 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the 2153 * chip. Hopefully this theory is correct. 2154 */ 2155 void 2156 mps_intr_msi(void *data) 2157 { 2158 struct mps_softc *sc; 2159 2160 sc = (struct mps_softc *)data; 2161 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2162 mps_lock(sc); 2163 mps_intr_locked(data); 2164 mps_unlock(sc); 2165 return; 2166 } 2167 2168 /* 2169 * The locking is overly broad and simplistic, but easy to deal with for now. 2170 */ 2171 void 2172 mps_intr_locked(void *data) 2173 { 2174 MPI2_REPLY_DESCRIPTORS_UNION *desc; 2175 struct mps_softc *sc; 2176 struct mps_command *cm = NULL; 2177 uint8_t flags; 2178 u_int pq; 2179 MPI2_DIAG_RELEASE_REPLY *rel_rep; 2180 mps_fw_diagnostic_buffer_t *pBuffer; 2181 2182 sc = (struct mps_softc *)data; 2183 2184 pq = sc->replypostindex; 2185 mps_dprint(sc, MPS_TRACE, 2186 "%s sc %p starting with replypostindex %u\n", 2187 __func__, sc, sc->replypostindex); 2188 2189 for ( ;; ) { 2190 cm = NULL; 2191 desc = &sc->post_queue[sc->replypostindex]; 2192 flags = desc->Default.ReplyFlags & 2193 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 2194 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 2195 || (le32toh(desc->Words.High) == 0xffffffff)) 2196 break; 2197 2198 /* increment the replypostindex now, so that event handlers 2199 * and cm completion handlers which decide to do a diag 2200 * reset can zero it without it getting incremented again 2201 * afterwards, and we break out of this loop on the next 2202 * iteration since the reply post queue has been cleared to 2203 * 0xFF and all descriptors look unused (which they are). 2204 */ 2205 if (++sc->replypostindex >= sc->pqdepth) 2206 sc->replypostindex = 0; 2207 2208 switch (flags) { 2209 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: 2210 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)]; 2211 cm->cm_reply = NULL; 2212 break; 2213 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: 2214 { 2215 uint32_t baddr; 2216 uint8_t *reply; 2217 2218 /* 2219 * Re-compose the reply address from the address 2220 * sent back from the chip. The ReplyFrameAddress 2221 * is the lower 32 bits of the physical address of 2222 * particular reply frame. Convert that address to 2223 * host format, and then use that to provide the 2224 * offset against the virtual address base 2225 * (sc->reply_frames). 2226 */ 2227 baddr = le32toh(desc->AddressReply.ReplyFrameAddress); 2228 reply = sc->reply_frames + 2229 (baddr - ((uint32_t)sc->reply_busaddr)); 2230 /* 2231 * Make sure the reply we got back is in a valid 2232 * range. If not, go ahead and panic here, since 2233 * we'll probably panic as soon as we deference the 2234 * reply pointer anyway. 2235 */ 2236 if ((reply < sc->reply_frames) 2237 || (reply > (sc->reply_frames + 2238 (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) { 2239 printf("%s: WARNING: reply %p out of range!\n", 2240 __func__, reply); 2241 printf("%s: reply_frames %p, fqdepth %d, " 2242 "frame size %d\n", __func__, 2243 sc->reply_frames, sc->fqdepth, 2244 sc->facts->ReplyFrameSize * 4); 2245 printf("%s: baddr %#x,\n", __func__, baddr); 2246 /* LSI-TODO. See Linux Code. Need Graceful exit*/ 2247 panic("Reply address out of range"); 2248 } 2249 if (le16toh(desc->AddressReply.SMID) == 0) { 2250 if (((MPI2_DEFAULT_REPLY *)reply)->Function == 2251 MPI2_FUNCTION_DIAG_BUFFER_POST) { 2252 /* 2253 * If SMID is 0 for Diag Buffer Post, 2254 * this implies that the reply is due to 2255 * a release function with a status that 2256 * the buffer has been released. Set 2257 * the buffer flags accordingly. 2258 */ 2259 rel_rep = 2260 (MPI2_DIAG_RELEASE_REPLY *)reply; 2261 if ((le16toh(rel_rep->IOCStatus) & 2262 MPI2_IOCSTATUS_MASK) == 2263 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) 2264 { 2265 pBuffer = 2266 &sc->fw_diag_buffer_list[ 2267 rel_rep->BufferType]; 2268 pBuffer->valid_data = TRUE; 2269 pBuffer->owned_by_firmware = 2270 FALSE; 2271 pBuffer->immediate = FALSE; 2272 } 2273 } else 2274 mps_dispatch_event(sc, baddr, 2275 (MPI2_EVENT_NOTIFICATION_REPLY *) 2276 reply); 2277 } else { 2278 cm = &sc->commands[le16toh(desc->AddressReply.SMID)]; 2279 cm->cm_reply = reply; 2280 cm->cm_reply_data = 2281 le32toh(desc->AddressReply.ReplyFrameAddress); 2282 } 2283 break; 2284 } 2285 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: 2286 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: 2287 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: 2288 default: 2289 /* Unhandled */ 2290 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n", 2291 desc->Default.ReplyFlags); 2292 cm = NULL; 2293 break; 2294 } 2295 2296 2297 if (cm != NULL) { 2298 // Print Error reply frame 2299 if (cm->cm_reply) 2300 mps_display_reply_info(sc,cm->cm_reply); 2301 mps_complete_command(sc, cm); 2302 } 2303 2304 desc->Words.Low = 0xffffffff; 2305 desc->Words.High = 0xffffffff; 2306 } 2307 2308 if (pq != sc->replypostindex) { 2309 mps_dprint(sc, MPS_TRACE, 2310 "%s sc %p writing postindex %d\n", 2311 __func__, sc, sc->replypostindex); 2312 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex); 2313 } 2314 2315 return; 2316 } 2317 2318 static void 2319 mps_dispatch_event(struct mps_softc *sc, uintptr_t data, 2320 MPI2_EVENT_NOTIFICATION_REPLY *reply) 2321 { 2322 struct mps_event_handle *eh; 2323 int event, handled = 0; 2324 2325 event = le16toh(reply->Event); 2326 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2327 if (isset(eh->mask, event)) { 2328 eh->callback(sc, data, reply); 2329 handled++; 2330 } 2331 } 2332 2333 if (handled == 0) 2334 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event)); 2335 2336 /* 2337 * This is the only place that the event/reply should be freed. 2338 * Anything wanting to hold onto the event data should have 2339 * already copied it into their own storage. 2340 */ 2341 mps_free_reply(sc, data); 2342 } 2343 2344 static void 2345 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm) 2346 { 2347 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2348 2349 if (cm->cm_reply) 2350 MPS_DPRINT_EVENT(sc, generic, 2351 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); 2352 2353 mps_free_command(sc, cm); 2354 2355 /* next, send a port enable */ 2356 mpssas_startup(sc); 2357 } 2358 2359 /* 2360 * For both register_events and update_events, the caller supplies a bitmap 2361 * of events that it _wants_. These functions then turn that into a bitmask 2362 * suitable for the controller. 2363 */ 2364 int 2365 mps_register_events(struct mps_softc *sc, u32 *mask, 2366 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle) 2367 { 2368 struct mps_event_handle *eh; 2369 int error = 0; 2370 2371 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO); 2372 if(!eh) { 2373 mps_dprint(sc, MPS_ERROR, "Cannot allocate event memory\n"); 2374 return (ENOMEM); 2375 } 2376 eh->callback = cb; 2377 eh->data = data; 2378 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); 2379 if (mask != NULL) 2380 error = mps_update_events(sc, eh, mask); 2381 *handle = eh; 2382 2383 return (error); 2384 } 2385 2386 int 2387 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle, 2388 u32 *mask) 2389 { 2390 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2391 MPI2_EVENT_NOTIFICATION_REPLY *reply = NULL; 2392 struct mps_command *cm; 2393 int error, i; 2394 2395 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2396 2397 if ((mask != NULL) && (handle != NULL)) 2398 bcopy(mask, &handle->mask[0], sizeof(u32) * 2399 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2400 2401 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2402 sc->event_mask[i] = -1; 2403 2404 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2405 sc->event_mask[i] &= ~handle->mask[i]; 2406 2407 2408 if ((cm = mps_alloc_command(sc)) == NULL) 2409 return (EBUSY); 2410 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2411 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2412 evtreq->MsgFlags = 0; 2413 evtreq->SASBroadcastPrimitiveMasks = 0; 2414 #ifdef MPS_DEBUG_ALL_EVENTS 2415 { 2416 u_char fullmask[16]; 2417 memset(fullmask, 0x00, 16); 2418 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2419 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2420 } 2421 #else 2422 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2423 evtreq->EventMasks[i] = 2424 htole32(sc->event_mask[i]); 2425 #endif 2426 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2427 cm->cm_data = NULL; 2428 2429 error = mps_wait_command(sc, &cm, 60, 0); 2430 if (cm != NULL) 2431 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; 2432 if ((reply == NULL) || 2433 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) 2434 error = ENXIO; 2435 2436 if (reply) 2437 MPS_DPRINT_EVENT(sc, generic, reply); 2438 2439 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error); 2440 2441 if (cm != NULL) 2442 mps_free_command(sc, cm); 2443 return (error); 2444 } 2445 2446 static int 2447 mps_reregister_events(struct mps_softc *sc) 2448 { 2449 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; 2450 struct mps_command *cm; 2451 struct mps_event_handle *eh; 2452 int error, i; 2453 2454 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 2455 2456 /* first, reregister events */ 2457 2458 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2459 sc->event_mask[i] = -1; 2460 2461 TAILQ_FOREACH(eh, &sc->event_list, eh_list) { 2462 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2463 sc->event_mask[i] &= ~eh->mask[i]; 2464 } 2465 2466 if ((cm = mps_alloc_command(sc)) == NULL) 2467 return (EBUSY); 2468 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; 2469 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2470 evtreq->MsgFlags = 0; 2471 evtreq->SASBroadcastPrimitiveMasks = 0; 2472 #ifdef MPS_DEBUG_ALL_EVENTS 2473 { 2474 u_char fullmask[16]; 2475 memset(fullmask, 0x00, 16); 2476 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) * 2477 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS); 2478 } 2479 #else 2480 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2481 evtreq->EventMasks[i] = 2482 htole32(sc->event_mask[i]); 2483 #endif 2484 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2485 cm->cm_data = NULL; 2486 cm->cm_complete = mps_reregister_events_complete; 2487 2488 error = mps_map_command(sc, cm); 2489 2490 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__, 2491 error); 2492 return (error); 2493 } 2494 2495 void 2496 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle) 2497 { 2498 2499 TAILQ_REMOVE(&sc->event_list, handle, eh_list); 2500 free(handle, M_MPT2); 2501 } 2502 2503 /* 2504 * Add a chain element as the next SGE for the specified command. 2505 * Reset cm_sge and cm_sgesize to indicate all the available space. 2506 */ 2507 static int 2508 mps_add_chain(struct mps_command *cm) 2509 { 2510 MPI2_SGE_CHAIN32 *sgc; 2511 struct mps_chain *chain; 2512 int space; 2513 2514 if (cm->cm_sglsize < MPS_SGC_SIZE) 2515 panic("MPS: Need SGE Error Code\n"); 2516 2517 chain = mps_alloc_chain(cm->cm_sc); 2518 if (chain == NULL) 2519 return (ENOBUFS); 2520 2521 space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4; 2522 2523 /* 2524 * Note: a double-linked list is used to make it easier to 2525 * walk for debugging. 2526 */ 2527 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); 2528 2529 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain; 2530 sgc->Length = htole16(space); 2531 sgc->NextChainOffset = 0; 2532 /* TODO Looks like bug in Setting sgc->Flags. 2533 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 2534 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT 2535 * This is fine.. because we are not using simple element. In case of 2536 * MPI2_SGE_CHAIN32, we have separate Length and Flags feild. 2537 */ 2538 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; 2539 sgc->Address = htole32(chain->chain_busaddr); 2540 2541 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple; 2542 cm->cm_sglsize = space; 2543 return (0); 2544 } 2545 2546 /* 2547 * Add one scatter-gather element (chain, simple, transaction context) 2548 * to the scatter-gather list for a command. Maintain cm_sglsize and 2549 * cm_sge as the remaining size and pointer to the next SGE to fill 2550 * in, respectively. 2551 */ 2552 int 2553 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft) 2554 { 2555 MPI2_SGE_TRANSACTION_UNION *tc = sgep; 2556 MPI2_SGE_SIMPLE64 *sge = sgep; 2557 int error, type; 2558 uint32_t saved_buf_len, saved_address_low, saved_address_high; 2559 2560 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK); 2561 2562 #ifdef INVARIANTS 2563 switch (type) { 2564 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: { 2565 if (len != tc->DetailsLength + 4) 2566 panic("TC %p length %u or %zu?", tc, 2567 tc->DetailsLength + 4, len); 2568 } 2569 break; 2570 case MPI2_SGE_FLAGS_CHAIN_ELEMENT: 2571 /* Driver only uses 32-bit chain elements */ 2572 if (len != MPS_SGC_SIZE) 2573 panic("CHAIN %p length %u or %zu?", sgep, 2574 MPS_SGC_SIZE, len); 2575 break; 2576 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT: 2577 /* Driver only uses 64-bit SGE simple elements */ 2578 if (len != MPS_SGE64_SIZE) 2579 panic("SGE simple %p length %u or %zu?", sge, 2580 MPS_SGE64_SIZE, len); 2581 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) & 2582 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0) 2583 panic("SGE simple %p not marked 64-bit?", sge); 2584 2585 break; 2586 default: 2587 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags); 2588 } 2589 #endif 2590 2591 /* 2592 * case 1: 1 more segment, enough room for it 2593 * case 2: 2 more segments, enough room for both 2594 * case 3: >=2 more segments, only enough room for 1 and a chain 2595 * case 4: >=1 more segment, enough room for only a chain 2596 * case 5: >=1 more segment, no room for anything (error) 2597 */ 2598 2599 /* 2600 * There should be room for at least a chain element, or this 2601 * code is buggy. Case (5). 2602 */ 2603 if (cm->cm_sglsize < MPS_SGC_SIZE) 2604 panic("MPS: Need SGE Error Code\n"); 2605 2606 if (segsleft >= 2 && 2607 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) { 2608 /* 2609 * There are 2 or more segments left to add, and only 2610 * enough room for 1 and a chain. Case (3). 2611 * 2612 * Mark as last element in this chain if necessary. 2613 */ 2614 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2615 sge->FlagsLength |= htole32( 2616 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT); 2617 } 2618 2619 /* 2620 * Add the item then a chain. Do the chain now, 2621 * rather than on the next iteration, to simplify 2622 * understanding the code. 2623 */ 2624 cm->cm_sglsize -= len; 2625 bcopy(sgep, cm->cm_sge, len); 2626 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2627 return (mps_add_chain(cm)); 2628 } 2629 2630 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) { 2631 /* 2632 * 1 or more segment, enough room for only a chain. 2633 * Hope the previous element wasn't a Simple entry 2634 * that needed to be marked with 2635 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4). 2636 */ 2637 if ((error = mps_add_chain(cm)) != 0) 2638 return (error); 2639 } 2640 2641 #ifdef INVARIANTS 2642 /* Case 1: 1 more segment, enough room for it. */ 2643 if (segsleft == 1 && cm->cm_sglsize < len) 2644 panic("1 seg left and no room? %u versus %zu", 2645 cm->cm_sglsize, len); 2646 2647 /* Case 2: 2 more segments, enough room for both */ 2648 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE) 2649 panic("2 segs left and no room? %u versus %zu", 2650 cm->cm_sglsize, len); 2651 #endif 2652 2653 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { 2654 /* 2655 * If this is a bi-directional request, need to account for that 2656 * here. Save the pre-filled sge values. These will be used 2657 * either for the 2nd SGL or for a single direction SGL. If 2658 * cm_out_len is non-zero, this is a bi-directional request, so 2659 * fill in the OUT SGL first, then the IN SGL, otherwise just 2660 * fill in the IN SGL. Note that at this time, when filling in 2661 * 2 SGL's for a bi-directional request, they both use the same 2662 * DMA buffer (same cm command). 2663 */ 2664 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF; 2665 saved_address_low = sge->Address.Low; 2666 saved_address_high = sge->Address.High; 2667 if (cm->cm_out_len) { 2668 sge->FlagsLength = htole32(cm->cm_out_len | 2669 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2670 MPI2_SGE_FLAGS_END_OF_BUFFER | 2671 MPI2_SGE_FLAGS_HOST_TO_IOC | 2672 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2673 MPI2_SGE_FLAGS_SHIFT)); 2674 cm->cm_sglsize -= len; 2675 bcopy(sgep, cm->cm_sge, len); 2676 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge 2677 + len); 2678 } 2679 saved_buf_len |= 2680 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2681 MPI2_SGE_FLAGS_END_OF_BUFFER | 2682 MPI2_SGE_FLAGS_LAST_ELEMENT | 2683 MPI2_SGE_FLAGS_END_OF_LIST | 2684 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << 2685 MPI2_SGE_FLAGS_SHIFT); 2686 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) { 2687 saved_buf_len |= 2688 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << 2689 MPI2_SGE_FLAGS_SHIFT); 2690 } else { 2691 saved_buf_len |= 2692 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << 2693 MPI2_SGE_FLAGS_SHIFT); 2694 } 2695 sge->FlagsLength = htole32(saved_buf_len); 2696 sge->Address.Low = saved_address_low; 2697 sge->Address.High = saved_address_high; 2698 } 2699 2700 cm->cm_sglsize -= len; 2701 bcopy(sgep, cm->cm_sge, len); 2702 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); 2703 return (0); 2704 } 2705 2706 /* 2707 * Add one dma segment to the scatter-gather list for a command. 2708 */ 2709 int 2710 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags, 2711 int segsleft) 2712 { 2713 MPI2_SGE_SIMPLE64 sge; 2714 2715 /* 2716 * This driver always uses 64-bit address elements for simplicity. 2717 */ 2718 bzero(&sge, sizeof(sge)); 2719 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2720 MPI2_SGE_FLAGS_64_BIT_ADDRESSING; 2721 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT)); 2722 mps_from_u64(pa, &sge.Address); 2723 2724 return (mps_push_sge(cm, &sge, sizeof sge, segsleft)); 2725 } 2726 2727 static void 2728 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 2729 { 2730 struct mps_softc *sc; 2731 struct mps_command *cm; 2732 u_int i, dir, sflags; 2733 2734 cm = (struct mps_command *)arg; 2735 sc = cm->cm_sc; 2736 2737 /* 2738 * In this case, just print out a warning and let the chip tell the 2739 * user they did the wrong thing. 2740 */ 2741 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { 2742 mps_dprint(sc, MPS_ERROR, 2743 "%s: warning: busdma returned %d segments, " 2744 "more than the %d allowed\n", __func__, nsegs, 2745 cm->cm_max_segs); 2746 } 2747 2748 /* 2749 * Set up DMA direction flags. Bi-directional requests are also handled 2750 * here. In that case, both direction flags will be set. 2751 */ 2752 sflags = 0; 2753 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) { 2754 /* 2755 * We have to add a special case for SMP passthrough, there 2756 * is no easy way to generically handle it. The first 2757 * S/G element is used for the command (therefore the 2758 * direction bit needs to be set). The second one is used 2759 * for the reply. We'll leave it to the caller to make 2760 * sure we only have two buffers. 2761 */ 2762 /* 2763 * Even though the busdma man page says it doesn't make 2764 * sense to have both direction flags, it does in this case. 2765 * We have one s/g element being accessed in each direction. 2766 */ 2767 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; 2768 2769 /* 2770 * Set the direction flag on the first buffer in the SMP 2771 * passthrough request. We'll clear it for the second one. 2772 */ 2773 sflags |= MPI2_SGE_FLAGS_DIRECTION | 2774 MPI2_SGE_FLAGS_END_OF_BUFFER; 2775 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { 2776 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; 2777 dir = BUS_DMASYNC_PREWRITE; 2778 } else 2779 dir = BUS_DMASYNC_PREREAD; 2780 2781 for (i = 0; i < nsegs; i++) { 2782 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) { 2783 sflags &= ~MPI2_SGE_FLAGS_DIRECTION; 2784 } 2785 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, 2786 sflags, nsegs - i); 2787 if (error != 0) { 2788 /* Resource shortage, roll back! */ 2789 if (ratecheck(&sc->lastfail, &mps_chainfail_interval)) 2790 mps_dprint(sc, MPS_INFO, "Out of chain frames, " 2791 "consider increasing hw.mps.max_chains.\n"); 2792 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED; 2793 mps_complete_command(sc, cm); 2794 return; 2795 } 2796 } 2797 2798 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); 2799 mps_enqueue_request(sc, cm); 2800 2801 return; 2802 } 2803 2804 static void 2805 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, 2806 int error) 2807 { 2808 mps_data_cb(arg, segs, nsegs, error); 2809 } 2810 2811 /* 2812 * This is the routine to enqueue commands ansynchronously. 2813 * Note that the only error path here is from bus_dmamap_load(), which can 2814 * return EINPROGRESS if it is waiting for resources. Other than this, it's 2815 * assumed that if you have a command in-hand, then you have enough credits 2816 * to use it. 2817 */ 2818 int 2819 mps_map_command(struct mps_softc *sc, struct mps_command *cm) 2820 { 2821 int error = 0; 2822 2823 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) { 2824 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, 2825 &cm->cm_uio, mps_data_cb2, cm, 0); 2826 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) { 2827 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap, 2828 cm->cm_data, mps_data_cb, cm, 0); 2829 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { 2830 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, 2831 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0); 2832 } else { 2833 /* Add a zero-length element as needed */ 2834 if (cm->cm_sge != NULL) 2835 mps_add_dmaseg(cm, 0, 0, 0, 1); 2836 mps_enqueue_request(sc, cm); 2837 } 2838 2839 return (error); 2840 } 2841 2842 /* 2843 * This is the routine to enqueue commands synchronously. An error of 2844 * EINPROGRESS from mps_map_command() is ignored since the command will 2845 * be executed and enqueued automatically. Other errors come from msleep(). 2846 */ 2847 int 2848 mps_wait_command(struct mps_softc *sc, struct mps_command **cmp, int timeout, 2849 int sleep_flag) 2850 { 2851 int error, rc; 2852 struct timeval cur_time, start_time; 2853 struct mps_command *cm = *cmp; 2854 2855 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) 2856 return EBUSY; 2857 2858 cm->cm_complete = NULL; 2859 cm->cm_flags |= MPS_CM_FLAGS_POLLED; 2860 error = mps_map_command(sc, cm); 2861 if ((error != 0) && (error != EINPROGRESS)) 2862 return (error); 2863 2864 /* 2865 * Check for context and wait for 50 mSec at a time until time has 2866 * expired or the command has finished. If msleep can't be used, need 2867 * to poll. 2868 */ 2869 if (curthread->td_no_sleeping != 0) 2870 sleep_flag = NO_SLEEP; 2871 getmicrouptime(&start_time); 2872 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) { 2873 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP; 2874 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz); 2875 if (error == EWOULDBLOCK) { 2876 /* 2877 * Record the actual elapsed time in the case of a 2878 * timeout for the message below. 2879 */ 2880 getmicrouptime(&cur_time); 2881 timevalsub(&cur_time, &start_time); 2882 } 2883 } else { 2884 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) { 2885 mps_intr_locked(sc); 2886 if (sleep_flag == CAN_SLEEP) 2887 pause("mpswait", hz/20); 2888 else 2889 DELAY(50000); 2890 2891 getmicrouptime(&cur_time); 2892 timevalsub(&cur_time, &start_time); 2893 if (cur_time.tv_sec > timeout) { 2894 error = EWOULDBLOCK; 2895 break; 2896 } 2897 } 2898 } 2899 2900 if (error == EWOULDBLOCK) { 2901 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s, timeout=%d," 2902 " elapsed=%jd\n", __func__, timeout, 2903 (intmax_t)cur_time.tv_sec); 2904 rc = mps_reinit(sc); 2905 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" : 2906 "failed"); 2907 if (sc->mps_flags & MPS_FLAGS_REALLOCATED) { 2908 /* 2909 * Tell the caller that we freed the command in a 2910 * reinit. 2911 */ 2912 *cmp = NULL; 2913 } 2914 error = ETIMEDOUT; 2915 } 2916 return (error); 2917 } 2918 2919 /* 2920 * The MPT driver had a verbose interface for config pages. In this driver, 2921 * reduce it to much simpler terms, similar to the Linux driver. 2922 */ 2923 int 2924 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params) 2925 { 2926 MPI2_CONFIG_REQUEST *req; 2927 struct mps_command *cm; 2928 int error; 2929 2930 if (sc->mps_flags & MPS_FLAGS_BUSY) { 2931 return (EBUSY); 2932 } 2933 2934 cm = mps_alloc_command(sc); 2935 if (cm == NULL) { 2936 return (EBUSY); 2937 } 2938 2939 req = (MPI2_CONFIG_REQUEST *)cm->cm_req; 2940 req->Function = MPI2_FUNCTION_CONFIG; 2941 req->Action = params->action; 2942 req->SGLFlags = 0; 2943 req->ChainOffset = 0; 2944 req->PageAddress = params->page_address; 2945 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 2946 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; 2947 2948 hdr = ¶ms->hdr.Ext; 2949 req->ExtPageType = hdr->ExtPageType; 2950 req->ExtPageLength = hdr->ExtPageLength; 2951 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; 2952 req->Header.PageLength = 0; /* Must be set to zero */ 2953 req->Header.PageNumber = hdr->PageNumber; 2954 req->Header.PageVersion = hdr->PageVersion; 2955 } else { 2956 MPI2_CONFIG_PAGE_HEADER *hdr; 2957 2958 hdr = ¶ms->hdr.Struct; 2959 req->Header.PageType = hdr->PageType; 2960 req->Header.PageNumber = hdr->PageNumber; 2961 req->Header.PageLength = hdr->PageLength; 2962 req->Header.PageVersion = hdr->PageVersion; 2963 } 2964 2965 cm->cm_data = params->buffer; 2966 cm->cm_length = params->length; 2967 if (cm->cm_data != NULL) { 2968 cm->cm_sge = &req->PageBufferSGE; 2969 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); 2970 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN; 2971 } else 2972 cm->cm_sge = NULL; 2973 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 2974 2975 cm->cm_complete_data = params; 2976 if (params->callback != NULL) { 2977 cm->cm_complete = mps_config_complete; 2978 return (mps_map_command(sc, cm)); 2979 } else { 2980 error = mps_wait_command(sc, &cm, 0, CAN_SLEEP); 2981 if (error) { 2982 mps_dprint(sc, MPS_FAULT, 2983 "Error %d reading config page\n", error); 2984 if (cm != NULL) 2985 mps_free_command(sc, cm); 2986 return (error); 2987 } 2988 mps_config_complete(sc, cm); 2989 } 2990 2991 return (0); 2992 } 2993 2994 int 2995 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params) 2996 { 2997 return (EINVAL); 2998 } 2999 3000 static void 3001 mps_config_complete(struct mps_softc *sc, struct mps_command *cm) 3002 { 3003 MPI2_CONFIG_REPLY *reply; 3004 struct mps_config_params *params; 3005 3006 MPS_FUNCTRACE(sc); 3007 params = cm->cm_complete_data; 3008 3009 if (cm->cm_data != NULL) { 3010 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, 3011 BUS_DMASYNC_POSTREAD); 3012 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); 3013 } 3014 3015 /* 3016 * XXX KDM need to do more error recovery? This results in the 3017 * device in question not getting probed. 3018 */ 3019 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) { 3020 params->status = MPI2_IOCSTATUS_BUSY; 3021 goto done; 3022 } 3023 3024 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; 3025 if (reply == NULL) { 3026 params->status = MPI2_IOCSTATUS_BUSY; 3027 goto done; 3028 } 3029 params->status = reply->IOCStatus; 3030 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { 3031 params->hdr.Ext.ExtPageType = reply->ExtPageType; 3032 params->hdr.Ext.ExtPageLength = reply->ExtPageLength; 3033 params->hdr.Ext.PageType = reply->Header.PageType; 3034 params->hdr.Ext.PageNumber = reply->Header.PageNumber; 3035 params->hdr.Ext.PageVersion = reply->Header.PageVersion; 3036 } else { 3037 params->hdr.Struct.PageType = reply->Header.PageType; 3038 params->hdr.Struct.PageNumber = reply->Header.PageNumber; 3039 params->hdr.Struct.PageLength = reply->Header.PageLength; 3040 params->hdr.Struct.PageVersion = reply->Header.PageVersion; 3041 } 3042 3043 done: 3044 mps_free_command(sc, cm); 3045 if (params->callback != NULL) 3046 params->callback(sc, params); 3047 3048 return; 3049 } 3050